source: rtems/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c @ 8d830fae

4.115
Last change on this file since 8d830fae was 8d830fae, checked in by Radu <radustoma@…>, on 12/02/13 at 20:07:35

leon2_doxygen_1
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1/**
2 * @file
3 * @ingroup leon2_rasta
4 * @brief GR-RASTA-IO PCI board driver
5 */
6
7/*
8 *  GR-RASTA-IO PCI board driver
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 */
14
15#include <rtems/bspIo.h>
16#include <pci.h>
17#include <rasta.h>
18#include <ambapp.h>
19#include <grlib.h>
20#include <grcan_rasta.h>
21#include <grspw_rasta.h>
22#include <b1553brm_rasta.h>
23#include <apbuart_rasta.h>
24
25#include <string.h>
26
27/* If RASTA_SRAM is defined SRAM will be used, else SDRAM */
28/*#define RASTA_SRAM 1*/
29
30#define RASTA_IRQ  5
31
32/* Offset from 0x80000000 (dual bus version) */
33#define AHB1_IOAREA_BASE_ADDR 0x80100000
34#define APB2_OFFSET    0x200000
35#define IRQ_OFFSET     0x200500
36#define GRHCAN_OFFSET  0x201000
37#define BRM_OFFSET     0x100000
38#define SPW_OFFSET     0xa00
39#define UART_OFFSET    0x200200
40#define GPIO0_OFF      0x200600
41#define GPIO1_OFF      0x200700
42
43/* #define DEBUG 1 */
44
45#ifdef DEBUG
46#define DBG(x...) printk(x)
47#else
48#define DBG(x...)
49#endif
50
51static int bus, dev, fun;
52
53struct irqmp_regs *irq = NULL;
54LEON_Register_Map *regs = (LEON_Register_Map *)0x80000000;
55
56struct gpio_reg *gpio0, *gpio1;
57
58/* static rtems_isr pci_interrupt_handler (rtems_vector_number v) { */
59
60/*     volatile unsigned int *pci_int = (volatile unsigned int *) 0x80000168; */
61/*     volatile unsigned int *pci_mem = (volatile unsigned int *) 0xb0400000; */
62
63/*     if (*pci_int & 0x20) { */
64
65/*         *pci_int = 0x20; */
66
67/*         *pci_mem = 0; */
68
69/*         printk("pci died\n"); */
70
71/*     } */
72
73/* } */
74
75void *uart0_int_arg, *uart1_int_arg;
76void *spw0_int_arg, *spw1_int_arg, *spw2_int_arg;
77void *grcan_int_arg;
78void *brm_int_arg;
79
80void (*uart0_int_handler)(int irq, void *arg) = NULL;
81void (*uart1_int_handler)(int irq, void *arg) = NULL;
82void (*spw0_int_handler)(int irq, void *arg) = NULL;
83void (*spw1_int_handler)(int irq, void *arg) = NULL;
84void (*spw2_int_handler)(int irq, void *arg) = NULL;
85void (*grcan_int_handler)(int irq, void *arg) = NULL;
86void (*brm_int_handler)(int irq, void *arg) = NULL;
87
88static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
89{
90    unsigned int status;
91
92    status = irq->ipend;
93
94    if ( (status & GRCAN_IRQ) && grcan_int_handler ) {
95      grcan_int_handler(GRCAN_IRQNO,grcan_int_arg);
96    }
97
98    if (status & SPW_IRQ) {
99      if ( (status & SPW0_IRQ) && spw0_int_handler ){
100        spw0_int_handler(SPW0_IRQNO,spw0_int_arg);
101      }
102
103      if ( (status & SPW1_IRQ) && spw1_int_handler ){
104        spw1_int_handler(SPW1_IRQNO,spw1_int_arg);
105      }
106
107      if ( (status & SPW2_IRQ) && spw2_int_handler ){
108        spw2_int_handler(SPW2_IRQNO,spw2_int_arg);
109      }
110    }
111    if ((status & BRM_IRQ) && brm_int_handler ){
112        brm_int_handler(BRM_IRQNO,brm_int_arg);
113    }
114    if ( (status & UART0_IRQ) && uart0_int_handler ) {
115      uart0_int_handler(UART0_IRQNO,uart0_int_arg);
116    }
117    if ( (status & UART1_IRQ) && uart1_int_handler) {
118      uart1_int_handler(UART1_IRQNO,uart1_int_arg);
119    }
120
121    DBG("RASTA-IRQ: 0x%x\n",status);
122    irq->iclear = status;
123
124}
125
126void rasta_interrrupt_register(void *handler, int irqno, void *arg)
127{
128  DBG("RASTA: Registering irq %d\n",irqno);
129  if ( irqno == UART0_IRQNO ){
130    DBG("RASTA: Registering uart0 handler: 0x%x, arg: 0x%x\n",handler,arg);
131    uart0_int_handler = handler;
132    uart0_int_arg = arg;
133
134    /* unmask interrupt source */
135    irq->iclear = UART0_IRQ;
136    irq->mask[0] |= UART0_IRQ;
137  }
138
139  if ( irqno == UART1_IRQNO ){
140    DBG("RASTA: Registering uart1 handler: 0x%x, arg: 0x%x\n",handler,arg);
141    uart1_int_handler = handler;
142    uart1_int_arg = arg;
143
144    /* unmask interrupt source */
145    irq->iclear = UART1_IRQ;
146    irq->mask[0] |= UART1_IRQ;
147  }
148
149  if ( irqno == SPW0_IRQNO ){
150    DBG("RASTA: Registering spw0 handler: 0x%x, arg: 0x%x\n",handler,arg);
151    spw0_int_handler = handler;
152    spw0_int_arg = arg;
153
154    /* unmask interrupt source */
155    irq->iclear = SPW0_IRQ;
156    irq->mask[0] |= SPW0_IRQ;
157  }
158
159  if ( irqno == SPW1_IRQNO ){
160    DBG("RASTA: Registering spw1 handler: 0x%x, arg: 0x%x\n",handler,arg);
161    spw1_int_handler = handler;
162    spw1_int_arg = arg;
163
164    /* unmask interrupt source */
165    irq->iclear = SPW1_IRQ;
166    irq->mask[0] |= SPW1_IRQ;
167  }
168
169  if ( irqno == SPW2_IRQNO ){
170    DBG("RASTA: Registering spw2 handler: 0x%x, arg: 0x%x\n",handler,arg);
171    spw2_int_handler = handler;
172    spw2_int_arg = arg;
173
174    /* unmask interrupt source */
175    irq->iclear = SPW2_IRQ;
176    irq->mask[0] |= SPW2_IRQ;
177  }
178
179  if ( irqno == GRCAN_IRQNO ){
180    DBG("RASTA: Registering GRCAN handler: 0x%x, arg: 0x%x\n",handler,arg);
181    grcan_int_handler = handler;
182    grcan_int_arg = arg;
183
184    /* unmask interrupt source */
185    irq->iclear = GRCAN_IRQ;
186    irq->mask[0] |= GRCAN_IRQ;
187  }
188
189  if ( irqno == BRM_IRQNO ){
190    DBG("RASTA: Registering BRM handler: 0x%x, arg: 0x%x\n",handler,arg);
191    brm_int_handler = handler;
192    brm_int_arg = arg;
193
194    /* unmask interrupt source */
195    irq->iclear = BRM_IRQ;
196    irq->mask[0] |= BRM_IRQ;
197  }
198}
199
200
201int rasta_get_gpio(struct ambapp_bus *abus, int index, struct gpio_reg **regs,
202                   int *irq)
203{
204  struct ambapp_apb_info dev;
205  int cores;
206
207  if ( !abus )
208    return -1;
209
210  /* Scan PnP info for GPIO port number 'index' */
211  cores = ambapp_find_apbslv_next(abus, VENDOR_GAISLER, GAISLER_GPIO, &dev,
212                                  index);
213  if ( cores < 1 )
214    return -1;
215
216  if ( regs )
217    *regs = (struct gpio_reg *)dev.start;
218
219  if ( irq )
220    *irq = dev.irq;
221
222  return 0;
223}
224
225/* AMBA Plug&Play information */
226static struct ambapp_bus abus;
227static struct ambapp_mmap amba_maps[3];
228
229int rasta_register(void)
230{
231    unsigned int bar0, bar1, data;
232
233    unsigned int *page0 = NULL;
234    unsigned int *apb_base = NULL;
235    int found=0;
236
237
238    DBG("Searching for RASTA board ...");
239
240    /* Search PCI vendor/device id. */
241    if (BSP_pciFindDevice(0x1AC8, 0x0010, 0, &bus, &dev, &fun) == 0) {
242      found = 1;
243    }
244
245    /* Search old PCI vendor/device id. */
246    if ( (!found) && (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) {
247      found = 1;
248    }
249
250    /* Did we find a RASTA board? */
251    if ( !found )
252      return -1;
253
254    DBG(" found it (dev/fun: %d/%d).\n", dev, fun);
255
256    pci_read_config_dword(bus, dev, fun, 0x10, &bar0);
257    pci_read_config_dword(bus, dev, fun, 0x14, &bar1);
258
259    page0 = (unsigned int *)(bar0 + 0x400000);
260    *page0 = 0x80000000;                  /* Point PAGE0 to start of APB       */
261
262    apb_base = (unsigned int *)(bar0+APB2_OFFSET);
263
264/*  apb_base[0] = 0x000002ff;
265    apb_base[1] = 0x8a205260;
266    apb_base[2] = 0x00184000; */
267
268    /* Configure memory controller */
269#ifdef RASTA_SRAM
270    apb_base[0] = 0x000002ff;
271    apb_base[1] = 0x00001260;
272    apb_base[2] = 0x000e8000;
273#else
274    apb_base[0] = 0x000002ff;
275    apb_base[1] = 0x82206000;
276    apb_base[2] = 0x000e8000;
277#endif
278    /* Set up rasta irq controller */
279    irq = (struct irqmp_regs *) (bar0+IRQ_OFFSET);
280    irq->iclear = 0xffff;
281    irq->ilevel = 0;
282    irq->mask[0] = 0xffff & ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ);
283
284    /* Configure AT697 ioport bit 7 to input pci irq */
285    regs->PIO_Direction &= ~(1<<7);
286    regs->PIO_Interrupt  |= (0x87<<8);    /* level sensitive */
287
288    apb_base[0x100] |= 0x40000000;        /* Set GRPCI mmap 0x4 */
289    apb_base[0x104] =  0x40000000;        /* 0xA0000000;  Point PAGE1 to RAM */
290
291
292    /* set parity error response */
293    pci_read_config_dword(bus, dev, fun, 0x4, &data);
294    pci_write_config_dword(bus, dev, fun, 0x4, data|0x40);
295
296
297    pci_master_enable(bus, dev, fun);
298
299    /* install PCI interrupt vector */
300    /*    set_vector(pci_interrupt_handler,14+0x10, 1); */
301
302
303    /* install interrupt vector */
304    set_vector(rasta_interrupt_handler, RASTA_IRQ+0x10, 1);
305
306    /* Scan AMBA Plug&Play */
307
308    /* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */
309    amba_maps[0].size = 0x10000000;
310    amba_maps[0].local_adr = bar0;
311    amba_maps[0].remote_adr = 0x80000000;
312
313    /* AMBA MAP bar1 (in CPU) ==> 0x40000000(remote amba address) */
314    amba_maps[1].size = 0x10000000;
315    amba_maps[1].local_adr = bar1;
316    amba_maps[1].remote_adr = 0x40000000;
317
318    /* Mark end of table */
319    amba_maps[2].size=0;
320    amba_maps[2].local_adr = 0;
321    amba_maps[2].remote_adr = 0;
322
323    memset(&abus,0,sizeof(abus));
324
325    /* Start AMBA PnP scan at first AHB bus */
326    ambapp_scan(&abus, bar0 + (AHB1_IOAREA_BASE_ADDR & ~0xf0000000), NULL,
327                &amba_maps[0]);
328
329    printk("Registering RASTA GRCAN driver\n\r");
330
331    /*grhcan_register(bar0 + GRHCAN_OFFSET, bar1);*/
332    grcan_rasta_int_reg=rasta_interrrupt_register;
333    if ( grcan_rasta_ram_register(&abus,bar1+0x20000) ){
334      printk("Failed to register RASTA GRCAN driver\n\r");
335      return -1;
336    }
337
338    printk("Registering RASTA BRM driver\n\r");
339
340    /*brm_register(bar0   +  BRM_OFFSET, bar1);*/
341    /* register the BRM RASTA driver, use 128k on RASTA SRAM... */
342    b1553brm_rasta_int_reg=rasta_interrrupt_register;
343          if ( b1553brm_rasta_register(&abus,2,0,3,bar1,0x40000000) ){
344      printk("Failed to register BRM RASTA driver\n");
345      return -1;
346    }
347
348    /* provide the spacewire driver with AMBA Plug&Play
349     * info so that it can find the GRSPW cores.
350     */
351    grspw_rasta_int_reg=rasta_interrrupt_register;
352    if ( grspw_rasta_register(&abus,bar1) ){
353      printk("Failed to register RASTA GRSPW driver\n\r");
354      return -1;
355    }
356
357    /* provide the spacewire driver with AMBA Plug&Play
358     * info so that it can find the GRSPW cores.
359     */
360    apbuart_rasta_int_reg=rasta_interrrupt_register;
361    if ( apbuart_rasta_register(&abus) ){
362      printk("Failed to register RASTA APBUART driver\n\r");
363      return -1;
364    }
365
366    /* Find GPIO0 address */
367    if ( rasta_get_gpio(&abus,0,&gpio0,NULL) ){
368      printk("Failed to get address for RASTA GPIO0\n\r");
369      return -1;
370    }
371
372    /* Find GPIO1 address */
373    if ( rasta_get_gpio(&abus,1,&gpio1,NULL) ){
374      printk("Failed to get address for RASTA GPIO1\n\r");
375      return -1;
376    }
377
378    /* Successfully registered the RASTA board */
379    return 0;
380}
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