source: rtems/c/src/lib/libbsp/sparc/leon2/rasta/rasta.c @ 38386473

4.104.11
Last change on this file since 38386473 was 6f237224, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 30, 2007 at 4:51:00 PM

2007-11-30 Daniel Hellstrom <daniel@…>

  • rasta/rasta.c: LEON2 PCI RASTA driver. Changes RASTA PCI interrupt to 5 from 4. This is to avoid conflict with the LAN9C111 network MAC driver using interrupt 4.
  • Property mode set to 100644
File size: 10.4 KB
Line 
1/*
2 *  $Id$
3 */
4
5#include <rtems/bspIo.h>
6#include <pci.h>
7#include <rasta.h>
8#include <ambapp.h>
9#include <grcan_rasta.h>
10#include <grspw_rasta.h>
11#include <b1553brm_rasta.h>
12#include <apbuart_rasta.h>
13
14#include <string.h>
15
16/* If RASTA_SRAM is defined SRAM will be used, else SDRAM */
17/*#define RASTA_SRAM 1*/
18
19#define RASTA_IRQ  5
20
21/* Offset from 0x80000000 (dual bus version) */
22#define AHB1_IOAREA_BASE_ADDR 0x80100000
23#define APB2_OFFSET    0x200000
24#define IRQ_OFFSET     0x200500
25#define GRHCAN_OFFSET  0x201000
26#define BRM_OFFSET     0x100000
27#define SPW_OFFSET     0xa00
28#define UART_OFFSET    0x200200
29#define GPIO0_OFF      0x200600
30#define GPIO1_OFF      0x200700
31
32/* #define DEBUG 1 */
33
34#ifdef DEBUG
35#define DBG(x...) printk(x)
36#else
37#define DBG(x...)
38#endif
39
40/*
41typedef struct {
42  volatile unsigned int ilevel;
43  volatile unsigned int ipend;
44  volatile unsigned int iforce;
45  volatile unsigned int iclear;
46  volatile unsigned int mpstat;
47  volatile unsigned int notused01;
48  volatile unsigned int notused02;
49  volatile unsigned int notused03;
50  volatile unsigned int notused10;
51  volatile unsigned int notused11;
52  volatile unsigned int notused12;
53  volatile unsigned int notused13;
54  volatile unsigned int notused20;
55  volatile unsigned int notused21;
56  volatile unsigned int notused22;
57  volatile unsigned int notused23;
58  volatile unsigned int mask[16];
59  volatile unsigned int force[16];
60} LEON3_IrqCtrl_Regs_Map;
61*/
62static int bus, dev, fun;
63
64LEON3_IrqCtrl_Regs_Map *irq = NULL;
65LEON_Register_Map      *regs = (LEON_Register_Map *)0x80000000;
66
67struct gpio_reg *gpio0, *gpio1;
68
69/* static rtems_isr pci_interrupt_handler (rtems_vector_number v) { */
70
71/*     volatile unsigned int *pci_int = (volatile unsigned int *) 0x80000168; */
72/*     volatile unsigned int *pci_mem = (volatile unsigned int *) 0xb0400000; */
73
74/*     if (*pci_int & 0x20) { */
75       
76/*         *pci_int = 0x20; */
77
78/*         *pci_mem = 0; */
79
80/*         printk("pci died\n"); */
81
82/*     } */
83
84/* } */
85
86void *uart0_int_arg, *uart1_int_arg;
87void *spw0_int_arg, *spw1_int_arg, *spw2_int_arg;
88void *grcan_int_arg;
89void *brm_int_arg;
90
91void (*uart0_int_handler)(int irq, void *arg) = NULL;
92void (*uart1_int_handler)(int irq, void *arg) = NULL;
93void (*spw0_int_handler)(int irq, void *arg) = NULL;
94void (*spw1_int_handler)(int irq, void *arg) = NULL;
95void (*spw2_int_handler)(int irq, void *arg) = NULL;
96void (*grcan_int_handler)(int irq, void *arg) = NULL;
97void (*brm_int_handler)(int irq, void *arg) = NULL;
98
99static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
100{
101    unsigned int status;
102 
103    status = irq->ipend;
104
105    if ( (status & GRCAN_IRQ) && grcan_int_handler ) {
106      grcan_int_handler(GRCAN_IRQNO,grcan_int_arg);
107    }
108   
109    if (status & SPW_IRQ) {
110      if ( (status & SPW0_IRQ) && spw0_int_handler ){
111        spw0_int_handler(SPW0_IRQNO,spw0_int_arg);
112      }
113
114      if ( (status & SPW1_IRQ) && spw1_int_handler ){
115        spw1_int_handler(SPW1_IRQNO,spw1_int_arg);
116      }
117     
118      if ( (status & SPW2_IRQ) && spw2_int_handler ){
119        spw2_int_handler(SPW2_IRQNO,spw2_int_arg);
120      }
121    }
122    if ((status & BRM_IRQ) && brm_int_handler ){ 
123        brm_int_handler(BRM_IRQNO,brm_int_arg);
124    }
125    if ( (status & UART0_IRQ) && uart0_int_handler ) {
126      uart0_int_handler(UART0_IRQNO,uart0_int_arg);
127    }
128    if ( (status & UART1_IRQ) && uart1_int_handler) {
129      uart1_int_handler(UART1_IRQNO,uart1_int_arg);
130    }
131   
132    DBG("RASTA-IRQ: 0x%x\n",status);
133    irq->iclear = status;
134 
135}
136
137void rasta_interrrupt_register(void *handler, int irqno, void *arg)
138{
139  DBG("RASTA: Registering irq %d\n",irqno);
140  if ( irqno == UART0_IRQNO ){
141    DBG("RASTA: Registering uart0 handler: 0x%x, arg: 0x%x\n",handler,arg);
142    uart0_int_handler = handler;
143    uart0_int_arg = arg;
144   
145    /* unmask interrupt source */
146    irq->iclear = UART0_IRQ;
147    irq->mask[0] |= UART0_IRQ;
148  }
149 
150  if ( irqno == UART1_IRQNO ){
151    DBG("RASTA: Registering uart1 handler: 0x%x, arg: 0x%x\n",handler,arg);
152    uart1_int_handler = handler;
153    uart1_int_arg = arg;
154   
155    /* unmask interrupt source */
156    irq->iclear = UART1_IRQ;
157    irq->mask[0] |= UART1_IRQ;
158  }
159 
160  if ( irqno == SPW0_IRQNO ){
161    DBG("RASTA: Registering spw0 handler: 0x%x, arg: 0x%x\n",handler,arg);
162    spw0_int_handler = handler;
163    spw0_int_arg = arg;
164   
165    /* unmask interrupt source */
166    irq->iclear = SPW0_IRQ;
167    irq->mask[0] |= SPW0_IRQ;
168  }
169
170  if ( irqno == SPW1_IRQNO ){
171    DBG("RASTA: Registering spw1 handler: 0x%x, arg: 0x%x\n",handler,arg);
172    spw1_int_handler = handler;
173    spw1_int_arg = arg;
174   
175    /* unmask interrupt source */
176    irq->iclear = SPW1_IRQ;
177    irq->mask[0] |= SPW1_IRQ;
178  }
179 
180  if ( irqno == SPW2_IRQNO ){
181    DBG("RASTA: Registering spw2 handler: 0x%x, arg: 0x%x\n",handler,arg);
182    spw2_int_handler = handler;
183    spw2_int_arg = arg;
184   
185    /* unmask interrupt source */
186    irq->iclear = SPW2_IRQ;
187    irq->mask[0] |= SPW2_IRQ;
188  }
189 
190  if ( irqno == GRCAN_IRQNO ){
191    DBG("RASTA: Registering GRCAN handler: 0x%x, arg: 0x%x\n",handler,arg);
192    grcan_int_handler = handler;
193    grcan_int_arg = arg;
194   
195    /* unmask interrupt source */
196    irq->iclear = GRCAN_IRQ;
197    irq->mask[0] |= GRCAN_IRQ;
198  }
199 
200  if ( irqno == BRM_IRQNO ){
201    DBG("RASTA: Registering BRM handler: 0x%x, arg: 0x%x\n",handler,arg);
202    brm_int_handler = handler;
203    brm_int_arg = arg;
204   
205    /* unmask interrupt source */
206    irq->iclear = BRM_IRQ;
207    irq->mask[0] |= BRM_IRQ;
208  } 
209}
210
211
212int rasta_get_gpio(amba_confarea_type *abus, int index, struct gpio_reg **regs, int *irq)
213{
214  amba_apb_device dev;
215  int cores;
216 
217  if ( !abus ) 
218    return -1;
219 
220  /* Scan PnP info for GPIO port number 'index' */
221  cores = amba_find_next_apbslv(abus,VENDOR_GAISLER,GAISLER_PIOPORT,&dev,index);
222  if ( cores < 1 )
223    return -1;
224 
225  if ( regs )
226    *regs = (struct gpio_reg *)dev.start;
227 
228  if ( irq )
229    *irq = dev.irq;
230 
231  return 0;
232}
233
234/* AMBA Plug&Play information */
235static amba_confarea_type abus;
236static struct amba_mmap amba_maps[3];
237
238int rasta_register(void) 
239{
240    unsigned int bar0, bar1, data;
241
242    unsigned int *page0 = NULL;
243    unsigned int *apb_base = NULL;
244    int found=0;
245   
246
247    DBG("Searching for RASTA board ...");
248   
249    /* Search PCI vendor/device id. */
250    if (BSP_pciFindDevice(0x1AC8, 0x0010, 0, &bus, &dev, &fun) == 0) {
251      found = 1;
252    }
253   
254    /* Search old PCI vendor/device id. */
255    if ( (!found) && (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) {
256      found = 1;
257    }
258   
259    /* Did we find a RASTA board? */
260    if ( !found )
261      return -1;
262   
263    DBG(" found it (dev/fun: %d/%d).\n", dev, fun);
264
265    pci_read_config_dword(bus, dev, fun, 0x10, &bar0);
266    pci_read_config_dword(bus, dev, fun, 0x14, &bar1);
267
268    page0 = (unsigned int *)(bar0 + 0x400000); 
269    *page0 = 0x80000000;                  /* Point PAGE0 to start of APB       */
270
271    apb_base = (unsigned int *)(bar0+APB2_OFFSET);
272
273/*  apb_base[0] = 0x000002ff;
274    apb_base[1] = 0x8a205260;
275    apb_base[2] = 0x00184000; */
276
277    /* Configure memory controller */
278#ifdef RASTA_SRAM
279    apb_base[0] = 0x000002ff;
280    apb_base[1] = 0x00001260;
281    apb_base[2] = 0x000e8000;
282#else
283    apb_base[0] = 0x000002ff;
284    apb_base[1] = 0x82206000;
285    apb_base[2] = 0x000e8000;
286#endif
287    /* Set up rasta irq controller */
288    irq = (LEON3_IrqCtrl_Regs_Map *) (bar0+IRQ_OFFSET); 
289    irq->iclear = 0xffff;
290    irq->ilevel = 0;
291    irq->mask[0] = 0xffff & ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ);
292
293    /* Configure AT697 ioport bit 7 to input pci irq */
294    regs->PIO_Direction &= ~(1<<7);
295    regs->PIO_Interrupt  |= (0x87<<8);    /* level sensitive */
296
297    apb_base[0x100] |= 0x40000000;        /* Set GRPCI mmap 0x4 */
298    apb_base[0x104] =  0x40000000;        /* 0xA0000000;  Point PAGE1 to RAM */
299
300   
301    /* set parity error response */
302    pci_read_config_dword(bus, dev, fun, 0x4, &data);
303    pci_write_config_dword(bus, dev, fun, 0x4, data|0x40);
304
305     
306    pci_master_enable(bus, dev, fun);
307
308    /* install PCI interrupt vector */
309    /*    set_vector(pci_interrupt_handler,14+0x10, 1); */
310
311     
312    /* install interrupt vector */
313    set_vector(rasta_interrupt_handler, RASTA_IRQ+0x10, 1);
314
315    /* Scan AMBA Plug&Play */
316       
317    /* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */
318    amba_maps[0].size = 0x10000000;
319    amba_maps[0].cpu_adr = bar0;
320    amba_maps[0].remote_amba_adr = 0x80000000;
321
322    /* AMBA MAP bar1 (in CPU) ==> 0x40000000(remote amba address) */
323    amba_maps[1].size = 0x10000000;
324    amba_maps[1].cpu_adr = bar1;
325    amba_maps[1].remote_amba_adr = 0x40000000;
326
327    /* Mark end of table */
328    amba_maps[2].size=0;
329    amba_maps[2].cpu_adr = 0;
330    amba_maps[2].remote_amba_adr = 0;
331       
332    memset(&abus,0,sizeof(abus));
333       
334    /* Start AMBA PnP scan at first AHB bus */
335    amba_scan(&abus,bar0+(AHB1_IOAREA_BASE_ADDR&~0xf0000000),&amba_maps[0]);
336       
337    printk("Registering RASTA GRCAN driver\n\r");
338   
339    /*grhcan_register(bar0 + GRHCAN_OFFSET, bar1);*/
340    grcan_rasta_int_reg=rasta_interrrupt_register;
341    if ( grcan_rasta_ram_register(&abus,bar1+0x20000) ){
342      printk("Failed to register RASTA GRCAN driver\n\r");
343      return -1;
344    }
345
346    printk("Registering RASTA BRM driver\n\r");
347
348    /*brm_register(bar0   +  BRM_OFFSET, bar1);*/
349    /* register the BRM RASTA driver, use 128k on RASTA SRAM... */
350    b1553brm_rasta_int_reg=rasta_interrrupt_register;
351          if ( b1553brm_rasta_register(&abus,2,0,3,bar1,0x40000000) ){
352      printk("Failed to register BRM RASTA driver\n");
353      return -1;
354    }
355       
356    /* provide the spacewire driver with AMBA Plug&Play
357     * info so that it can find the GRSPW cores.
358     */
359    grspw_rasta_int_reg=rasta_interrrupt_register;
360    if ( grspw_rasta_register(&abus,bar1) ){
361      printk("Failed to register RASTA GRSPW driver\n\r");
362      return -1;
363    }
364
365    /* provide the spacewire driver with AMBA Plug&Play
366     * info so that it can find the GRSPW cores.
367     */
368    apbuart_rasta_int_reg=rasta_interrrupt_register;
369    if ( apbuart_rasta_register(&abus) ){
370      printk("Failed to register RASTA APBUART driver\n\r");
371      return -1;
372    }
373
374    /* Find GPIO0 address */
375    if ( rasta_get_gpio(&abus,0,&gpio0,NULL) ){
376      printk("Failed to get address for RASTA GPIO0\n\r");
377      return -1;
378    }
379       
380    /* Find GPIO1 address */
381    if ( rasta_get_gpio(&abus,1,&gpio1,NULL) ){
382      printk("Failed to get address for RASTA GPIO1\n\r");
383      return -1;
384    }
385   
386    /* Successfully registered the RASTA board */
387    return 0;
388}
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