1 | /* |
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2 | * $Id$ |
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3 | */ |
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4 | |
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5 | #include <rtems/bspIo.h> |
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6 | #include <pci.h> |
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7 | #include <rasta.h> |
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8 | #include <ambapp.h> |
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9 | #include <grcan_rasta.h> |
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10 | #include <grspw_rasta.h> |
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11 | #include <b1553brm_rasta.h> |
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12 | #include <apbuart_rasta.h> |
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13 | |
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14 | #include <string.h> |
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15 | |
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16 | /* If RASTA_SRAM is defined SRAM will be used, else SDRAM */ |
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17 | /*#define RASTA_SRAM 1*/ |
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18 | |
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19 | #define RASTA_IRQ 5 |
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20 | |
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21 | /* Offset from 0x80000000 (dual bus version) */ |
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22 | #define AHB1_IOAREA_BASE_ADDR 0x80100000 |
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23 | #define APB2_OFFSET 0x200000 |
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24 | #define IRQ_OFFSET 0x200500 |
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25 | #define GRHCAN_OFFSET 0x201000 |
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26 | #define BRM_OFFSET 0x100000 |
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27 | #define SPW_OFFSET 0xa00 |
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28 | #define UART_OFFSET 0x200200 |
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29 | #define GPIO0_OFF 0x200600 |
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30 | #define GPIO1_OFF 0x200700 |
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31 | |
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32 | /* #define DEBUG 1 */ |
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33 | |
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34 | #ifdef DEBUG |
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35 | #define DBG(x...) printk(x) |
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36 | #else |
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37 | #define DBG(x...) |
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38 | #endif |
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39 | |
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40 | /* |
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41 | typedef struct { |
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42 | volatile unsigned int ilevel; |
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43 | volatile unsigned int ipend; |
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44 | volatile unsigned int iforce; |
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45 | volatile unsigned int iclear; |
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46 | volatile unsigned int mpstat; |
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47 | volatile unsigned int notused01; |
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48 | volatile unsigned int notused02; |
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49 | volatile unsigned int notused03; |
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50 | volatile unsigned int notused10; |
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51 | volatile unsigned int notused11; |
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52 | volatile unsigned int notused12; |
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53 | volatile unsigned int notused13; |
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54 | volatile unsigned int notused20; |
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55 | volatile unsigned int notused21; |
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56 | volatile unsigned int notused22; |
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57 | volatile unsigned int notused23; |
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58 | volatile unsigned int mask[16]; |
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59 | volatile unsigned int force[16]; |
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60 | } LEON3_IrqCtrl_Regs_Map; |
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61 | */ |
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62 | static int bus, dev, fun; |
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63 | |
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64 | LEON3_IrqCtrl_Regs_Map *irq = NULL; |
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65 | LEON_Register_Map *regs = (LEON_Register_Map *)0x80000000; |
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66 | |
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67 | struct gpio_reg *gpio0, *gpio1; |
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68 | |
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69 | /* static rtems_isr pci_interrupt_handler (rtems_vector_number v) { */ |
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70 | |
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71 | /* volatile unsigned int *pci_int = (volatile unsigned int *) 0x80000168; */ |
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72 | /* volatile unsigned int *pci_mem = (volatile unsigned int *) 0xb0400000; */ |
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73 | |
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74 | /* if (*pci_int & 0x20) { */ |
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75 | |
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76 | /* *pci_int = 0x20; */ |
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77 | |
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78 | /* *pci_mem = 0; */ |
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79 | |
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80 | /* printk("pci died\n"); */ |
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81 | |
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82 | /* } */ |
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83 | |
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84 | /* } */ |
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85 | |
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86 | void *uart0_int_arg, *uart1_int_arg; |
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87 | void *spw0_int_arg, *spw1_int_arg, *spw2_int_arg; |
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88 | void *grcan_int_arg; |
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89 | void *brm_int_arg; |
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90 | |
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91 | void (*uart0_int_handler)(int irq, void *arg) = NULL; |
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92 | void (*uart1_int_handler)(int irq, void *arg) = NULL; |
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93 | void (*spw0_int_handler)(int irq, void *arg) = NULL; |
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94 | void (*spw1_int_handler)(int irq, void *arg) = NULL; |
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95 | void (*spw2_int_handler)(int irq, void *arg) = NULL; |
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96 | void (*grcan_int_handler)(int irq, void *arg) = NULL; |
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97 | void (*brm_int_handler)(int irq, void *arg) = NULL; |
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98 | |
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99 | static rtems_isr rasta_interrupt_handler (rtems_vector_number v) |
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100 | { |
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101 | unsigned int status; |
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102 | |
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103 | status = irq->ipend; |
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104 | |
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105 | if ( (status & GRCAN_IRQ) && grcan_int_handler ) { |
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106 | grcan_int_handler(GRCAN_IRQNO,grcan_int_arg); |
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107 | } |
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108 | |
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109 | if (status & SPW_IRQ) { |
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110 | if ( (status & SPW0_IRQ) && spw0_int_handler ){ |
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111 | spw0_int_handler(SPW0_IRQNO,spw0_int_arg); |
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112 | } |
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113 | |
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114 | if ( (status & SPW1_IRQ) && spw1_int_handler ){ |
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115 | spw1_int_handler(SPW1_IRQNO,spw1_int_arg); |
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116 | } |
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117 | |
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118 | if ( (status & SPW2_IRQ) && spw2_int_handler ){ |
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119 | spw2_int_handler(SPW2_IRQNO,spw2_int_arg); |
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120 | } |
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121 | } |
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122 | if ((status & BRM_IRQ) && brm_int_handler ){ |
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123 | brm_int_handler(BRM_IRQNO,brm_int_arg); |
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124 | } |
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125 | if ( (status & UART0_IRQ) && uart0_int_handler ) { |
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126 | uart0_int_handler(UART0_IRQNO,uart0_int_arg); |
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127 | } |
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128 | if ( (status & UART1_IRQ) && uart1_int_handler) { |
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129 | uart1_int_handler(UART1_IRQNO,uart1_int_arg); |
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130 | } |
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131 | |
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132 | DBG("RASTA-IRQ: 0x%x\n",status); |
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133 | irq->iclear = status; |
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134 | |
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135 | } |
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136 | |
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137 | void rasta_interrrupt_register(void *handler, int irqno, void *arg) |
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138 | { |
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139 | DBG("RASTA: Registering irq %d\n",irqno); |
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140 | if ( irqno == UART0_IRQNO ){ |
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141 | DBG("RASTA: Registering uart0 handler: 0x%x, arg: 0x%x\n",handler,arg); |
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142 | uart0_int_handler = handler; |
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143 | uart0_int_arg = arg; |
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144 | |
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145 | /* unmask interrupt source */ |
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146 | irq->iclear = UART0_IRQ; |
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147 | irq->mask[0] |= UART0_IRQ; |
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148 | } |
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149 | |
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150 | if ( irqno == UART1_IRQNO ){ |
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151 | DBG("RASTA: Registering uart1 handler: 0x%x, arg: 0x%x\n",handler,arg); |
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152 | uart1_int_handler = handler; |
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153 | uart1_int_arg = arg; |
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154 | |
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155 | /* unmask interrupt source */ |
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156 | irq->iclear = UART1_IRQ; |
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157 | irq->mask[0] |= UART1_IRQ; |
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158 | } |
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159 | |
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160 | if ( irqno == SPW0_IRQNO ){ |
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161 | DBG("RASTA: Registering spw0 handler: 0x%x, arg: 0x%x\n",handler,arg); |
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162 | spw0_int_handler = handler; |
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163 | spw0_int_arg = arg; |
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164 | |
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165 | /* unmask interrupt source */ |
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166 | irq->iclear = SPW0_IRQ; |
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167 | irq->mask[0] |= SPW0_IRQ; |
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168 | } |
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169 | |
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170 | if ( irqno == SPW1_IRQNO ){ |
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171 | DBG("RASTA: Registering spw1 handler: 0x%x, arg: 0x%x\n",handler,arg); |
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172 | spw1_int_handler = handler; |
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173 | spw1_int_arg = arg; |
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174 | |
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175 | /* unmask interrupt source */ |
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176 | irq->iclear = SPW1_IRQ; |
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177 | irq->mask[0] |= SPW1_IRQ; |
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178 | } |
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179 | |
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180 | if ( irqno == SPW2_IRQNO ){ |
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181 | DBG("RASTA: Registering spw2 handler: 0x%x, arg: 0x%x\n",handler,arg); |
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182 | spw2_int_handler = handler; |
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183 | spw2_int_arg = arg; |
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184 | |
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185 | /* unmask interrupt source */ |
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186 | irq->iclear = SPW2_IRQ; |
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187 | irq->mask[0] |= SPW2_IRQ; |
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188 | } |
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189 | |
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190 | if ( irqno == GRCAN_IRQNO ){ |
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191 | DBG("RASTA: Registering GRCAN handler: 0x%x, arg: 0x%x\n",handler,arg); |
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192 | grcan_int_handler = handler; |
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193 | grcan_int_arg = arg; |
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194 | |
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195 | /* unmask interrupt source */ |
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196 | irq->iclear = GRCAN_IRQ; |
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197 | irq->mask[0] |= GRCAN_IRQ; |
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198 | } |
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199 | |
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200 | if ( irqno == BRM_IRQNO ){ |
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201 | DBG("RASTA: Registering BRM handler: 0x%x, arg: 0x%x\n",handler,arg); |
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202 | brm_int_handler = handler; |
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203 | brm_int_arg = arg; |
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204 | |
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205 | /* unmask interrupt source */ |
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206 | irq->iclear = BRM_IRQ; |
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207 | irq->mask[0] |= BRM_IRQ; |
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208 | } |
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209 | } |
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210 | |
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211 | |
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212 | int rasta_get_gpio(amba_confarea_type *abus, int index, struct gpio_reg **regs, int *irq) |
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213 | { |
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214 | amba_apb_device dev; |
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215 | int cores; |
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216 | |
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217 | if ( !abus ) |
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218 | return -1; |
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219 | |
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220 | /* Scan PnP info for GPIO port number 'index' */ |
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221 | cores = amba_find_next_apbslv(abus,VENDOR_GAISLER,GAISLER_PIOPORT,&dev,index); |
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222 | if ( cores < 1 ) |
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223 | return -1; |
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224 | |
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225 | if ( regs ) |
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226 | *regs = (struct gpio_reg *)dev.start; |
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227 | |
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228 | if ( irq ) |
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229 | *irq = dev.irq; |
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230 | |
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231 | return 0; |
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232 | } |
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233 | |
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234 | /* AMBA Plug&Play information */ |
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235 | static amba_confarea_type abus; |
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236 | static struct amba_mmap amba_maps[3]; |
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237 | |
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238 | int rasta_register(void) |
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239 | { |
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240 | unsigned int bar0, bar1, data; |
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241 | |
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242 | unsigned int *page0 = NULL; |
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243 | unsigned int *apb_base = NULL; |
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244 | int found=0; |
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245 | |
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246 | |
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247 | DBG("Searching for RASTA board ..."); |
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248 | |
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249 | /* Search PCI vendor/device id. */ |
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250 | if (BSP_pciFindDevice(0x1AC8, 0x0010, 0, &bus, &dev, &fun) == 0) { |
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251 | found = 1; |
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252 | } |
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253 | |
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254 | /* Search old PCI vendor/device id. */ |
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255 | if ( (!found) && (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) { |
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256 | found = 1; |
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257 | } |
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258 | |
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259 | /* Did we find a RASTA board? */ |
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260 | if ( !found ) |
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261 | return -1; |
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262 | |
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263 | DBG(" found it (dev/fun: %d/%d).\n", dev, fun); |
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264 | |
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265 | pci_read_config_dword(bus, dev, fun, 0x10, &bar0); |
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266 | pci_read_config_dword(bus, dev, fun, 0x14, &bar1); |
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267 | |
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268 | page0 = (unsigned int *)(bar0 + 0x400000); |
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269 | *page0 = 0x80000000; /* Point PAGE0 to start of APB */ |
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270 | |
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271 | apb_base = (unsigned int *)(bar0+APB2_OFFSET); |
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272 | |
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273 | /* apb_base[0] = 0x000002ff; |
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274 | apb_base[1] = 0x8a205260; |
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275 | apb_base[2] = 0x00184000; */ |
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276 | |
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277 | /* Configure memory controller */ |
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278 | #ifdef RASTA_SRAM |
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279 | apb_base[0] = 0x000002ff; |
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280 | apb_base[1] = 0x00001260; |
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281 | apb_base[2] = 0x000e8000; |
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282 | #else |
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283 | apb_base[0] = 0x000002ff; |
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284 | apb_base[1] = 0x82206000; |
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285 | apb_base[2] = 0x000e8000; |
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286 | #endif |
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287 | /* Set up rasta irq controller */ |
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288 | irq = (LEON3_IrqCtrl_Regs_Map *) (bar0+IRQ_OFFSET); |
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289 | irq->iclear = 0xffff; |
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290 | irq->ilevel = 0; |
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291 | irq->mask[0] = 0xffff & ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ); |
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292 | |
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293 | /* Configure AT697 ioport bit 7 to input pci irq */ |
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294 | regs->PIO_Direction &= ~(1<<7); |
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295 | regs->PIO_Interrupt |= (0x87<<8); /* level sensitive */ |
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296 | |
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297 | apb_base[0x100] |= 0x40000000; /* Set GRPCI mmap 0x4 */ |
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298 | apb_base[0x104] = 0x40000000; /* 0xA0000000; Point PAGE1 to RAM */ |
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299 | |
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300 | |
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301 | /* set parity error response */ |
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302 | pci_read_config_dword(bus, dev, fun, 0x4, &data); |
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303 | pci_write_config_dword(bus, dev, fun, 0x4, data|0x40); |
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304 | |
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305 | |
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306 | pci_master_enable(bus, dev, fun); |
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307 | |
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308 | /* install PCI interrupt vector */ |
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309 | /* set_vector(pci_interrupt_handler,14+0x10, 1); */ |
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310 | |
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311 | |
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312 | /* install interrupt vector */ |
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313 | set_vector(rasta_interrupt_handler, RASTA_IRQ+0x10, 1); |
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314 | |
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315 | /* Scan AMBA Plug&Play */ |
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316 | |
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317 | /* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */ |
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318 | amba_maps[0].size = 0x10000000; |
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319 | amba_maps[0].cpu_adr = bar0; |
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320 | amba_maps[0].remote_amba_adr = 0x80000000; |
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321 | |
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322 | /* AMBA MAP bar1 (in CPU) ==> 0x40000000(remote amba address) */ |
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323 | amba_maps[1].size = 0x10000000; |
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324 | amba_maps[1].cpu_adr = bar1; |
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325 | amba_maps[1].remote_amba_adr = 0x40000000; |
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326 | |
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327 | /* Mark end of table */ |
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328 | amba_maps[2].size=0; |
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329 | amba_maps[2].cpu_adr = 0; |
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330 | amba_maps[2].remote_amba_adr = 0; |
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331 | |
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332 | memset(&abus,0,sizeof(abus)); |
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333 | |
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334 | /* Start AMBA PnP scan at first AHB bus */ |
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335 | amba_scan(&abus,bar0+(AHB1_IOAREA_BASE_ADDR&~0xf0000000),&amba_maps[0]); |
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336 | |
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337 | printk("Registering RASTA GRCAN driver\n\r"); |
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338 | |
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339 | /*grhcan_register(bar0 + GRHCAN_OFFSET, bar1);*/ |
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340 | grcan_rasta_int_reg=rasta_interrrupt_register; |
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341 | if ( grcan_rasta_ram_register(&abus,bar1+0x20000) ){ |
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342 | printk("Failed to register RASTA GRCAN driver\n\r"); |
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343 | return -1; |
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344 | } |
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345 | |
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346 | printk("Registering RASTA BRM driver\n\r"); |
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347 | |
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348 | /*brm_register(bar0 + BRM_OFFSET, bar1);*/ |
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349 | /* register the BRM RASTA driver, use 128k on RASTA SRAM... */ |
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350 | b1553brm_rasta_int_reg=rasta_interrrupt_register; |
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351 | if ( b1553brm_rasta_register(&abus,2,0,3,bar1,0x40000000) ){ |
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352 | printk("Failed to register BRM RASTA driver\n"); |
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353 | return -1; |
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354 | } |
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355 | |
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356 | /* provide the spacewire driver with AMBA Plug&Play |
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357 | * info so that it can find the GRSPW cores. |
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358 | */ |
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359 | grspw_rasta_int_reg=rasta_interrrupt_register; |
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360 | if ( grspw_rasta_register(&abus,bar1) ){ |
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361 | printk("Failed to register RASTA GRSPW driver\n\r"); |
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362 | return -1; |
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363 | } |
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364 | |
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365 | /* provide the spacewire driver with AMBA Plug&Play |
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366 | * info so that it can find the GRSPW cores. |
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367 | */ |
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368 | apbuart_rasta_int_reg=rasta_interrrupt_register; |
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369 | if ( apbuart_rasta_register(&abus) ){ |
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370 | printk("Failed to register RASTA APBUART driver\n\r"); |
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371 | return -1; |
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372 | } |
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373 | |
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374 | /* Find GPIO0 address */ |
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375 | if ( rasta_get_gpio(&abus,0,&gpio0,NULL) ){ |
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376 | printk("Failed to get address for RASTA GPIO0\n\r"); |
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377 | return -1; |
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378 | } |
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379 | |
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380 | /* Find GPIO1 address */ |
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381 | if ( rasta_get_gpio(&abus,1,&gpio1,NULL) ){ |
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382 | printk("Failed to get address for RASTA GPIO1\n\r"); |
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383 | return -1; |
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384 | } |
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385 | |
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386 | /* Successfully registered the RASTA board */ |
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387 | return 0; |
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388 | } |
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