[8d830fae] | 1 | /** |
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| 2 | * @file |
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| 3 | * @ingroup sparc_leon2 |
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| 4 | * @brief Implementations for interrupt mechanisms for Time Test 27 |
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| 5 | */ |
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| 6 | |
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[bec7ba52] | 7 | /* |
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| 8 | * tm27.h |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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| 12 | * http://www.rtems.com/license/LICENSE. |
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| 13 | */ |
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| 14 | |
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| 15 | #ifndef _RTEMS_TMTEST27 |
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| 16 | #error "This is an RTEMS internal file you must not include directly." |
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| 17 | #endif |
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| 18 | |
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| 19 | #ifndef __tm27_h |
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| 20 | #define __tm27_h |
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| 21 | |
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| 22 | /* |
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| 23 | * Define the interrupt mechanism for Time Test 27 |
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| 24 | * |
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| 25 | * NOTE: Since the interrupt code for the SPARC supports both synchronous |
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| 26 | * and asynchronous trap handlers, support for testing with both |
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| 27 | * is included. |
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| 28 | */ |
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| 29 | |
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| 30 | #define SIS_USE_SYNCHRONOUS_TRAP 0 |
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| 31 | |
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| 32 | /* |
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| 33 | * The synchronous trap is an arbitrarily chosen software trap. |
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| 34 | */ |
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| 35 | |
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| 36 | #if (SIS_USE_SYNCHRONOUS_TRAP == 1) |
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| 37 | |
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| 38 | #define TEST_VECTOR SPARC_SYNCHRONOUS_TRAP( 0x90 ) |
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| 39 | |
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| 40 | #define MUST_WAIT_FOR_INTERRUPT 1 |
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| 41 | |
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| 42 | #define Install_tm27_vector( handler ) \ |
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| 43 | set_vector( (handler), TEST_VECTOR, 1 ); |
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| 44 | |
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| 45 | #define Cause_tm27_intr() \ |
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[69722335] | 46 | __asm__ volatile( "ta 0x10; nop " ); |
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[bec7ba52] | 47 | |
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| 48 | #define Clear_tm27_intr() /* empty */ |
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| 49 | |
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| 50 | #define Lower_tm27_intr() /* empty */ |
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| 51 | |
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| 52 | /* |
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| 53 | * The asynchronous trap is an arbitrarily chosen ERC32 interrupt source. |
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| 54 | */ |
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| 55 | |
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| 56 | #else /* use a regular asynchronous trap */ |
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| 57 | |
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| 58 | #define TEST_INTERRUPT_SOURCE LEON_INTERRUPT_EXTERNAL_1 |
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| 59 | #define TEST_VECTOR LEON_TRAP_TYPE( TEST_INTERRUPT_SOURCE ) |
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| 60 | #define TEST_INTERRUPT_SOURCE2 LEON_INTERRUPT_EXTERNAL_1+1 |
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| 61 | #define TEST_VECTOR2 LEON_TRAP_TYPE( TEST_INTERRUPT_SOURCE2 ) |
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| 62 | #define MUST_WAIT_FOR_INTERRUPT 1 |
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| 63 | |
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| 64 | #define Install_tm27_vector( handler ) \ |
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| 65 | set_vector( (handler), TEST_VECTOR, 1 ); \ |
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| 66 | set_vector( (handler), TEST_VECTOR2, 1 ); |
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| 67 | |
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| 68 | #define Cause_tm27_intr() \ |
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| 69 | do { \ |
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| 70 | LEON_Force_interrupt( TEST_INTERRUPT_SOURCE+(Interrupt_nest>>1)); \ |
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| 71 | nop(); \ |
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| 72 | nop(); \ |
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| 73 | nop(); \ |
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| 74 | } while (0) |
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| 75 | |
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| 76 | #define Clear_tm27_intr() \ |
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| 77 | LEON_Clear_interrupt( TEST_INTERRUPT_SOURCE ) |
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| 78 | |
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| 79 | #define Lower_tm27_intr() /* empty */ |
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| 80 | |
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| 81 | #endif |
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| 82 | |
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| 83 | #endif |
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