[ee8933f2] | 1 | #ifndef __RASTA_H__ |
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| 2 | #define __RASTA_H__ |
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| 3 | |
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| 4 | #include <bsp.h> |
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| 5 | |
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| 6 | #include <grcan.h> |
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| 7 | #include <b1553brm_rasta.h> |
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| 8 | #include <grspw.h> |
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| 9 | |
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| 10 | #ifdef __cplusplus |
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| 11 | extern "C" { |
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| 12 | #endif |
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| 13 | |
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| 14 | extern int rasta_register(void); |
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| 15 | |
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| 16 | /* Address of PCI bus on RASTA local AMBA bus */ |
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| 17 | #define RASTA_PCI_BASE 0xe0000000 |
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| 18 | |
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| 19 | /* Address of SRAM on RASTA local AMBA bus */ |
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| 20 | #define RASTA_LOCAL_SRAM 0x40000000 |
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| 21 | |
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| 22 | #define UART0_IRQNO 2 |
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| 23 | #define UART1_IRQNO 3 |
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| 24 | #define GRCAN_IRQNO 7 |
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| 25 | #define SPW0_IRQNO 10 |
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| 26 | #define SPW1_IRQNO 11 |
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| 27 | #define SPW2_IRQNO 12 |
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| 28 | #define BRM_IRQNO 13 |
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| 29 | |
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| 30 | #define GRCAN_IRQ (3<<GRCAN_IRQNO) |
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| 31 | #define SPW0_IRQ (1<<SPW0_IRQNO) |
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| 32 | #define SPW1_IRQ (1<<SPW1_IRQNO) |
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| 33 | #define SPW2_IRQ (1<<SPW2_IRQNO) |
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| 34 | #define SPW_IRQ (7<<SPW0_IRQNO) |
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| 35 | #define BRM_IRQ (1<<BRM_IRQNO) |
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| 36 | #define UART0_IRQ (1<<UART0_IRQNO) |
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| 37 | #define UART1_IRQ (1<<UART1_IRQNO) |
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| 38 | |
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| 39 | /* |
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| 40 | * The following defines the bits in the UART Control Registers. |
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| 41 | * |
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| 42 | */ |
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[44b06ca] | 43 | #define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ |
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| 44 | |
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[ee8933f2] | 45 | /* |
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| 46 | * The following defines the bits in the LEON UART Status Registers. |
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| 47 | */ |
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| 48 | #define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */ |
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| 49 | #define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */ |
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| 50 | #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */ |
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| 51 | #define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */ |
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| 52 | #define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */ |
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| 53 | #define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */ |
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| 54 | #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */ |
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| 55 | #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */ |
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| 56 | |
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[44b06ca] | 57 | |
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[ee8933f2] | 58 | /* |
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| 59 | * The following defines the bits in the LEON UART Status Registers. |
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| 60 | */ |
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| 61 | #define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */ |
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| 62 | #define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */ |
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| 63 | #define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */ |
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| 64 | #define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter interrupt enable */ |
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| 65 | #define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */ |
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| 66 | #define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */ |
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| 67 | #define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */ |
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| 68 | #define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */ |
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| 69 | |
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| 70 | #define UART_SET_SCALER 0 |
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| 71 | #define UART_SET_CTRL 1 |
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| 72 | #define UART_GET_STAT 2 |
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| 73 | #define UART_CLR_STAT 3 |
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| 74 | |
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| 75 | struct uart_reg { |
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| 76 | volatile unsigned int data; /* 0x00 */ |
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| 77 | volatile unsigned int status; /* 0x04 */ |
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| 78 | volatile unsigned int ctrl; /* 0x08 */ |
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| 79 | volatile unsigned int scaler; /* 0x0C */ |
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| 80 | }; |
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| 81 | |
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| 82 | |
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| 83 | void uart_register(unsigned int baseaddr); |
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| 84 | rtems_device_driver uart_initialize(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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| 85 | rtems_device_driver uart_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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| 86 | rtems_device_driver uart_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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| 87 | rtems_device_driver uart_read(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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| 88 | rtems_device_driver uart_write(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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| 89 | rtems_device_driver uart_control(rtems_device_major_number major, rtems_device_minor_number minor, void *arg); |
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| 90 | |
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| 91 | |
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| 92 | struct gpio_reg { |
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| 93 | volatile unsigned int in_data; /* 0x00 */ |
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| 94 | volatile unsigned int out_data; /* 0x04 */ |
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| 95 | volatile unsigned int dir; /* 0x08 */ |
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| 96 | volatile unsigned int imask; /* 0x0C */ |
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| 97 | volatile unsigned int ipol; /* 0x10 */ |
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| 98 | volatile unsigned int iedge; /* 0x14 */ |
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| 99 | }; |
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| 100 | |
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| 101 | extern struct gpio_reg *gpio0, *gpio1; |
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| 102 | |
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| 103 | #ifdef __cplusplus |
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| 104 | } |
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| 105 | #endif |
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| 106 | |
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| 107 | #endif |
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