source: rtems/c/src/lib/libbsp/sparc/leon2/include/leon.h @ 8d830fae

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Last change on this file since 8d830fae was 8d830fae, checked in by Radu <radustoma@…>, on Dec 2, 2013 at 8:07:35 PM

leon2_doxygen_1

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1/**
2 * @file
3 * @defgroup leon1 Leon-1 Handler
4 * @ingroup sparc_leon2
5 * @brief Handlers Leon-1
6 */
7
8/*  erc32.h
9 *
10 *  This include file contains information pertaining to the LEON-1.
11 *  The LEON-1 is a custom SPARC V7 implementation.
12 *  This CPU has a number of on-board peripherals and
13 *  was developed by the European Space Agency to target space applications.
14 *
15 *  NOTE:  Other than where absolutely required, this version currently
16 *         supports only the peripherals and bits used by the basic board
17 *         support package. This includes at least significant pieces of
18 *         the following items:
19 *
20 *           + UART Channels A and B
21 *           + Real Time Clock
22 *           + Memory Control Register
23 *           + Interrupt Control
24 *
25 *  COPYRIGHT (c) 1989-1998.
26 *  On-Line Applications Research Corporation (OAR).
27 *
28 *  The license and distribution terms for this file may be
29 *  found in the file LICENSE in this distribution or at
30 *  http://www.rtems.com/license/LICENSE.
31 *
32 *  Ported to LEON implementation of the SPARC by On-Line Applications
33 *  Research Corporation (OAR) under contract to the European Space
34 *  Agency (ESA).
35 *
36 *  LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
37 *  European Space Agency.
38 */
39
40#ifndef _INCLUDE_LEON_h
41#define _INCLUDE_LEON_h
42
43#include <rtems/score/sparc.h>
44
45#ifdef __cplusplus
46extern "C" {
47#endif
48
49/*
50 *  Interrupt Sources
51 *
52 *  The interrupt source numbers directly map to the trap type and to
53 *  the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask,
54 *  and the Interrupt Pending Registers.
55 */
56
57#define LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR  1
58#define LEON_INTERRUPT_UART_2_RX_TX              2
59#define LEON_INTERRUPT_UART_1_RX_TX              3
60#define LEON_INTERRUPT_EXTERNAL_0                4
61#define LEON_INTERRUPT_EXTERNAL_1                5
62#define LEON_INTERRUPT_EXTERNAL_2                6
63#define LEON_INTERRUPT_EXTERNAL_3                7
64#define LEON_INTERRUPT_TIMER1                    8
65#define LEON_INTERRUPT_TIMER2                    9
66#define LEON_INTERRUPT_EMPTY1                    10
67#define LEON_INTERRUPT_EMPTY2                    11
68#define LEON_INTERRUPT_EMPTY3                    12
69#define LEON_INTERRUPT_EMPTY4                    13
70#define LEON_INTERRUPT_EMPTY5                    14
71#define LEON_INTERRUPT_EMPTY6                    15
72
73#ifndef ASM
74
75/*
76 *  Trap Types for on-chip peripherals
77 *
78 *  Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
79 *
80 *  NOTE: The priority level for each source corresponds to the least
81 *        significant nibble of the trap type.
82 */
83
84#define LEON_TRAP_TYPE( _source ) SPARC_ASYNCHRONOUS_TRAP((_source) + 0x10)
85
86#define LEON_TRAP_SOURCE( _trap ) ((_trap) - 0x10)
87
88#define LEON_INT_TRAP( _trap ) \
89  ( (_trap) >= LEON_TRAP_TYPE( LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR ) && \
90    (_trap) <= LEON_TRAP_TYPE( LEON_INTERRUPT_EMPTY6 ) )
91
92/*
93 *  Structure for LEON memory mapped registers.
94 *
95 *  Source: Section 6.1 - On-chip registers
96 *
97 *  NOTE:  There is only one of these structures per CPU, its base address
98 *         is 0x80000000, and the variable LEON_REG is placed there by the
99 *         linkcmds file.
100 */
101
102typedef struct {
103        volatile unsigned int Memory_Config_1;
104        volatile unsigned int Memory_Config_2;
105        volatile unsigned int Edac_Control;
106        volatile unsigned int Failed_Address;
107        volatile unsigned int Memory_Status;
108        volatile unsigned int Cache_Control;
109        volatile unsigned int Power_Down;
110        volatile unsigned int Write_Protection_1;
111        volatile unsigned int Write_Protection_2;
112        volatile unsigned int Leon_Configuration;
113        volatile unsigned int dummy2;
114        volatile unsigned int dummy3;
115        volatile unsigned int dummy4;
116        volatile unsigned int dummy5;
117        volatile unsigned int dummy6;
118        volatile unsigned int dummy7;
119        volatile unsigned int Timer_Counter_1;
120        volatile unsigned int Timer_Reload_1;
121        volatile unsigned int Timer_Control_1;
122        volatile unsigned int Watchdog;
123        volatile unsigned int Timer_Counter_2;
124        volatile unsigned int Timer_Reload_2;
125        volatile unsigned int Timer_Control_2;
126        volatile unsigned int dummy8;
127        volatile unsigned int Scaler_Counter;
128        volatile unsigned int Scaler_Reload;
129        volatile unsigned int dummy9;
130        volatile unsigned int dummy10;
131        volatile unsigned int UART_Channel_1;
132        volatile unsigned int UART_Status_1;
133        volatile unsigned int UART_Control_1;
134        volatile unsigned int UART_Scaler_1;
135        volatile unsigned int UART_Channel_2;
136        volatile unsigned int UART_Status_2;
137        volatile unsigned int UART_Control_2;
138        volatile unsigned int UART_Scaler_2;
139        volatile unsigned int Interrupt_Mask;
140        volatile unsigned int Interrupt_Pending;
141        volatile unsigned int Interrupt_Force;
142        volatile unsigned int Interrupt_Clear;
143        volatile unsigned int PIO_Data;
144        volatile unsigned int PIO_Direction;
145        volatile unsigned int PIO_Interrupt;
146} LEON_Register_Map;
147
148#endif
149
150/*
151 *  The following constants are intended to be used ONLY in assembly
152 *  language files.
153 *
154 *  NOTE:  The intended style of usage is to load the address of LEON REGS
155 *         into a register and then use these as displacements from
156 *         that register.
157 */
158
159#ifdef ASM
160
161#define  LEON_REG_MEMCFG1_OFFSET                                  0x00
162#define  LEON_REG_MEMCFG2_OFFSET                                  0x04
163#define  LEON_REG_EDACCTRL_OFFSET                                 0x08
164#define  LEON_REG_FAILADDR_OFFSET                                 0x0C
165#define  LEON_REG_MEMSTATUS_OFFSET                                0x10
166#define  LEON_REG_CACHECTRL_OFFSET                                0x14
167#define  LEON_REG_POWERDOWN_OFFSET                                0x18
168#define  LEON_REG_WRITEPROT1_OFFSET                               0x1C
169#define  LEON_REG_WRITEPROT2_OFFSET                               0x20
170#define  LEON_REG_LEONCONF_OFFSET                                 0x24
171#define  LEON_REG_UNIMPLEMENTED_2_OFFSET                          0x28
172#define  LEON_REG_UNIMPLEMENTED_3_OFFSET                          0x2C
173#define  LEON_REG_UNIMPLEMENTED_4_OFFSET                          0x30
174#define  LEON_REG_UNIMPLEMENTED_5_OFFSET                          0x34
175#define  LEON_REG_UNIMPLEMENTED_6_OFFSET                          0x38
176#define  LEON_REG_UNIMPLEMENTED_7_OFFSET                          0x3C
177#define  LEON_REG_TIMERCNT1_OFFSET                                0x40
178#define  LEON_REG_TIMERLOAD1_OFFSET                               0x44
179#define  LEON_REG_TIMERCTRL1_OFFSET                               0x48
180#define  LEON_REG_WDOG_OFFSET                                     0x4C
181#define  LEON_REG_TIMERCNT2_OFFSET                                0x50
182#define  LEON_REG_TIMERLOAD2_OFFSET                               0x54
183#define  LEON_REG_TIMERCTRL2_OFFSET                               0x58
184#define  LEON_REG_UNIMPLEMENTED_8_OFFSET                          0x5C
185#define  LEON_REG_SCALERCNT_OFFSET                                0x60
186#define  LEON_REG_SCALER_LOAD_OFFSET                              0x64
187#define  LEON_REG_UNIMPLEMENTED_9_OFFSET                          0x68
188#define  LEON_REG_UNIMPLEMENTED_10_OFFSET                         0x6C
189#define  LEON_REG_UARTDATA1_OFFSET                                0x70
190#define  LEON_REG_UARTSTATUS1_OFFSET                              0x74
191#define  LEON_REG_UARTCTRL1_OFFSET                                0x78
192#define  LEON_REG_UARTSCALER1_OFFSET                              0x7C
193#define  LEON_REG_UARTDATA2_OFFSET                                0x80
194#define  LEON_REG_UARTSTATUS2_OFFSET                              0x84
195#define  LEON_REG_UARTCTRL2_OFFSET                                0x88
196#define  LEON_REG_UARTSCALER2_OFFSET                              0x8C
197#define  LEON_REG_IRQMASK_OFFSET                                  0x90
198#define  LEON_REG_IRQPEND_OFFSET                                  0x94
199#define  LEON_REG_IRQFORCE_OFFSET                                 0x98
200#define  LEON_REG_IRQCLEAR_OFFSET                                 0x9C
201#define  LEON_REG_PIODATA_OFFSET                                  0xA0
202#define  LEON_REG_PIODIR_OFFSET                                   0xA4
203#define  LEON_REG_PIOIRQ_OFFSET                                   0xA8
204#define  LEON_REG_SIM_RAM_SIZE_OFFSET                             0xF4
205#define  LEON_REG_SIM_ROM_SIZE_OFFSET                             0xF8
206
207#endif
208
209/*
210 *  The following defines the bits in Memory Configuration Register 1.
211 */
212
213#define LEON_MEMORY_CONFIGURATION_PROM_SIZE_MASK  0x0003C000
214
215/*
216 *  The following defines the bits in Memory Configuration Register 1.
217 */
218
219#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK  0x00001E00
220
221
222/*
223 *  The following defines the bits in the Timer Control Register.
224 */
225
226#define LEON_REG_TIMER_CONTROL_EN    0x00000001  /* 1 = enable counting */
227                                                 /* 0 = hold scalar and counter */
228#define LEON_REG_TIMER_CONTROL_RL    0x00000002  /* 1 = reload at 0 */
229                                                 /* 0 = stop at 0 */
230#define LEON_REG_TIMER_CONTROL_LD    0x00000004  /* 1 = load counter */
231                                                 /* 0 = no function */
232
233/*
234 *  The following defines the bits in the UART Control Registers.
235 *
236 */
237
238#define LEON_REG_UART_CONTROL_RTD  0x000000FF /* RX/TX data */
239
240/*
241 *  The following defines the bits in the LEON UART Status Registers.
242 */
243
244#define LEON_REG_UART_STATUS_CLR  0x00000000 /* Clear all status bits */
245#define LEON_REG_UART_STATUS_DR   0x00000001 /* Data Ready */
246#define LEON_REG_UART_STATUS_TSE  0x00000002 /* TX Send Register Empty */
247#define LEON_REG_UART_STATUS_THE  0x00000004 /* TX Hold Register Empty */
248#define LEON_REG_UART_STATUS_BR   0x00000008 /* Break Error */
249#define LEON_REG_UART_STATUS_OE   0x00000010 /* RX Overrun Error */
250#define LEON_REG_UART_STATUS_PE   0x00000020 /* RX Parity Error */
251#define LEON_REG_UART_STATUS_FE   0x00000040 /* RX Framing Error */
252#define LEON_REG_UART_STATUS_ERR  0x00000078 /* Error Mask */
253
254
255/*
256 *  The following defines the bits in the LEON UART Status Registers.
257 */
258
259#define LEON_REG_UART_CTRL_RE     0x00000001 /* Receiver enable */
260#define LEON_REG_UART_CTRL_TE     0x00000002 /* Transmitter enable */
261#define LEON_REG_UART_CTRL_RI     0x00000004 /* Receiver interrupt enable */
262#define LEON_REG_UART_CTRL_TI     0x00000008 /* Transmitter interrupt enable */
263#define LEON_REG_UART_CTRL_PS     0x00000010 /* Parity select */
264#define LEON_REG_UART_CTRL_PE     0x00000020 /* Parity enable */
265#define LEON_REG_UART_CTRL_FL     0x00000040 /* Flow control enable */
266#define LEON_REG_UART_CTRL_LB     0x00000080 /* Loop Back enable */
267
268#ifndef ASM
269
270/*
271 *  This is used to manipulate the on-chip registers.
272 *
273 *  The following symbol must be defined in the linkcmds file and point
274 *  to the correct location.
275 */
276
277extern LEON_Register_Map LEON_REG;
278
279static __inline__ int bsp_irq_fixup(int irq)
280{
281       return irq;
282}
283
284/*
285 *  Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
286 *  and the Interrupt Pending Registers.
287 *
288 *  NOTE: For operations which are not atomic, this code disables interrupts
289 *        to guarantee there are no intervening accesses to the same register.
290 *        The operations which read the register, modify the value and then
291 *        store the result back are vulnerable.
292 */
293
294#define LEON_Clear_interrupt( _source ) \
295  do { \
296    LEON_REG.Interrupt_Clear = (1 << (_source)); \
297  } while (0)
298
299#define LEON_Force_interrupt( _source ) \
300  do { \
301    LEON_REG.Interrupt_Force = (1 << (_source)); \
302  } while (0)
303
304#define LEON_Is_interrupt_pending( _source ) \
305  (LEON_REG.Interrupt_Pending & (1 << (_source)))
306
307#define LEON_Is_interrupt_masked( _source ) \
308  (LEON_REG.Interrupt_Masked & (1 << (_source)))
309
310#define LEON_Mask_interrupt( _source ) \
311  do { \
312    uint32_t _level; \
313    \
314    _level = sparc_disable_interrupts(); \
315      LEON_REG.Interrupt_Mask &= ~(1 << (_source)); \
316    sparc_enable_interrupts( _level ); \
317  } while (0)
318
319#define LEON_Unmask_interrupt( _source ) \
320  do { \
321    uint32_t _level; \
322    \
323    _level = sparc_disable_interrupts(); \
324      LEON_REG.Interrupt_Mask |= (1 << (_source)); \
325    sparc_enable_interrupts( _level ); \
326  } while (0)
327
328#define LEON_Disable_interrupt( _source, _previous ) \
329  do { \
330    uint32_t _level; \
331    uint32_t _mask = 1 << (_source); \
332    \
333    _level = sparc_disable_interrupts(); \
334      (_previous) = LEON_REG.Interrupt_Mask; \
335      LEON_REG.Interrupt_Mask = _previous & ~_mask; \
336    sparc_enable_interrupts( _level ); \
337    (_previous) &= _mask; \
338  } while (0)
339
340#define LEON_Restore_interrupt( _source, _previous ) \
341  do { \
342    uint32_t _level; \
343    uint32_t _mask = 1 << (_source); \
344    \
345    _level = sparc_disable_interrupts(); \
346      LEON_REG.Interrupt_Mask = \
347        (LEON_REG.Interrupt_Mask & ~_mask) | (_previous); \
348    sparc_enable_interrupts( _level ); \
349  } while (0)
350
351/* Make all SPARC BSPs have common macros for interrupt handling */
352#define BSP_Clear_interrupt(_source) LEON_Clear_interrupt(_source)
353#define BSP_Force_interrupt(_source) LEON_Force_interrupt(_source)
354#define BSP_Is_interrupt_pending(_source) LEON_Is_interrupt_pending(_source)
355#define BSP_Is_interrupt_masked(_source) LEON_Is_interrupt_masked(_source)
356#define BSP_Unmask_interrupt(_source) LEON_Unmask_interrupt(_source)
357#define BSP_Mask_interrupt(_source) LEON_Mask_interrupt(_source)
358#define BSP_Disable_interrupt(_source, _previous) \
359        LEON_Disable_interrupt(_source, _prev)
360#define BSP_Restore_interrupt(_source, _previous) \
361        LEON_Restore_interrupt(_source, _previous)
362
363/*
364 *  Each timer control register is organized as follows:
365 *
366 *    D0 - Enable
367 *          1 = enable counting
368 *          0 = hold scaler and counter
369 *
370 *    D1 - Counter Reload
371 *          1 = reload counter at zero and restart
372 *          0 = stop counter at zero
373 *
374 *    D2 - Counter Load
375 *          1 = load counter with preset value
376 *          0 = no function
377 *
378 */
379
380#define LEON_REG_TIMER_COUNTER_RELOAD_AT_ZERO     0x00000002
381#define LEON_REG_TIMER_COUNTER_STOP_AT_ZERO       0x00000000
382
383#define LEON_REG_TIMER_COUNTER_LOAD_COUNTER       0x00000004
384
385#define LEON_REG_TIMER_COUNTER_ENABLE_COUNTING    0x00000001
386#define LEON_REG_TIMER_COUNTER_DISABLE_COUNTING   0x00000000
387
388#define LEON_REG_TIMER_COUNTER_RELOAD_MASK        0x00000002
389#define LEON_REG_TIMER_COUNTER_ENABLE_MASK        0x00000001
390
391#define LEON_REG_TIMER_COUNTER_DEFINED_MASK       0x00000003
392#define LEON_REG_TIMER_COUNTER_CURRENT_MODE_MASK  0x00000003
393
394/* Load 32-bit word by forcing a cache-miss */
395static inline unsigned int leon_r32_no_cache(uintptr_t addr)
396{
397        unsigned int tmp;
398        asm volatile (" lda [%1] 1, %0\n" : "=r"(tmp) : "r"(addr));
399        return tmp;
400}
401
402#endif /* !ASM */
403
404#ifdef __cplusplus
405}
406#endif
407
408#endif /* !_INCLUDE_LEON_h */
409
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