source: rtems/c/src/lib/libbsp/sparc/erc32/startup/spurious.c @ 3eec211

4.104.114.84.95
Last change on this file since 3eec211 was df49c60, checked in by Joel Sherrill <joel.sherrill@…>, on 06/12/00 at 15:00:15

Merged from 4.5.0-beta3a
  • Property mode set to 100644
File size: 5.1 KB
Line 
1/*
2 *  ERC32 Spurious Trap Handler
3 *
4 *  This is just enough of a trap handler to let us know what
5 *  the likely source of the trap was.
6 *
7 *  Developed as part of the port of RTEMS to the ERC32 implementation
8 *  of the SPARC by On-Line Applications Research Corporation (OAR)
9 *  under contract to the European Space Agency (ESA).
10 *
11 *  COPYRIGHT (c) 1995. European Space Agency.
12 *
13 *  This terms of the RTEMS license apply to this file.
14 *
15 *  $Id$
16 */
17
18#include <bsp.h>
19
20#include <string.h>
21
22static const char digits[16] = "0123456789abcdef";
23
24/* Simple integer-to-string conversion */
25
26void itos(unsigned32 u, char *s)
27{
28  int i;
29
30  for (i=0; i<8; i++) {
31    s[i] =  digits[(u >> (28 - (i*4))) & 0x0f];
32  }
33}
34
35/*
36 *  bsp_spurious_handler
37 *
38 *  Print a message on the debug console and then die
39 */
40
41rtems_isr bsp_spurious_handler(
42   rtems_vector_number trap,
43   CPU_Interrupt_frame *isf
44)
45{
46  char line[ 80 ];
47  rtems_unsigned32 real_trap;
48
49  real_trap = SPARC_REAL_TRAP_NUMBER(trap);
50
51  strcpy(line, "Unexpected trap (0x  ) at address 0x        ");
52  line[ 19 ] = digits[ real_trap >> 4 ];
53  line[ 20 ] = digits[ real_trap & 0xf ];
54  itos(isf->tpc, &line[36]);
55  DEBUG_puts( line );
56
57  switch (real_trap) {
58
59    /*
60     *  First the ones defined by the basic architecture
61     */
62
63    case 0x00:
64      DEBUG_puts( "reset" );
65      break;
66    case 0x01:
67      DEBUG_puts( "instruction access exception" );
68      break;
69    case 0x02:
70      DEBUG_puts( "illegal instruction" );
71      break;
72    case 0x03:
73      DEBUG_puts( "privileged instruction" );
74      break;
75    case 0x04:
76      DEBUG_puts( "fp disabled" );
77      break;
78    case 0x07:
79      DEBUG_puts( "memory address not aligned" );
80      break;
81    case 0x08:
82      DEBUG_puts( "fp exception" );
83      break;
84    case 0x09:
85      strcpy(line, "data access exception at 0x        " );
86      itos(ERC32_MEC.First_Failing_Address, &line[27]);
87      DEBUG_puts( line );
88      break;
89    case 0x0A:
90      DEBUG_puts( "tag overflow" );
91      break;
92
93    /*
94     *  Then the ones defined by the ERC32 in particular
95     */
96
97    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_MASKED_ERRORS ):
98      DEBUG_puts( "ERC32_INTERRUPT_MASKED_ERRORS" );
99      break;
100    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_1 ):
101      DEBUG_puts( "ERC32_INTERRUPT_EXTERNAL_1" );
102      break;
103    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_2 ):
104      DEBUG_puts( "ERC32_INTERRUPT_EXTERNAL_2" );
105      break;
106    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_UART_A_RX_TX ):
107      DEBUG_puts( "ERC32_INTERRUPT_UART_A_RX_TX" );
108      break;
109    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_UART_B_RX_TX ):
110      DEBUG_puts( "ERC32_INTERRUPT_UART_A_RX_TX" );
111      break;
112    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_CORRECTABLE_MEMORY_ERROR ):
113      DEBUG_puts( "ERC32_INTERRUPT_CORRECTABLE_MEMORY_ERROR" );
114      break;
115    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_UART_ERROR ):
116      DEBUG_puts( "ERC32_INTERRUPT_UART_ERROR" );
117      break;
118    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_DMA_ACCESS_ERROR ):
119      DEBUG_puts( "ERC32_INTERRUPT_DMA_ACCESS_ERROR" );
120      break;
121    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_DMA_TIMEOUT ):
122      DEBUG_puts( "ERC32_INTERRUPT_DMA_TIMEOUT" );
123      break;
124    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_3 ):
125      DEBUG_puts( "ERC32_INTERRUPT_EXTERNAL_3" );
126      break;
127    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_4 ):
128      DEBUG_puts( "ERC32_INTERRUPT_EXTERNAL_4" );
129      break;
130    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_GENERAL_PURPOSE_TIMER ):
131      DEBUG_puts( "ERC32_INTERRUPT_GENERAL_PURPOSE_TIMER" );
132      break;
133    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_REAL_TIME_CLOCK ):
134      DEBUG_puts( "ERC32_INTERRUPT_REAL_TIME_CLOCK" );
135      break;
136    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_5 ):
137      DEBUG_puts( "ERC32_INTERRUPT_EXTERNAL_5" );
138      break;
139    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_WATCHDOG_TIMEOUT ):
140      DEBUG_puts( "ERC32_INTERRUPT_WATCHDOG_TIMEOUT" );
141      break;
142
143    default:
144      break;
145  }
146
147  /*
148   *  What else can we do but stop ...
149   */
150
151  asm volatile( "mov 1, %g1; ta 0x0" );
152}
153
154/*
155 *  bsp_spurious_initialize
156 *
157 *  Install the spurious handler for most traps. Note that set_vector()
158 *  will unmask the corresponding asynchronous interrupt, so the initial
159 *  interrupt mask is restored after the handlers are installed.
160 */
161
162void bsp_spurious_initialize()
163{
164  rtems_unsigned32 trap;
165  unsigned32 level = 15;
166  unsigned32 mask;
167
168  sparc_disable_interrupts(level);
169  mask = ERC32_MEC.Interrupt_Mask;
170
171  for ( trap=0 ; trap<256 ; trap++ ) {
172
173    /*
174     *  Skip window overflow, underflow, and flush as well as software
175     *  trap 0 which we will use as a shutdown. Also avoid trap 0x70 - 0x7f
176     *  which cannot happen and where some of the space is used to pass
177     *  paramaters to the program.
178     */
179
180     if (( trap == 5 || trap == 6 ) ||
181        (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
182        (( trap >= 0x70 ) && ( trap <= 0x83 )))
183      continue;
184
185    set_vector( (rtems_isr_entry) bsp_spurious_handler,
186         SPARC_SYNCHRONOUS_TRAP( trap ), 1 );
187  }
188
189  ERC32_MEC.Interrupt_Mask = mask;
190  sparc_enable_interrupts(level);
191
192}
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