source: rtems/c/src/lib/libbsp/sparc/erc32/startup/spurious.c @ 3e6eed76

4.115
Last change on this file since 3e6eed76 was 3e6eed76, checked in by Ralf Corsepius <ralf.corsepius@…>, on 02/11/11 at 10:06:48

2011-02-11 Ralf Corsépius <ralf.corsepius@…>

  • include/tm27.h, startup/spurious.c: Use "asm" instead of "asm" for improved c99-compliance.
  • Property mode set to 100644
File size: 4.6 KB
Line 
1/*
2 *  ERC32 Spurious Trap Handler
3 *
4 *  This is just enough of a trap handler to let us know what
5 *  the likely source of the trap was.
6 *
7 *  Developed as part of the port of RTEMS to the ERC32 implementation
8 *  of the SPARC by On-Line Applications Research Corporation (OAR)
9 *  under contract to the European Space Agency (ESA).
10 *
11 *  COPYRIGHT (c) 1995. European Space Agency.
12 *
13 *  This terms of the RTEMS license apply to this file.
14 *
15 *  $Id$
16 */
17
18#include <bsp.h>
19#include <rtems/bspIo.h>
20
21/*
22 *  bsp_spurious_handler
23 *
24 *  Print a message on the debug console and then die
25 */
26
27rtems_isr bsp_spurious_handler(
28   rtems_vector_number trap,
29   CPU_Interrupt_frame *isf
30)
31{
32  uint32_t         real_trap;
33
34  real_trap = SPARC_REAL_TRAP_NUMBER(trap);
35
36  printk( "Unexpected trap (%2d) at address 0x%08x\n", real_trap, isf->tpc);
37
38  switch (real_trap) {
39
40    /*
41     *  First the ones defined by the basic architecture
42     */
43
44    case 0x00:
45      printk( "reset\n" );
46      break;
47    case 0x01:
48      printk( "instruction access exception\n" );
49      break;
50    case 0x02:
51      printk( "illegal instruction\n" );
52      break;
53    case 0x03:
54      printk( "privileged instruction\n" );
55      break;
56    case 0x04:
57      printk( "fp disabled\n" );
58      break;
59    case 0x07:
60      printk( "memory address not aligned\n" );
61      break;
62    case 0x08:
63      printk( "fp exception\n" );
64      break;
65    case 0x09:
66      printk("data access exception at 0x%08x\n",
67        ERC32_MEC.First_Failing_Address );
68      break;
69    case 0x0A:
70      printk( "tag overflow\n" );
71      break;
72
73    /*
74     *  Then the ones defined by the ERC32 in particular
75     */
76
77    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_MASKED_ERRORS ):
78      printk( "ERC32_INTERRUPT_MASKED_ERRORS\n" );
79      break;
80    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_1 ):
81      printk( "ERC32_INTERRUPT_EXTERNAL_1\n" );
82      break;
83    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_2 ):
84      printk( "ERC32_INTERRUPT_EXTERNAL_2\n" );
85      break;
86    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_UART_A_RX_TX ):
87      printk( "ERC32_INTERRUPT_UART_A_RX_TX\n" );
88      break;
89    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_UART_B_RX_TX ):
90      printk( "ERC32_INTERRUPT_UART_A_RX_TX\n" );
91      break;
92    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_CORRECTABLE_MEMORY_ERROR ):
93      printk( "ERC32_INTERRUPT_CORRECTABLE_MEMORY_ERROR\n" );
94      break;
95    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_UART_ERROR ):
96      printk( "ERC32_INTERRUPT_UART_ERROR\n" );
97      break;
98    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_DMA_ACCESS_ERROR ):
99      printk( "ERC32_INTERRUPT_DMA_ACCESS_ERROR\n" );
100      break;
101    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_DMA_TIMEOUT ):
102      printk( "ERC32_INTERRUPT_DMA_TIMEOUT\n" );
103      break;
104    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_3 ):
105      printk( "ERC32_INTERRUPT_EXTERNAL_3\n" );
106      break;
107    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_4 ):
108      printk( "ERC32_INTERRUPT_EXTERNAL_4\n" );
109      break;
110    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_GENERAL_PURPOSE_TIMER ):
111      printk( "ERC32_INTERRUPT_GENERAL_PURPOSE_TIMER\n" );
112      break;
113    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_REAL_TIME_CLOCK ):
114      printk( "ERC32_INTERRUPT_REAL_TIME_CLOCK\n" );
115      break;
116    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_EXTERNAL_5 ):
117      printk( "ERC32_INTERRUPT_EXTERNAL_5\n" );
118      break;
119    case ERC32_TRAP_TYPE( ERC32_INTERRUPT_WATCHDOG_TIMEOUT ):
120      printk( "ERC32_INTERRUPT_WATCHDOG_TIMEOUT\n" );
121      break;
122
123    default:
124      break;
125  }
126
127  /*
128   *  What else can we do but stop ...
129   */
130
131  __asm__ volatile( "mov 1, %g1; ta 0x0" );
132}
133
134/*
135 *  bsp_spurious_initialize
136 *
137 *  Install the spurious handler for most traps. Note that set_vector()
138 *  will unmask the corresponding asynchronous interrupt, so the initial
139 *  interrupt mask is restored after the handlers are installed.
140 */
141
142void bsp_spurious_initialize()
143{
144  uint32_t   trap;
145  uint32_t   level = 15;
146  uint32_t   mask;
147
148  level = sparc_disable_interrupts();
149  mask = ERC32_MEC.Interrupt_Mask;
150
151  for ( trap=0 ; trap<256 ; trap++ ) {
152
153    /*
154     *  Skip window overflow, underflow, and flush as well as software
155     *  trap 0 which we will use as a shutdown. Also avoid trap 0x70 - 0x7f
156     *  which cannot happen and where some of the space is used to pass
157     *  paramaters to the program.
158     */
159
160     if (( trap == 5 || trap == 6 ) ||
161        (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
162        (( trap >= 0x70 ) && ( trap <= 0x83 )))
163      continue;
164
165    set_vector( (rtems_isr_entry) bsp_spurious_handler,
166         SPARC_SYNCHRONOUS_TRAP( trap ), 1 );
167  }
168
169  ERC32_MEC.Interrupt_Mask = mask;
170  sparc_enable_interrupts(level);
171
172}
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