source: rtems/c/src/lib/libbsp/sparc/erc32/startup/bspstart.c @ 4159370

4.104.114.84.95
Last change on this file since 4159370 was 4159370, checked in by Joel Sherrill <joel.sherrill@…>, on Jul 11, 2000 at 9:16:53 PM

Reworked score/cpu/sparc so it can be safely compiled multilib. All
routines and structures that require CPU model specific information
are now in libcpu. This primarily required moving erc32 specific
information from score/cpu files to libcpu/sparc and the erc32 BSP.

  • Property mode set to 100644
File size: 6.6 KB
Line 
1/*
2 *  This set of routines starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before any of these are invoked.
6 *
7 *  COPYRIGHT (c) 1989-1999.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.OARcorp.com/rtems/license.html.
13 *
14 *  Ported to ERC32 implementation of the SPARC by On-Line Applications
15 *  Research Corporation (OAR) under contract to the European Space
16 *  Agency (ESA).
17 *
18 *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
19 *  European Space Agency.
20 *
21 *  $Id$
22 */
23
24#include <bsp.h>
25#include <rtems/libio.h>
26
27#include <libcsupport.h>
28
29#include <string.h>
30
31/*
32 *  The original table from the application and our copy of it with
33 *  some changes.
34 */
35 
36extern rtems_configuration_table  Configuration;
37rtems_configuration_table         BSP_Configuration;
38
39rtems_cpu_table   Cpu_table;
40
41/*
42 *  Tells us where to put the workspace in case remote debugger is present.
43 */
44
45extern rtems_unsigned32  rdb_start;
46
47/*
48 *  Mirror of the Timer Control Register
49 */
50
51unsigned32 _ERC32_MEC_Timer_Control_Mirror;
52
53/*
54 * Amount to increment itimer by each pass
55 * It is a variable instead of a #define to allow the 'looptest'
56 * script to bump it without recompiling rtems
57 *
58 *  NOTE:  This is based on the PA-RISC simulator.  I don't know if we
59 *         can actually pull this trick on the SPARC simulator.
60 */
61
62rtems_unsigned32 CPU_SPARC_CLICKS_PER_TICK;
63
64#if SIMSPARC_FAST_IDLE
65
66/*
67 * Many of the tests are very slow on the simulator because they have
68 * have 5 second delays hardwired in.
69 *
70 * Try to speed those tests up by speeding up the clock when in the idle task.
71 *
72 *  NOTE:  At the current setting, 5 second delays in the tests take
73 *         approximately 5 seconds of wall time.
74 */
75
76rtems_extension fast_idle_switch_hook(
77  rtems_tcb *current_task,
78  rtems_tcb *heir_task
79)
80{
81    static rtems_unsigned32 normal_clock = ~0;
82    static rtems_unsigned32 fast_clock;
83
84    /* init our params on first call */
85    if (normal_clock == ~0)
86    {
87        normal_clock = CPU_SPARC_CLICKS_PER_TICK;
88        fast_clock = CPU_SPARC_CLICKS_PER_TICK / 0x08;
89        if (fast_clock == 0)    /* handle pathological case */
90            fast_clock++;
91    }
92
93    /*
94     * Run the clock faster when idle is in place.
95     */
96
97    if (heir_task == _Thread_Idle)
98        CPU_SPARC_CLICKS_PER_TICK = fast_clock;
99    else if (current_task == _Thread_Idle)
100        CPU_SPARC_CLICKS_PER_TICK = normal_clock;
101}
102
103#endif
104
105/*
106 *  Use the shared implementations of the following routines
107 */
108 
109void bsp_postdriver_hook(void);
110void bsp_libc_init( void *, unsigned32, int );
111extern void bsp_spurious_initialize();
112
113/*
114 *  bsp_pretasking_hook
115 *
116 *  BSP pretasking hook.  Called just before drivers are initialized.
117 *  Used to setup libc and install any BSP extensions.
118 */
119
120void bsp_pretasking_hook(void)
121{
122  extern int end;
123  rtems_unsigned32 heap_start;
124  rtems_unsigned32 heap_size;
125
126  heap_start = (rtems_unsigned32) &end;
127  if (heap_start & (CPU_ALIGNMENT-1))
128    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
129
130  heap_size = BSP_Configuration.work_space_start - (void *)&end;
131  heap_size &= 0xfffffff0;  /* keep it as a multiple of 16 bytes */
132
133  bsp_libc_init((void *) heap_start, heap_size, 0);
134
135
136#if SIMSPARC_FAST_IDLE
137  /*
138   *  Install the fast idle task switch extension
139   *
140   *  On MP systems, might not want to do this; it confuses at least
141   *  one test (mp06) on the PA-RISC simulator
142   */
143
144#if 0
145  if (BSP_Configuration.User_multiprocessing_table == 0)
146#endif
147  {
148    rtems_extensions_table  fast_idle_extension;
149    rtems_id                extension_id;
150    rtems_status_code       rc;
151
152    memset(&fast_idle_extension, 0, sizeof(fast_idle_extension));
153
154    fast_idle_extension.thread_switch  = fast_idle_switch_hook;
155
156    rc = rtems_extension_create(
157      rtems_build_name('F', 'D', 'L', 'E'),
158      &fast_idle_extension, 
159      &extension_id
160    );
161    if (rc != RTEMS_SUCCESSFUL)
162      rtems_fatal_error_occurred(rc);
163  }
164#endif
165
166#ifdef RTEMS_DEBUG
167  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
168#endif
169
170  bsp_spurious_initialize();
171}
172
173/*
174 *  ERC32_Idle_thread_body
175 *
176 *  ERC32 specific idle task that enters low power mode.
177 */
178
179void ERC32_Idle_thread_body( void ) 
180{
181  while (1) {
182    ERC32_MEC.Power_Down = 0;   /* value is irrelevant */
183  }
184}
185
186
187
188/*
189 *  bsp_start
190 *
191 *  This routine does the bulk of the system initialization.
192 */
193
194void bsp_start( void )
195{
196  unsigned char *work_space_start;
197
198  /* Check if MEC is initialised */
199
200  if (!(ERC32_MEC.Control & 0xfe080000)) {
201
202  /*
203   *  DISABLE THE HARDWARE WATCHDOG!!!
204   */
205
206    ERC32_MEC.Watchdog_Trap_Door_Set = 0;          /* value is irrelevant */
207
208  /*
209   *  Reduce the number of wait states to 0 for all memory areas.
210   */
211
212    ERC32_MEC.Wait_State_Configuration = 0; 
213
214  }
215
216  /*
217   *  Initialize the mirror of the Timer Control register.
218   */
219
220  _ERC32_MEC_Timer_Control_Mirror = 0;
221  ERC32_MEC.Timer_Control = 0;
222
223  ERC32_MEC.Control |= ERC32_CONFIGURATION_POWER_DOWN_ALLOWED;
224 
225  /*
226   * Set up our hooks
227   * Make sure libc_init is done before drivers initialized so that
228   * they can use atexit()
229   */
230
231  Cpu_table.pretasking_hook = bsp_pretasking_hook;    /* init libc, etc. */
232  Cpu_table.postdriver_hook = bsp_postdriver_hook;
233
234  /*
235   *  SIS does zero out memory BUT only when IT begins execution.  Thus
236   *  if we want to have a clean slate in the workspace each time we
237   *  begin execution of OUR application, then we must zero the workspace.
238   */
239  Cpu_table.do_zero_of_workspace = TRUE;
240
241  /*
242   *  ERC32 specific idle task.
243   */
244
245  Cpu_table.idle_task = ERC32_Idle_thread_body;
246
247  /*
248   *  This should be enough interrupt stack.
249   */
250
251  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
252
253  work_space_start = 
254    (unsigned char *)rdb_start - BSP_Configuration.work_space_size;
255
256  if ( work_space_start <= (unsigned char *)&end ) {
257    DEBUG_puts( "bspstart: Not enough RAM!!!\n" );
258    BSP_fatal_return();
259  }
260
261  BSP_Configuration.work_space_start = work_space_start;
262
263#if SIMSPARC_FAST_IDLE
264  /*
265   * Add 1 extension for fast idle
266   */
267
268  BSP_Configuration.maximum_extensions++;
269#endif
270
271  /*
272   * Add 1 extension for MPCI_fatal
273   */
274
275  if (BSP_Configuration.User_multiprocessing_table)
276    BSP_Configuration.maximum_extensions++;
277
278  /*
279   * Set the "clicks per tick" for the simulator
280   *  used by XXX/clock/clock.c to schedule interrupts
281   */
282
283  CPU_SPARC_CLICKS_PER_TICK = BSP_Configuration.microseconds_per_tick;
284}
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