source: rtems/c/src/lib/libbsp/sparc/erc32/startup/boardinit.S @ a1c86a4c

4.104.114.84.95
Last change on this file since a1c86a4c was 2700423, checked in by Joel Sherrill <joel.sherrill@…>, on 11/13/00 at 22:29:14

2000-11-13 Jiri Gaisler <jgais@…>

  • Makefile.am, configure.in, gnatsupp/Makefile.am, gnatsupp/gnatsupp.c, include/Makefile.am, include/bsp.h, start/Makefile.am, startup/Makefile.am, startup/setvec.c, wrapup/Makefile.am:
  • erc32sonic: New directory.
  • erc32sonic/Makefile.am, erc32sonic/erc32sonic.c, erc32sonic/.cvsignore: New files.
  • include/erc32.h: New file.
  • startup/boardinit.S: New file. Big update of SPARC support for ERC32 and LEON. Added support for ERC32 without floating point. Added SONIC support as configured on Tharsys ERC32 board. The bsp's share various code in the shared directory:

gnat-support, start-up code, etc.

To decrease the foot-print, I removed the 16 kbyte start-up
stack that was put in .bss and never reused once the system
was up. The stack is now put between the heap and the
workspace. To reclaim it, the user can do a rtems_region_extend
to merge the stack to the heap region once the system is up.
  • Property mode set to 100644
File size: 1.6 KB
Line 
1/*
2 *  boardinit.s
3 *
4 *  Initialise various ERC32 registers
5 *
6 *  $Id$
7 */
8
9#include <asm.h>
10#include <erc32.h>
11
12        .global __bsp_board_init
13__bsp_board_init:
14
15
16/* Check if MEC is initialised. If not, this means that we are
17   running on the simulator. Initiate some of the parameters
18   that are done by the boot-prom otherwise.
19*/
20
21        set     SYM(ERC32_MEC), %g3  ! g3 = base address of peripherals
22        ld      [%g3], %g2             
23        set     0xfe080000, %g1
24        andcc   %g1, %g2, %g0
25        bne     2f
26 
27 /* Stop the watchdog */
28
29        st      %g0, [%g3 + SYM(ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET)]
30
31 /* Set zero waitstates */
32
33        st      %g0, [%g3 + SYM(ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET)]
34
35 /* Set the correct memory size in MEC memory config register */
36 
37        set     SYM(PROM_SIZE), %l0     
38        set     0, %l1
39        srl     %l0, 18, %l0
401:
41        tst     %l0
42        srl     %l0, 1, %l0
43        bne,a   1b
44        inc     %l1
45        sll     %l1, 8, %l1
46 
47        set     SYM(RAM_SIZE), %l0     
48        srl     %l0, 19, %l0
491:
50        tst     %l0
51        srl     %l0, 1, %l0
52        bne,a   1b
53        inc     %l1
54        sll     %l1, 10, %l1
55 
56                                           ! set the Memory Configuration
57        st     %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
58         
59        set     SYM(RAM_START), %l1  ! Cannot use RAM_END due to bug in linker
60        set     SYM(RAM_SIZE), %l2
61        add     %l1, %l2, %sp
62
63        set     SYM(CLOCK_SPEED), %g6   ! Use 14 MHz in simulator
64        set     14, %g1
65        st      %g1, [%g6]
66
672:
68
69 /* Initialise timer */
70
71        set     SYM(_ERC32_MEC_Timer_Control_Mirror), %l2
72        st      %g0, [%l2]
73        st      %g0, [%g3 + SYM(ERC32_MEC_TIMER_CONTROL_OFFSET)]
74
75 /* Enable power-down */
76
77        ld      [%g3 + SYM(ERC32_MEC_CONTROL_OFFSET)], %l2
78        or      %l2, ERC32_CONFIGURATION_POWER_DOWN_ALLOWED, %l2
79        st      %l2, [%g3 + SYM(ERC32_MEC_CONTROL_OFFSET)]
80
81        retl
82        nop
83
84/* end of file */
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