source: rtems/c/src/lib/libbsp/sparc/erc32/include/bsp.h @ 5354ab0

4.104.114.84.95
Last change on this file since 5354ab0 was 5354ab0, checked in by Joel Sherrill <joel.sherrill@…>, on 11/08/01 at 13:39:52

2001-11-08 Jiri Gaisler <jiri@…>

This fix is in response to test results reported by Jerry Needell
<jerry.needell@…> for the SPARC/ERC32 and tracked as PR80.

  • include/bsp.h: TM27 was not running properly because the ERC32 and LEON cannot nest interrupts at the same level. The BSP test support had to be modified to support using two different interrupt sources.
  • Property mode set to 100644
File size: 4.4 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all SPARC simulator definitions.
4 *
5 *  COPYRIGHT (c) 1989-1999.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.OARcorp.com/rtems/license.html.
11 *
12 *  Ported to ERC32 implementation of the SPARC by On-Line Applications
13 *  Research Corporation (OAR) under contract to the European Space
14 *  Agency (ESA).
15 *
16 *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
17 *  European Space Agency.
18 *
19 *  $Id$
20 */
21
22#ifndef __SIS_h
23#define __SIS_h
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#include <rtems.h>
30#include <iosupp.h>
31#include <erc32.h>
32#include <clockdrv.h>
33
34#include <console.h>
35
36/*
37 *  confdefs.h overrides for this BSP:
38 *   - two termios serial ports
39 *   - Interrupt stack space is not minimum if defined.
40 */
41
42#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
43#define CONFIGURE_INTERRUPT_STACK_MEMORY  (16 * 1024)
44
45/*
46 * Network driver configuration
47 */
48
49struct rtems_bsdnet_ifconfig;
50extern int rtems_erc32_sonic_driver_attach (struct rtems_bsdnet_ifconfig *config);
51#define RTEMS_BSP_NETWORK_DRIVER_NAME   "sonic1"
52#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_erc32_sonic_driver_attach
53
54/*
55 *  Define the time limits for RTEMS Test Suite test durations.
56 *  Long test and short test duration limits are provided.  These
57 *  values are in seconds and need to be converted to ticks for the
58 *  application.
59 *
60 */
61
62#define MAX_LONG_TEST_DURATION       3   /* 3 seconds */
63#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
64
65/*
66 *  Define the interrupt mechanism for Time Test 27
67 *
68 *  NOTE: Since the interrupt code for the SPARC supports both synchronous
69 *        and asynchronous trap handlers, support for testing with both
70 *        is included.
71 */
72
73#define SIS_USE_SYNCHRONOUS_TRAP  0
74
75/*
76 *  The synchronous trap is an arbitrarily chosen software trap.
77 */
78
79#if (SIS_USE_SYNCHRONOUS_TRAP == 1)
80
81#define TEST_VECTOR SPARC_SYNCHRONOUS_TRAP( 0x90 )
82
83#define MUST_WAIT_FOR_INTERRUPT 1
84
85#define Install_tm27_vector( handler ) \
86  set_vector( (handler), TEST_VECTOR, 1 );
87
88#define Cause_tm27_intr() \
89  asm volatile( "ta 0x10; nop " );
90
91#define Clear_tm27_intr() 
92
93#define Lower_tm27_intr()
94
95/*
96 *  The asynchronous trap is an arbitrarily chosen ERC32 interrupt source.
97 */
98
99#else   /* use a regular asynchronous trap */
100
101#define TEST_INTERRUPT_SOURCE ERC32_INTERRUPT_EXTERNAL_1
102#define TEST_INTERRUPT_SOURCE2 (ERC32_INTERRUPT_EXTERNAL_1+1)
103#define TEST_VECTOR ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE )
104#define TEST_VECTOR2 ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE2 )
105 
106#define MUST_WAIT_FOR_INTERRUPT 1
107 
108#define Install_tm27_vector( handler ) \
109  set_vector( (handler), TEST_VECTOR, 1 ); \
110  set_vector( (handler), TEST_VECTOR2, 1 );
111 
112#define Cause_tm27_intr() \
113  do { \
114    ERC32_Force_interrupt( TEST_INTERRUPT_SOURCE+(Interrupt_nest>>1) ); \
115    nop(); \
116    nop(); \
117    nop(); \
118  } while (0)
119 
120#define Clear_tm27_intr() \
121  ERC32_Clear_interrupt( TEST_INTERRUPT_SOURCE )
122 
123#define Lower_tm27_intr()
124
125#endif
126
127/*
128 *  Simple spin delay in microsecond units for device drivers.
129 *  This is very dependent on the clock speed of the target.
130 */
131
132extern void Clock_delay(rtems_unsigned32 microseconds);
133
134#define delay( microseconds ) Clock_delay(microseconds)
135
136/* Constants */
137
138/*
139 *  Information placed in the linkcmds file.
140 */
141
142extern int   RAM_START;
143extern int   RAM_END;
144extern int   RAM_SIZE;
145 
146extern int   PROM_START;
147extern int   PROM_END;
148extern int   PROM_SIZE;
149
150extern int   CLOCK_SPEED;
151 
152extern int   end;        /* last address in the program */
153
154/*
155 *  Device Driver Table Entries
156 */
157 
158/*
159 * NOTE: Use the standard Console driver entry
160 */
161 
162/*
163 * NOTE: Use the standard Clock driver entry
164 */
165 
166 
167/* miscellaneous stuff assumed to exist */
168
169void bsp_cleanup( void );
170
171void bsp_start( void );
172
173rtems_isr_entry set_vector(                     /* returns old vector */
174    rtems_isr_entry     handler,                /* isr routine        */
175    rtems_vector_number vector,                 /* vector number      */
176    int                 type                    /* RTEMS or RAW intr  */
177);
178
179void DEBUG_puts( char *string );
180
181void BSP_fatal_return( void );
182
183void bsp_spurious_initialize( void );
184
185extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
186
187extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
188
189#ifdef __cplusplus
190}
191#endif
192
193#endif
194/* end of include file */
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