source: rtems/c/src/lib/libbsp/sparc/erc32/include/bsp.h @ 4159370

4.104.114.84.95
Last change on this file since 4159370 was 4159370, checked in by Joel Sherrill <joel.sherrill@…>, on Jul 11, 2000 at 9:16:53 PM

Reworked score/cpu/sparc so it can be safely compiled multilib. All
routines and structures that require CPU model specific information
are now in libcpu. This primarily required moving erc32 specific
information from score/cpu files to libcpu/sparc and the erc32 BSP.

  • Property mode set to 100644
File size: 4.0 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all SPARC simulator definitions.
4 *
5 *  COPYRIGHT (c) 1989-1999.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.OARcorp.com/rtems/license.html.
11 *
12 *  Ported to ERC32 implementation of the SPARC by On-Line Applications
13 *  Research Corporation (OAR) under contract to the European Space
14 *  Agency (ESA).
15 *
16 *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
17 *  European Space Agency.
18 *
19 *  $Id$
20 */
21
22#ifndef __ERC32_BSP_h
23#define __ERC32_BSP_h
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#include <rtems.h>
30#include <iosupp.h>
31#include <libcpu/erc32.h>
32#include <clockdrv.h>
33
34#include <console.h>
35
36/*
37 *  confdefs.h overrides for this BSP:
38 *   - two termios serial ports
39 *   - Interrupt stack space is not minimum if defined.
40 */
41
42#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
43#define CONFIGURE_INTERRUPT_STACK_MEMORY  (16 * 1024)
44
45/*
46 *  Define the time limits for RTEMS Test Suite test durations.
47 *  Long test and short test duration limits are provided.  These
48 *  values are in seconds and need to be converted to ticks for the
49 *  application.
50 *
51 */
52
53#define MAX_LONG_TEST_DURATION       3   /* 3 seconds */
54#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
55
56/*
57 *  Define the interrupt mechanism for Time Test 27
58 *
59 *  NOTE: Since the interrupt code for the SPARC supports both synchronous
60 *        and asynchronous trap handlers, support for testing with both
61 *        is included.
62 */
63
64#define SIS_USE_SYNCHRONOUS_TRAP  0
65
66/*
67 *  The synchronous trap is an arbitrarily chosen software trap.
68 */
69
70#if (SIS_USE_SYNCHRONOUS_TRAP == 1)
71
72#define TEST_VECTOR SPARC_SYNCHRONOUS_TRAP( 0x90 )
73
74#define MUST_WAIT_FOR_INTERRUPT 1
75
76#define Install_tm27_vector( handler ) \
77  set_vector( (handler), TEST_VECTOR, 1 );
78
79#define Cause_tm27_intr() \
80  asm volatile( "ta 0x10; nop " );
81
82#define Clear_tm27_intr() 
83
84#define Lower_tm27_intr()
85
86/*
87 *  The asynchronous trap is an arbitrarily chosen ERC32 interrupt source.
88 */
89
90#else   /* use a regular asynchronous trap */
91
92#define TEST_INTERRUPT_SOURCE ERC32_INTERRUPT_EXTERNAL_1
93#define TEST_VECTOR ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE )
94 
95#define MUST_WAIT_FOR_INTERRUPT 1
96 
97#define Install_tm27_vector( handler ) \
98  set_vector( (handler), TEST_VECTOR, 1 );
99 
100#define Cause_tm27_intr() \
101  do { \
102    ERC32_Force_interrupt( TEST_INTERRUPT_SOURCE ); \
103    nop(); \
104    nop(); \
105    nop(); \
106  } while (0)
107 
108#define Clear_tm27_intr() \
109  ERC32_Clear_interrupt( TEST_INTERRUPT_SOURCE )
110 
111#define Lower_tm27_intr()
112
113#endif
114
115/*
116 *  Simple spin delay in microsecond units for device drivers.
117 *  This is very dependent on the clock speed of the target.
118 */
119
120extern void Clock_delay(rtems_unsigned32 microseconds);
121
122#define delay( microseconds ) Clock_delay(microseconds)
123
124/* Constants */
125
126/*
127 *  Information placed in the linkcmds file.
128 */
129
130extern int   RAM_START;
131extern int   RAM_END;
132extern int   RAM_SIZE;
133 
134extern int   PROM_START;
135extern int   PROM_END;
136extern int   PROM_SIZE;
137
138extern int   CLOCK_SPEED;
139 
140extern int   end;        /* last address in the program */
141
142/*
143 *  Device Driver Table Entries
144 */
145 
146/*
147 * NOTE: Use the standard Console driver entry
148 */
149 
150/*
151 * NOTE: Use the standard Clock driver entry
152 */
153 
154 
155/* miscellaneous stuff assumed to exist */
156
157void bsp_cleanup( void );
158
159void bsp_start( void );
160
161rtems_isr_entry set_vector(                     /* returns old vector */
162    rtems_isr_entry     handler,                /* isr routine        */
163    rtems_vector_number vector,                 /* vector number      */
164    int                 type                    /* RTEMS or RAW intr  */
165);
166
167void DEBUG_puts( char *string );
168
169void BSP_fatal_return( void );
170
171void bsp_spurious_initialize( void );
172
173extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
174
175extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
176
177#ifdef __cplusplus
178}
179#endif
180
181#endif
182/* end of include file */
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