[7f96eef] | 1 | /* bsp.h |
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| 2 | * |
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| 3 | * This include file contains all SPARC simulator definitions. |
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| 4 | * |
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[e6ff222] | 5 | * COPYRIGHT (c) 1989-2002. |
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[7f96eef] | 6 | * On-Line Applications Research Corporation (OAR). |
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| 7 | * |
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[98e4ebf5] | 8 | * The license and distribution terms for this file may be |
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| 9 | * found in the file LICENSE in this distribution or at |
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[7d2a0641] | 10 | * http://www.rtems.com/license/LICENSE. |
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[7f96eef] | 11 | * |
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| 12 | * Ported to ERC32 implementation of the SPARC by On-Line Applications |
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| 13 | * Research Corporation (OAR) under contract to the European Space |
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| 14 | * Agency (ESA). |
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| 15 | * |
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| 16 | * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. |
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| 17 | * European Space Agency. |
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| 18 | * |
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| 19 | * $Id$ |
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| 20 | */ |
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| 21 | |
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[e6ff222] | 22 | #ifndef __ERC32_BSP_h |
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| 23 | #define __ERC32_BSP_h |
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[7f96eef] | 24 | |
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| 25 | #ifdef __cplusplus |
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| 26 | extern "C" { |
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| 27 | #endif |
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| 28 | |
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[ac43f07] | 29 | #include <bspopts.h> |
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| 30 | |
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[7f96eef] | 31 | #include <rtems.h> |
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[206e590] | 32 | #include <rtems/iosupp.h> |
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[5354ab0] | 33 | #include <erc32.h> |
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[206e590] | 34 | #include <rtems/clockdrv.h> |
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[df49c60] | 35 | |
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[206e590] | 36 | #include <rtems/console.h> |
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[df49c60] | 37 | |
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| 38 | /* |
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| 39 | * confdefs.h overrides for this BSP: |
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| 40 | * - two termios serial ports |
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| 41 | * - Interrupt stack space is not minimum if defined. |
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| 42 | */ |
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| 43 | |
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| 44 | #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 |
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| 45 | #define CONFIGURE_INTERRUPT_STACK_MEMORY (16 * 1024) |
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[7f96eef] | 46 | |
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[2700423] | 47 | /* |
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| 48 | * Network driver configuration |
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| 49 | */ |
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| 50 | |
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| 51 | struct rtems_bsdnet_ifconfig; |
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| 52 | extern int rtems_erc32_sonic_driver_attach (struct rtems_bsdnet_ifconfig *config); |
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| 53 | #define RTEMS_BSP_NETWORK_DRIVER_NAME "sonic1" |
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| 54 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_erc32_sonic_driver_attach |
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| 55 | |
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[7f96eef] | 56 | /* |
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| 57 | * Define the time limits for RTEMS Test Suite test durations. |
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| 58 | * Long test and short test duration limits are provided. These |
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| 59 | * values are in seconds and need to be converted to ticks for the |
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| 60 | * application. |
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| 61 | * |
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| 62 | */ |
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| 63 | |
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| 64 | #define MAX_LONG_TEST_DURATION 3 /* 3 seconds */ |
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| 65 | #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ |
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| 66 | |
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| 67 | /* |
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| 68 | * Define the interrupt mechanism for Time Test 27 |
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| 69 | * |
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| 70 | * NOTE: Since the interrupt code for the SPARC supports both synchronous |
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| 71 | * and asynchronous trap handlers, support for testing with both |
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| 72 | * is included. |
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| 73 | */ |
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| 74 | |
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[e6ff222] | 75 | #define ERC32_BSP_USE_SYNCHRONOUS_TRAP 0 |
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[7f96eef] | 76 | |
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| 77 | /* |
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| 78 | * The synchronous trap is an arbitrarily chosen software trap. |
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| 79 | */ |
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| 80 | |
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[e6ff222] | 81 | #if (ERC32_BSP_USE_SYNCHRONOUS_TRAP == 1) |
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[7f96eef] | 82 | |
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| 83 | #define TEST_VECTOR SPARC_SYNCHRONOUS_TRAP( 0x90 ) |
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| 84 | |
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| 85 | #define MUST_WAIT_FOR_INTERRUPT 1 |
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| 86 | |
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| 87 | #define Install_tm27_vector( handler ) \ |
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| 88 | set_vector( (handler), TEST_VECTOR, 1 ); |
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| 89 | |
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| 90 | #define Cause_tm27_intr() \ |
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| 91 | asm volatile( "ta 0x10; nop " ); |
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| 92 | |
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| 93 | #define Clear_tm27_intr() |
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| 94 | |
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| 95 | #define Lower_tm27_intr() |
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| 96 | |
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| 97 | /* |
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| 98 | * The asynchronous trap is an arbitrarily chosen ERC32 interrupt source. |
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| 99 | */ |
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| 100 | |
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| 101 | #else /* use a regular asynchronous trap */ |
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| 102 | |
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| 103 | #define TEST_INTERRUPT_SOURCE ERC32_INTERRUPT_EXTERNAL_1 |
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[5354ab0] | 104 | #define TEST_INTERRUPT_SOURCE2 (ERC32_INTERRUPT_EXTERNAL_1+1) |
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[7f96eef] | 105 | #define TEST_VECTOR ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE ) |
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[5354ab0] | 106 | #define TEST_VECTOR2 ERC32_TRAP_TYPE( TEST_INTERRUPT_SOURCE2 ) |
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[7f96eef] | 107 | |
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| 108 | #define MUST_WAIT_FOR_INTERRUPT 1 |
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| 109 | |
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| 110 | #define Install_tm27_vector( handler ) \ |
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[5354ab0] | 111 | set_vector( (handler), TEST_VECTOR, 1 ); \ |
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| 112 | set_vector( (handler), TEST_VECTOR2, 1 ); |
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[7f96eef] | 113 | |
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| 114 | #define Cause_tm27_intr() \ |
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| 115 | do { \ |
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[5354ab0] | 116 | ERC32_Force_interrupt( TEST_INTERRUPT_SOURCE+(Interrupt_nest>>1) ); \ |
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[7f96eef] | 117 | nop(); \ |
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| 118 | nop(); \ |
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| 119 | nop(); \ |
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| 120 | } while (0) |
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| 121 | |
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| 122 | #define Clear_tm27_intr() \ |
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| 123 | ERC32_Clear_interrupt( TEST_INTERRUPT_SOURCE ) |
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| 124 | |
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| 125 | #define Lower_tm27_intr() |
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| 126 | |
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| 127 | #endif |
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| 128 | |
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| 129 | /* |
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| 130 | * Simple spin delay in microsecond units for device drivers. |
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| 131 | * This is very dependent on the clock speed of the target. |
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| 132 | */ |
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| 133 | |
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[1be1e913] | 134 | extern void Clock_delay(uint32_t microseconds); |
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[7f96eef] | 135 | |
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[5354ab0] | 136 | #define delay( microseconds ) Clock_delay(microseconds) |
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[7f96eef] | 137 | |
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| 138 | /* Constants */ |
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| 139 | |
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| 140 | /* |
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| 141 | * Information placed in the linkcmds file. |
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| 142 | */ |
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| 143 | |
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| 144 | extern int RAM_START; |
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| 145 | extern int RAM_END; |
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| 146 | extern int RAM_SIZE; |
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| 147 | |
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| 148 | extern int PROM_START; |
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| 149 | extern int PROM_END; |
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| 150 | extern int PROM_SIZE; |
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| 151 | |
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| 152 | extern int CLOCK_SPEED; |
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| 153 | |
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| 154 | extern int end; /* last address in the program */ |
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| 155 | |
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| 156 | /* |
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| 157 | * Device Driver Table Entries |
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| 158 | */ |
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| 159 | |
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| 160 | /* |
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| 161 | * NOTE: Use the standard Console driver entry |
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| 162 | */ |
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| 163 | |
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| 164 | /* |
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| 165 | * NOTE: Use the standard Clock driver entry |
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| 166 | */ |
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| 167 | |
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| 168 | |
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| 169 | /* miscellaneous stuff assumed to exist */ |
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| 170 | |
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| 171 | void bsp_cleanup( void ); |
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| 172 | |
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| 173 | void bsp_start( void ); |
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| 174 | |
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| 175 | rtems_isr_entry set_vector( /* returns old vector */ |
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| 176 | rtems_isr_entry handler, /* isr routine */ |
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| 177 | rtems_vector_number vector, /* vector number */ |
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| 178 | int type /* RTEMS or RAW intr */ |
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| 179 | ); |
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| 180 | |
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| 181 | void DEBUG_puts( char *string ); |
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| 182 | |
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| 183 | void BSP_fatal_return( void ); |
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| 184 | |
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| 185 | void bsp_spurious_initialize( void ); |
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| 186 | |
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| 187 | extern rtems_configuration_table BSP_Configuration; /* owned by BSP */ |
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| 188 | |
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| 189 | extern rtems_cpu_table Cpu_table; /* owned by BSP */ |
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| 190 | |
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| 191 | #ifdef __cplusplus |
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| 192 | } |
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| 193 | #endif |
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| 194 | |
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| 195 | #endif |
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| 196 | /* end of include file */ |
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