source: rtems/c/src/lib/libbsp/sparc/erc32/erc32sonic/erc32sonic.c @ 2700423

4.104.114.84.95
Last change on this file since 2700423 was 2700423, checked in by Joel Sherrill <joel.sherrill@…>, on 11/13/00 at 22:29:14

2000-11-13 Jiri Gaisler <jgais@…>

  • Makefile.am, configure.in, gnatsupp/Makefile.am, gnatsupp/gnatsupp.c, include/Makefile.am, include/bsp.h, start/Makefile.am, startup/Makefile.am, startup/setvec.c, wrapup/Makefile.am:
  • erc32sonic: New directory.
  • erc32sonic/Makefile.am, erc32sonic/erc32sonic.c, erc32sonic/.cvsignore: New files.
  • include/erc32.h: New file.
  • startup/boardinit.S: New file. Big update of SPARC support for ERC32 and LEON. Added support for ERC32 without floating point. Added SONIC support as configured on Tharsys ERC32 board. The bsp's share various code in the shared directory:

gnat-support, start-up code, etc.

To decrease the foot-print, I removed the 16 kbyte start-up
stack that was put in .bss and never reused once the system
was up. The stack is now put between the heap and the
workspace. To reclaim it, the user can do a rtems_region_extend
to merge the stack to the heap region once the system is up.

  • Property mode set to 100644
File size: 2.8 KB
RevLine 
[2700423]1/*
2 *  THARSYS VME SPARC RT board SONIC Configuration Information
3 *
4 *  References:
5 *
6 *  1) SVME/DMV-171 Single Board Computer Documentation Package, #805905,
7 *     DY 4 Systems Inc., Kanata, Ontario, September, 1996.
8 *
9 *  $Id$
10 */
11
12#include <bsp.h>
13#include <libchip/sonic.h>
14#if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS)
15#include <stdio.h>
16#endif
17
18void erc32_sonic_write_register(
19  void       *base,
20  unsigned32  regno,
21  unsigned32  value
22)
23{
24  volatile unsigned32 *p = base;
25
26#if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS)
27  printf( "%p Write 0x%04x to %s (0x%02x)\n",
28      &p[regno], value, SONIC_Reg_name[regno], regno );
29  fflush( stdout );
30#endif
31  p[regno] = 0x0ffff & value;
32}
33
34unsigned32 erc32_sonic_read_register(
35  void       *base,
36  unsigned32  regno
37)
38{
39  volatile unsigned32 *p = base;
40  unsigned32           value;
41
42  value = p[regno];
43#if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS)
44  printf( "%p Read 0x%04x from %s (0x%02x)\n",
45      &p[regno], value, SONIC_Reg_name[regno], regno );
46  fflush( stdout );
47#endif
48  return 0x0ffff & value;
49}
50
51/*
52 * Default sizes of transmit and receive descriptor areas
53 */
54#define RDA_COUNT     20 /* 20 */
55#define TDA_COUNT     20 /* 10 */
56
57/*
58 * Default device configuration register values
59 * Conservative, generic values.
60 * DCR:
61 *      No extended bus mode
62 *      Unlatched bus retry
63 *      Programmable outputs unused
64 *      Asynchronous bus mode
65 *      User definable pins unused
66 *      No wait states (access time controlled by DTACK*)
67 *      32-bit DMA
68 *      Empty/Fill DMA mode
69 *      Maximum Transmit/Receive FIFO
70 * DC2:
71 *      Extended programmable outputs unused
72 *      Normal HOLD request
73 *      Packet compress output unused
74 *      No reject on CAM match
75 */
76#define SONIC_DCR  ( DCR_DW32 | DCR_RFT24 | DCR_TFT28)
77#define SONIC_DC2 (0)
78
79/*
80 * Default location of device registers
81 */
82#define SONIC_BASE_ADDRESS 0x10000100
83
84/*
85 * Default interrupt vector
86 */
87#define SONIC_VECTOR 0x1E
88
89sonic_configuration_t erc32_sonic_configuration = {
90  SONIC_BASE_ADDRESS,        /* base address */
91  SONIC_VECTOR,              /* vector number */
92  SONIC_DCR,                 /* DCR register value */
93  SONIC_DC2,                 /* DC2 register value */
94  TDA_COUNT,                 /* number of transmit descriptors */
95  RDA_COUNT,                 /* number of receive descriptors */
96  erc32_sonic_write_register,
97  erc32_sonic_read_register
98};
99
100int rtems_erc32_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config)
101{
102
103  ERC32_MEC.IO_Configuration |= (0x15 << (((SONIC_BASE_ADDRESS >> 24) & 0x3) * 8));
104  ERC32_MEC.Control &= ~0xe0000;        /* Disable DMA time-out and parity */
105  ERC32_MEC.Control |= 0x10001;                 /* Enable DMA */
106  ERC32_MEC.Interrupt_Mask &= ~0x000340;
107  *((volatile int *) 0x10000300) = 0;
108  return(rtems_sonic_driver_attach( config, &erc32_sonic_configuration ));
109 
110}
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