1 | /** |
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2 | * @file |
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3 | * |
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4 | * @brief Driver for serial ports on the ERC32. |
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5 | */ |
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6 | |
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7 | /* |
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8 | * Copyright (c) 2010 Tiemen Schut <T.Schut@sron.nl> |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.org/license/LICENSE. |
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13 | */ |
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14 | |
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15 | #include <unistd.h> |
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16 | #include <termios.h> |
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17 | #include <stdlib.h> |
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18 | |
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19 | #include <rtems.h> |
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20 | #include <rtems/libio.h> |
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21 | #include <rtems/console.h> |
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22 | #include <rtems/termiostypes.h> |
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23 | |
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24 | #include <libchip/serial.h> |
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25 | #include <libchip/sersupp.h> |
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26 | |
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27 | #include <bsp.h> |
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28 | #include <bspopts.h> |
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29 | |
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30 | #define CONSOLE_BUF_SIZE (16) |
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31 | |
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32 | #define CONSOLE_UART_A_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_A_RX_TX) |
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33 | #define CONSOLE_UART_B_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_B_RX_TX) |
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34 | |
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35 | static uint8_t erc32_console_get_register(uintptr_t addr, uint8_t i) |
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36 | { |
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37 | volatile uint32_t *reg = (volatile uint32_t *)addr; |
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38 | return (uint8_t) reg [i]; |
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39 | } |
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40 | |
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41 | static void erc32_console_set_register(uintptr_t addr, uint8_t i, uint8_t val) |
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42 | { |
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43 | volatile uint32_t *reg = (volatile uint32_t *)addr; |
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44 | reg [i] = val; |
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45 | } |
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46 | |
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47 | static int erc32_console_first_open(int major, int minor, void *arg); |
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48 | |
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49 | #if (CONSOLE_USE_INTERRUPTS) |
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50 | static ssize_t erc32_console_write_support_int( |
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51 | int minor, const char *buf, size_t len); |
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52 | #else |
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53 | int console_inbyte_nonblocking( int port ); |
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54 | static ssize_t erc32_console_write_support_polled( |
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55 | int minor, const char *buf, size_t len); |
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56 | #endif |
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57 | static void erc32_console_initialize(int minor); |
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58 | |
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59 | #if (CONSOLE_USE_INTERRUPTS) |
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60 | const console_fns erc32_fns = { |
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61 | libchip_serial_default_probe, /* deviceProbe */ |
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62 | erc32_console_first_open, /* deviceFirstOpen */ |
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63 | NULL, /* deviceLastClose */ |
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64 | NULL, /* deviceRead */ |
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65 | erc32_console_write_support_int, /* deviceWrite */ |
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66 | erc32_console_initialize, /* deviceInitialize */ |
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67 | NULL, /* deviceWritePolled */ |
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68 | NULL, /* deviceSetAttributes */ |
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69 | TERMIOS_IRQ_DRIVEN /* deviceOutputUsesInterrupts */ |
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70 | }; |
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71 | #else |
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72 | const console_fns erc32_fns = { |
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73 | libchip_serial_default_probe, /* deviceProbe */ |
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74 | erc32_console_first_open, /* deviceFirstOpen */ |
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75 | NULL, /* deviceLastClose */ |
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76 | console_inbyte_nonblocking, /* deviceRead */ |
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77 | erc32_console_write_support_polled, /* deviceWrite */ |
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78 | erc32_console_initialize, /* deviceInitialize */ |
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79 | NULL, /* deviceWritePolled */ |
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80 | NULL, /* deviceSetAttributes */ |
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81 | TERMIOS_POLLED /* deviceOutputUsesInterrupts */ |
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82 | }; |
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83 | #endif |
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84 | |
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85 | console_tbl Console_Configuration_Ports [] = { |
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86 | { |
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87 | .sDeviceName = "/dev/console_a", |
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88 | .deviceType = SERIAL_CUSTOM, |
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89 | .pDeviceFns = &erc32_fns, |
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90 | .deviceProbe = NULL, |
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91 | .pDeviceFlow = NULL, |
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92 | .ulMargin = 16, |
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93 | .ulHysteresis = 8, |
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94 | .pDeviceParams = (void *) -1, /* could be baud rate */ |
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95 | .ulCtrlPort1 = 0, |
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96 | .ulCtrlPort2 = 0, |
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97 | .ulDataPort = 0, |
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98 | .getRegister = erc32_console_get_register, |
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99 | .setRegister = erc32_console_set_register, |
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100 | .getData = NULL, |
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101 | .setData = NULL, |
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102 | .ulClock = 16, |
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103 | .ulIntVector = ERC32_INTERRUPT_UART_A_RX_TX |
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104 | }, |
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105 | { |
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106 | .sDeviceName = "/dev/console_b", |
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107 | .deviceType = SERIAL_CUSTOM, |
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108 | .pDeviceFns = &erc32_fns, |
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109 | .deviceProbe = NULL, |
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110 | .pDeviceFlow = NULL, |
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111 | .ulMargin = 16, |
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112 | .ulHysteresis = 8, |
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113 | .pDeviceParams = (void *) -1, /* could be baud rate */ |
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114 | .ulCtrlPort1 = 0, |
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115 | .ulCtrlPort2 = 0, |
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116 | .ulDataPort = 0, |
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117 | .getRegister = erc32_console_get_register, |
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118 | .setRegister = erc32_console_set_register, |
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119 | .getData = NULL, |
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120 | .setData = NULL, |
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121 | .ulClock = 16, |
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122 | .ulIntVector = ERC32_INTERRUPT_UART_B_RX_TX |
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123 | }, |
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124 | }; |
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125 | |
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126 | /* always exactly two uarts for erc32 */ |
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127 | #define ERC32_UART_COUNT (2) |
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128 | |
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129 | unsigned long Console_Configuration_Count = ERC32_UART_COUNT; |
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130 | |
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131 | static int erc32_console_first_open(int major, int minor, void *arg) |
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132 | { |
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133 | /* Check minor number */ |
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134 | if (minor < 0 || minor > 1) { |
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135 | return -1; |
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136 | } |
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137 | |
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138 | rtems_libio_open_close_args_t *oca = arg; |
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139 | struct rtems_termios_tty *tty = oca->iop->data1; |
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140 | console_tbl *ct = Console_Port_Tbl [minor]; |
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141 | console_data *cd = &Console_Port_Data [minor]; |
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142 | |
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143 | cd->termios_data = tty; |
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144 | rtems_termios_set_initial_baud(tty, (int32_t)ct->pDeviceParams); |
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145 | |
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146 | return 0; |
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147 | } |
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148 | |
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149 | #if (CONSOLE_USE_INTERRUPTS) |
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150 | static ssize_t erc32_console_write_support_int(int minor, const char *buf, size_t len) |
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151 | { |
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152 | if (len > 0) { |
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153 | console_data *cd = &Console_Port_Data[minor]; |
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154 | int k = 0; |
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155 | |
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156 | if (minor == 0) { /* uart a */ |
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157 | for (k = 0; |
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158 | k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA); k ++) { |
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159 | ERC32_MEC.UART_Channel_A = (unsigned char)buf[k]; |
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160 | } |
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161 | ERC32_Force_interrupt(ERC32_INTERRUPT_UART_A_RX_TX); |
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162 | } else { /* uart b */ |
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163 | for (k = 0; |
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164 | k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB); k ++) { |
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165 | ERC32_MEC.UART_Channel_B = (unsigned char)buf[k]; |
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166 | } |
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167 | ERC32_Force_interrupt(ERC32_INTERRUPT_UART_B_RX_TX); |
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168 | } |
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169 | |
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170 | cd->pDeviceContext = (void *)k; |
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171 | cd->bActive = true; |
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172 | } |
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173 | |
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174 | return 0; |
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175 | } |
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176 | |
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177 | static void erc32_console_isr_error( |
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178 | rtems_vector_number vector |
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179 | ) |
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180 | { |
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181 | int UStat; |
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182 | |
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183 | UStat = ERC32_MEC.UART_Status; |
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184 | |
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185 | if (UStat & ERC32_MEC_UART_STATUS_ERRA) { |
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186 | ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA; |
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187 | ERC32_MEC.Control = ERC32_MEC.Control; |
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188 | } |
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189 | |
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190 | if (UStat & ERC32_MEC_UART_STATUS_ERRB) { |
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191 | ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRB; |
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192 | ERC32_MEC.Control = ERC32_MEC.Control; |
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193 | } |
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194 | |
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195 | ERC32_Clear_interrupt( ERC32_INTERRUPT_UART_ERROR ); |
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196 | } |
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197 | |
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198 | static void erc32_console_isr_a( |
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199 | rtems_vector_number vector |
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200 | ) |
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201 | { |
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202 | console_data *cd = &Console_Port_Data[0]; |
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203 | |
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204 | /* check for error */ |
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205 | if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRA) { |
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206 | ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA; |
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207 | ERC32_MEC.Control = ERC32_MEC.Control; |
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208 | } |
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209 | |
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210 | do { |
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211 | int chars_to_dequeue = (int)cd->pDeviceContext; |
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212 | int rv = 0; |
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213 | int i = 0; |
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214 | char buf[CONSOLE_BUF_SIZE]; |
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215 | |
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216 | /* enqueue received chars */ |
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217 | while (i < CONSOLE_BUF_SIZE) { |
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218 | if (!(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRA)) |
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219 | break; |
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220 | buf[i] = ERC32_MEC.UART_Channel_A; |
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221 | ++i; |
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222 | } |
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223 | if ( i ) |
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224 | rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i); |
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225 | |
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226 | /* dequeue transmitted chars */ |
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227 | if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA) { |
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228 | rv = rtems_termios_dequeue_characters( |
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229 | cd->termios_data, chars_to_dequeue); |
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230 | if ( !rv ) { |
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231 | cd->pDeviceContext = 0; |
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232 | cd->bActive = false; |
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233 | } |
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234 | ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_A_RX_TX); |
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235 | } |
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236 | } while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_A_RX_TX)); |
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237 | } |
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238 | |
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239 | static void erc32_console_isr_b( |
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240 | rtems_vector_number vector |
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241 | ) |
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242 | { |
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243 | console_data *cd = &Console_Port_Data[1]; |
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244 | |
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245 | /* check for error */ |
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246 | if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRB) { |
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247 | ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRB; |
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248 | ERC32_MEC.Control = ERC32_MEC.Control; |
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249 | } |
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250 | |
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251 | do { |
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252 | int chars_to_dequeue = (int)cd->pDeviceContext; |
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253 | int rv = 0; |
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254 | int i = 0; |
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255 | char buf[CONSOLE_BUF_SIZE]; |
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256 | |
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257 | /* enqueue received chars */ |
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258 | while (i < CONSOLE_BUF_SIZE) { |
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259 | if (!(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRB)) |
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260 | break; |
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261 | buf[i] = ERC32_MEC.UART_Channel_B; |
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262 | ++i; |
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263 | } |
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264 | if ( i ) |
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265 | rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i); |
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266 | |
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267 | /* dequeue transmitted chars */ |
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268 | if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB) { |
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269 | rv = rtems_termios_dequeue_characters( |
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270 | cd->termios_data, chars_to_dequeue); |
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271 | if ( !rv ) { |
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272 | cd->pDeviceContext = 0; |
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273 | cd->bActive = false; |
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274 | } |
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275 | ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_B_RX_TX); |
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276 | } |
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277 | } while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_B_RX_TX)); |
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278 | } |
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279 | #else |
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280 | |
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281 | extern void console_outbyte_polled( int port, unsigned char ch ); |
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282 | |
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283 | static ssize_t erc32_console_write_support_polled( |
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284 | int minor, |
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285 | const char *buf, |
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286 | size_t len |
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287 | ) |
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288 | { |
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289 | int nwrite = 0; |
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290 | |
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291 | while (nwrite < len) { |
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292 | console_outbyte_polled( minor, *buf++ ); |
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293 | nwrite++; |
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294 | } |
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295 | return nwrite; |
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296 | } |
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297 | |
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298 | #endif |
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299 | |
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300 | |
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301 | /* |
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302 | * Console Device Driver Entry Points |
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303 | * |
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304 | */ |
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305 | |
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306 | static void erc32_console_initialize( |
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307 | int minor |
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308 | ) |
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309 | { |
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310 | console_data *cd = &Console_Port_Data [minor]; |
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311 | |
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312 | cd->bActive = false; |
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313 | cd->pDeviceContext = 0; |
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314 | |
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315 | /* |
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316 | * Initialize the Termios infrastructure. If Termios has already |
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317 | * been initialized by another device driver, then this call will |
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318 | * have no effect. |
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319 | */ |
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320 | rtems_termios_initialize(); |
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321 | |
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322 | /* |
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323 | * Initialize Hardware |
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324 | */ |
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325 | #if (CONSOLE_USE_INTERRUPTS) |
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326 | set_vector(erc32_console_isr_a, CONSOLE_UART_A_TRAP, 1); |
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327 | set_vector(erc32_console_isr_b, CONSOLE_UART_B_TRAP, 1); |
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328 | set_vector(erc32_console_isr_error, CONSOLE_UART_ERROR_TRAP, 1); |
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329 | #endif |
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330 | |
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331 | /* Clear any previous error flags */ |
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332 | ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA; |
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333 | ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRB; |
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334 | } |
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