[e455a12] | 1 | /** |
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| 2 | * @file |
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| 3 | * |
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| 4 | * @brief Driver for serial ports on the ERC32. |
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| 5 | */ |
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| 6 | |
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| 7 | /* |
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| 8 | * Copyright (c) 2010 Tiemen Schut <T.Schut@sron.nl> |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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| 12 | * http://www.rtems.com/license/LICENSE. |
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| 13 | * |
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| 14 | * $Id$ |
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| 15 | */ |
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| 16 | |
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| 17 | #include <unistd.h> |
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| 18 | #include <termios.h> |
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| 19 | #include <stdlib.h> |
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| 20 | |
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| 21 | #include <rtems.h> |
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| 22 | #include <rtems/libio.h> |
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| 23 | #include <rtems/console.h> |
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| 24 | #include <rtems/termiostypes.h> |
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| 25 | |
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| 26 | #include <libchip/serial.h> |
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| 27 | #include <libchip/sersupp.h> |
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| 28 | |
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| 29 | #include <bsp.h> |
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[bf00d1d] | 30 | #include <bspopts.h> |
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[e455a12] | 31 | |
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| 32 | #define CONSOLE_BUF_SIZE (16) |
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| 33 | |
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| 34 | #define CONSOLE_UART_A_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_A_RX_TX) |
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| 35 | #define CONSOLE_UART_B_TRAP ERC32_TRAP_TYPE(ERC32_INTERRUPT_UART_B_RX_TX) |
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| 36 | |
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| 37 | static uint8_t erc32_console_get_register(uint32_t addr, uint8_t i) |
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| 38 | { |
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[f787428f] | 39 | volatile uint32_t *reg = (volatile uint32_t *)addr; |
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| 40 | return (uint8_t) reg [i]; |
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[e455a12] | 41 | } |
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| 42 | |
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| 43 | static void erc32_console_set_register(uint32_t addr, uint8_t i, uint8_t val) |
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| 44 | { |
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[f787428f] | 45 | volatile uint32_t *reg = (volatile uint32_t *)addr; |
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| 46 | reg [i] = val; |
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[e455a12] | 47 | } |
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| 48 | |
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| 49 | static int erc32_console_first_open(int major, int minor, void *arg); |
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[bf00d1d] | 50 | |
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| 51 | #if (CONSOLE_USE_INTERRUPTS) |
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[f787428f] | 52 | static ssize_t erc32_console_write_support_int( |
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[bf00d1d] | 53 | int minor, const char *buf, size_t len); |
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| 54 | #else |
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[f787428f] | 55 | int console_inbyte_nonblocking( int port ); |
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| 56 | static ssize_t erc32_console_write_support_polled( |
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| 57 | int minor, const char *buf, size_t len); |
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[bf00d1d] | 58 | #endif |
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[e455a12] | 59 | static void erc32_console_initialize(int minor); |
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| 60 | |
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| 61 | rtems_device_minor_number Console_Port_Minor = 0; |
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| 62 | |
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[bf00d1d] | 63 | #if (CONSOLE_USE_INTERRUPTS) |
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| 64 | console_fns erc32_fns = { |
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[e455a12] | 65 | libchip_serial_default_probe, /* deviceProbe */ |
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| 66 | erc32_console_first_open, /* deviceFirstOpen */ |
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| 67 | NULL, /* deviceLastClose */ |
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| 68 | NULL, /* deviceRead */ |
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| 69 | erc32_console_write_support_int, /* deviceWrite */ |
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| 70 | erc32_console_initialize, /* deviceInitialize */ |
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| 71 | NULL, /* deviceWritePolled */ |
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| 72 | NULL, /* deviceSetAttributes */ |
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[bf00d1d] | 73 | TERMIOS_IRQ_DRIVEN /* deviceOutputUsesInterrupts */ |
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| 74 | }; |
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| 75 | #else |
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| 76 | console_fns erc32_fns = { |
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| 77 | libchip_serial_default_probe, /* deviceProbe */ |
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| 78 | erc32_console_first_open, /* deviceFirstOpen */ |
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| 79 | NULL, /* deviceLastClose */ |
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| 80 | console_inbyte_nonblocking, /* deviceRead */ |
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| 81 | erc32_console_write_support_polled, /* deviceWrite */ |
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| 82 | erc32_console_initialize, /* deviceInitialize */ |
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| 83 | NULL, /* deviceWritePolled */ |
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| 84 | NULL, /* deviceSetAttributes */ |
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| 85 | TERMIOS_POLLED /* deviceOutputUsesInterrupts */ |
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| 86 | }; |
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| 87 | #endif |
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[e455a12] | 88 | |
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| 89 | console_tbl Console_Port_Tbl [] = { |
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[f787428f] | 90 | { |
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| 91 | .sDeviceName = "/dev/console_a", |
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| 92 | .deviceType = SERIAL_CUSTOM, |
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| 93 | .pDeviceFns = &erc32_fns, |
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| 94 | .deviceProbe = NULL, |
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| 95 | .pDeviceFlow = NULL, |
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| 96 | .ulMargin = 16, |
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| 97 | .ulHysteresis = 8, |
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| 98 | .pDeviceParams = (void *) -1, /* could be baud rate */ |
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| 99 | .ulCtrlPort1 = 0, |
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| 100 | .ulCtrlPort2 = 0, |
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| 101 | .ulDataPort = 0, |
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| 102 | .getRegister = erc32_console_get_register, |
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| 103 | .setRegister = erc32_console_set_register, |
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| 104 | .getData = NULL, |
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| 105 | .setData = NULL, |
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| 106 | .ulClock = 16, |
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| 107 | .ulIntVector = ERC32_INTERRUPT_UART_A_RX_TX |
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| 108 | }, |
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| 109 | { |
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| 110 | .sDeviceName = "/dev/console_b", |
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| 111 | .deviceType = SERIAL_CUSTOM, |
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| 112 | .pDeviceFns = &erc32_fns, |
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| 113 | .deviceProbe = NULL, |
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| 114 | .pDeviceFlow = NULL, |
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| 115 | .ulMargin = 16, |
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| 116 | .ulHysteresis = 8, |
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| 117 | .pDeviceParams = (void *) -1, /* could be baud rate */ |
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| 118 | .ulCtrlPort1 = 0, |
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| 119 | .ulCtrlPort2 = 0, |
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| 120 | .ulDataPort = 0, |
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| 121 | .getRegister = erc32_console_get_register, |
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| 122 | .setRegister = erc32_console_set_register, |
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| 123 | .getData = NULL, |
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| 124 | .setData = NULL, |
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| 125 | .ulClock = 16, |
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| 126 | .ulIntVector = ERC32_INTERRUPT_UART_B_RX_TX |
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| 127 | }, |
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[e455a12] | 128 | }; |
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| 129 | |
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| 130 | /* always exactly two uarts for erc32 */ |
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| 131 | #define ERC32_UART_COUNT (2) |
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| 132 | |
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| 133 | unsigned long Console_Port_Count = ERC32_UART_COUNT; |
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| 134 | |
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| 135 | console_data Console_Port_Data [ERC32_UART_COUNT]; |
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| 136 | |
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| 137 | static int erc32_console_first_open(int major, int minor, void *arg) |
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| 138 | { |
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[f787428f] | 139 | /* Check minor number */ |
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| 140 | if (minor < 0 || minor > 1) { |
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| 141 | return -1; |
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| 142 | } |
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| 143 | |
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| 144 | rtems_libio_open_close_args_t *oca = arg; |
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| 145 | struct rtems_termios_tty *tty = oca->iop->data1; |
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| 146 | console_tbl *ct = &Console_Port_Tbl [minor]; |
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| 147 | console_data *cd = &Console_Port_Data [minor]; |
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| 148 | |
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| 149 | cd->termios_data = tty; |
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| 150 | rtems_termios_set_initial_baud(tty, (int32_t)ct->pDeviceParams); |
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| 151 | |
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| 152 | return 0; |
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[e455a12] | 153 | } |
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| 154 | |
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[bf00d1d] | 155 | #if (CONSOLE_USE_INTERRUPTS) |
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[e455a12] | 156 | static ssize_t erc32_console_write_support_int(int minor, const char *buf, size_t len) |
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| 157 | { |
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[f787428f] | 158 | console_data *cd = &Console_Port_Data[minor]; |
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| 159 | int k = 0; |
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| 160 | |
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| 161 | if (minor == 0) { /* uart a */ |
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| 162 | for (k = 0; |
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| 163 | k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA); k ++) { |
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| 164 | ERC32_MEC.UART_Channel_A = (unsigned char)buf[k]; |
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[e455a12] | 165 | } |
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[f787428f] | 166 | ERC32_Force_interrupt(ERC32_INTERRUPT_UART_A_RX_TX); |
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| 167 | } else { /* uart b */ |
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| 168 | for (k = 0; |
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| 169 | k < len && (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB); k ++) { |
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| 170 | ERC32_MEC.UART_Channel_B = (unsigned char)buf[k]; |
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[e455a12] | 171 | } |
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[f787428f] | 172 | ERC32_Force_interrupt(ERC32_INTERRUPT_UART_B_RX_TX); |
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| 173 | } |
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| 174 | |
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| 175 | if (len > 0) { |
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| 176 | cd->pDeviceContext = (void *)k; |
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| 177 | cd->bActive = true; |
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| 178 | } |
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| 179 | |
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| 180 | return 0; |
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[e455a12] | 181 | } |
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| 182 | |
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| 183 | static void erc32_console_isr_a( |
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[f787428f] | 184 | rtems_vector_number vector |
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[e455a12] | 185 | ) |
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| 186 | { |
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[f787428f] | 187 | console_data *cd = &Console_Port_Data[0]; |
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[e455a12] | 188 | |
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[f787428f] | 189 | /* check for error */ |
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| 190 | if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRA) { |
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| 191 | ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRA; |
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| 192 | ERC32_MEC.Control = ERC32_MEC.Control; |
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| 193 | } |
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[e455a12] | 194 | |
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[f787428f] | 195 | do { |
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| 196 | int chars_to_dequeue = (int)cd->pDeviceContext; |
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| 197 | int rv = 0; |
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| 198 | int i = 0; |
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| 199 | char buf[CONSOLE_BUF_SIZE]; |
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[e455a12] | 200 | |
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[f787428f] | 201 | /* enqueue received chars */ |
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| 202 | while (i < CONSOLE_BUF_SIZE) { |
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| 203 | if (!(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRA)) |
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| 204 | break; |
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| 205 | buf[i] = ERC32_MEC.UART_Channel_A; |
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| 206 | ++i; |
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| 207 | } |
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| 208 | if ( i ) |
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| 209 | rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i); |
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| 210 | |
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| 211 | /* dequeue transmitted chars */ |
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| 212 | if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEA) { |
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| 213 | rv = rtems_termios_dequeue_characters( |
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| 214 | cd->termios_data, chars_to_dequeue); |
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| 215 | if ( !rv ) { |
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[e455a12] | 216 | cd->pDeviceContext = 0; |
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[f787428f] | 217 | cd->bActive = false; |
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| 218 | } |
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| 219 | ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_A_RX_TX); |
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| 220 | } |
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| 221 | } while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_A_RX_TX)); |
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[e455a12] | 222 | } |
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| 223 | |
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| 224 | static void erc32_console_isr_b( |
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[f787428f] | 225 | rtems_vector_number vector |
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[e455a12] | 226 | ) |
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| 227 | { |
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[f787428f] | 228 | console_data *cd = &Console_Port_Data[1]; |
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[e455a12] | 229 | |
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[f787428f] | 230 | /* check for error */ |
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| 231 | if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_ERRB) { |
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| 232 | ERC32_MEC.UART_Status = ERC32_MEC_UART_STATUS_CLRB; |
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| 233 | ERC32_MEC.Control = ERC32_MEC.Control; |
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| 234 | } |
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[e455a12] | 235 | |
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[f787428f] | 236 | do { |
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| 237 | int chars_to_dequeue = (int)cd->pDeviceContext; |
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| 238 | int rv = 0; |
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| 239 | int i = 0; |
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| 240 | char buf[CONSOLE_BUF_SIZE]; |
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[e455a12] | 241 | |
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[f787428f] | 242 | /* enqueue received chars */ |
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| 243 | while (i < CONSOLE_BUF_SIZE) { |
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| 244 | if (!(ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_DRB)) |
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| 245 | break; |
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| 246 | buf[i] = ERC32_MEC.UART_Channel_B; |
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| 247 | ++i; |
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| 248 | } |
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| 249 | if ( i ) |
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| 250 | rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i); |
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| 251 | |
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| 252 | /* dequeue transmitted chars */ |
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| 253 | if (ERC32_MEC.UART_Status & ERC32_MEC_UART_STATUS_THEB) { |
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| 254 | rv = rtems_termios_dequeue_characters( |
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| 255 | cd->termios_data, chars_to_dequeue); |
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| 256 | if ( !rv ) { |
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[e455a12] | 257 | cd->pDeviceContext = 0; |
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[f787428f] | 258 | cd->bActive = false; |
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| 259 | } |
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| 260 | ERC32_Clear_interrupt (ERC32_INTERRUPT_UART_B_RX_TX); |
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| 261 | } |
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| 262 | } while (ERC32_Is_interrupt_pending (ERC32_INTERRUPT_UART_B_RX_TX)); |
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[e455a12] | 263 | } |
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[bf00d1d] | 264 | #else |
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| 265 | |
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| 266 | extern void console_outbyte_polled( int port, unsigned char ch ); |
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| 267 | |
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| 268 | static ssize_t erc32_console_write_support_polled( |
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| 269 | int minor, |
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| 270 | const char *buf, |
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| 271 | size_t len |
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| 272 | ) |
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| 273 | { |
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| 274 | int nwrite = 0; |
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| 275 | |
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| 276 | while (nwrite < len) { |
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| 277 | console_outbyte_polled( minor, *buf++ ); |
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| 278 | nwrite++; |
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| 279 | } |
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| 280 | return nwrite; |
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| 281 | } |
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| 282 | |
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| 283 | #endif |
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[e455a12] | 284 | |
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| 285 | |
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| 286 | /* |
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| 287 | * Console Device Driver Entry Points |
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| 288 | * |
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| 289 | */ |
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| 290 | |
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| 291 | static void erc32_console_initialize( |
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| 292 | int minor |
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| 293 | ) |
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| 294 | { |
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[f787428f] | 295 | console_data *cd = &Console_Port_Data [minor]; |
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| 296 | |
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| 297 | cd->bActive = false; |
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| 298 | cd->pDeviceContext = 0; |
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| 299 | |
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| 300 | /* |
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| 301 | * Initialize the Termios infrastructure. If Termios has already |
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| 302 | * been initialized by another device driver, then this call will |
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| 303 | * have no effect. |
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| 304 | */ |
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| 305 | rtems_termios_initialize(); |
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| 306 | |
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| 307 | /* |
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| 308 | * Initialize Hardware |
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| 309 | */ |
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| 310 | #if (CONSOLE_USE_INTERRUPTS) |
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[e455a12] | 311 | set_vector(erc32_console_isr_a, CONSOLE_UART_A_TRAP, 1); |
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| 312 | set_vector(erc32_console_isr_b, CONSOLE_UART_B_TRAP, 1); |
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[f787428f] | 313 | #endif |
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[e455a12] | 314 | } |
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