[7f96eef] | 1 | /* |
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| 2 | * Clock Tick Device Driver |
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| 3 | * |
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| 4 | * This routine initializes the Real Time Clock Counter Timer which is |
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| 5 | * part of the MEC on the ERC32 CPU. |
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| 6 | * |
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| 7 | * The tick frequency is directly programmed to the configured number of |
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| 8 | * microseconds per tick. |
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| 9 | * |
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[0e58c4f] | 10 | * COPYRIGHT (c) 1989-2008. |
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[7f96eef] | 11 | * On-Line Applications Research Corporation (OAR). |
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| 12 | * |
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[98e4ebf5] | 13 | * The license and distribution terms for this file may be |
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| 14 | * found in the file LICENSE in this distribution or at |
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[7d2a0641] | 15 | * http://www.rtems.com/license/LICENSE. |
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[7f96eef] | 16 | * |
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| 17 | * Ported to ERC32 implementation of the SPARC by On-Line Applications |
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[6128a4a] | 18 | * Research Corporation (OAR) under contract to the European Space |
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[7f96eef] | 19 | * Agency (ESA). |
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| 20 | * |
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[6128a4a] | 21 | * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. |
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[7f96eef] | 22 | * European Space Agency. |
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| 23 | * |
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| 24 | * $Id$ |
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| 25 | */ |
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| 26 | |
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| 27 | #include <bsp.h> |
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[74b09f1] | 28 | #include <bspopts.h> |
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| 29 | |
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| 30 | #if SIMSPARC_FAST_IDLE==1 |
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| 31 | #define CLOCK_DRIVER_USE_FAST_IDLE |
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| 32 | #endif |
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[7f96eef] | 33 | |
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| 34 | /* |
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| 35 | * The Real Time Clock Counter Timer uses this trap type. |
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| 36 | */ |
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| 37 | |
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| 38 | #define CLOCK_VECTOR ERC32_TRAP_TYPE( ERC32_INTERRUPT_REAL_TIME_CLOCK ) |
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| 39 | |
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[74b09f1] | 40 | #define Clock_driver_support_at_tick() |
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[7f96eef] | 41 | |
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[74b09f1] | 42 | #define Clock_driver_support_install_isr( _new, _old ) \ |
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| 43 | do { \ |
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| 44 | _old = set_vector( _new, CLOCK_VECTOR, 1 ); \ |
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| 45 | } while(0) |
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[7f96eef] | 46 | |
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| 47 | extern int CLOCK_SPEED; |
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| 48 | |
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[e907f7d9] | 49 | uint32_t bsp_clock_nanoseconds_since_last_tick(void) |
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| 50 | { |
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| 51 | uint32_t clicks; |
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[9ec55e63] | 52 | uint32_t usecs; |
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[e907f7d9] | 53 | |
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| 54 | clicks = ERC32_MEC.Real_Time_Clock_Counter; |
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| 55 | |
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[9ec55e63] | 56 | if ( ERC32_Is_interrupt_pending( ERC32_INTERRUPT_REAL_TIME_CLOCK ) ) { |
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| 57 | clicks = ERC32_MEC.Real_Time_Clock_Counter; |
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| 58 | usecs = (2*rtems_configuration_get_microseconds_per_tick() - clicks); |
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| 59 | } else { |
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| 60 | usecs = (rtems_configuration_get_microseconds_per_tick() - clicks); |
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| 61 | } |
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| 62 | return usecs * 1000; |
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[e907f7d9] | 63 | } |
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| 64 | |
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[b214b1ba] | 65 | #define Clock_driver_nanoseconds_since_last_tick \ |
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| 66 | bsp_clock_nanoseconds_since_last_tick |
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[e907f7d9] | 67 | |
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[74b09f1] | 68 | #define Clock_driver_support_initialize_hardware() \ |
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| 69 | do { \ |
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| 70 | /* approximately 1 us per countdown */ \ |
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| 71 | ERC32_MEC.Real_Time_Clock_Scalar = CLOCK_SPEED - 1; \ |
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| 72 | ERC32_MEC.Real_Time_Clock_Counter = \ |
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[2d25867] | 73 | rtems_configuration_get_microseconds_per_tick(); \ |
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[74b09f1] | 74 | \ |
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| 75 | ERC32_MEC_Set_Real_Time_Clock_Timer_Control( \ |
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| 76 | ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \ |
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[bf5ef93] | 77 | ERC32_MEC_TIMER_COUNTER_LOAD_SCALER | \ |
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| 78 | ERC32_MEC_TIMER_COUNTER_LOAD_COUNTER \ |
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[74b09f1] | 79 | ); \ |
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| 80 | \ |
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| 81 | ERC32_MEC_Set_Real_Time_Clock_Timer_Control( \ |
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| 82 | ERC32_MEC_TIMER_COUNTER_ENABLE_COUNTING | \ |
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[bf5ef93] | 83 | ERC32_MEC_TIMER_COUNTER_RELOAD_AT_ZERO \ |
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[74b09f1] | 84 | ); \ |
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| 85 | } while (0) |
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| 86 | |
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| 87 | #define Clock_driver_support_shutdown_hardware() \ |
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| 88 | do { \ |
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| 89 | ERC32_Mask_interrupt( ERC32_INTERRUPT_REAL_TIME_CLOCK ); \ |
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| 90 | \ |
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| 91 | ERC32_MEC_Set_Real_Time_Clock_Timer_Control( \ |
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| 92 | ERC32_MEC_TIMER_COUNTER_DISABLE_COUNTING \ |
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| 93 | ); \ |
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| 94 | } while (0) |
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| 95 | |
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| 96 | #include "../../../shared/clockdrv_shell.c" |
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[6128a4a] | 97 | |
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