1 | /* shm.h |
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2 | * |
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3 | * This include file contains all the constants, structures, |
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4 | * and global variables for this RTEMS based shared memory |
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5 | * communications interface driver. |
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6 | * |
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7 | * Processor board dependencies are in other files. |
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8 | * |
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9 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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10 | * On-Line Applications Research Corporation (OAR). |
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11 | * All rights assigned to U.S. Government, 1994. |
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12 | * |
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13 | * This material may be reproduced by or for the U.S. Government pursuant |
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14 | * to the copyright license under the clause at DFARS 252.227-7013. This |
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15 | * notice must appear in all copies of this file and its derivatives. |
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16 | * |
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17 | * $Id$ |
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18 | */ |
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19 | |
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20 | #ifndef __SHM_h |
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21 | #define __SHM_h |
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22 | |
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23 | #include <clockdrv.h> |
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24 | |
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25 | #ifdef __cplusplus |
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26 | extern "C" { |
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27 | #endif |
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28 | |
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29 | /* The information contained in the Node Status, Locked Queue, and |
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30 | * Envelope Control Blocks must be maintained in a NEUTRAL format. |
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31 | * Currently the neutral format may be selected as big or little |
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32 | * endian by simply defining either NEUTRAL_BIG or NEUTRAL_LITTLE. |
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33 | * |
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34 | * It is CRITICAL to note that the neutral format can ONLY be |
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35 | * changed by modifying this file and recompiling the ENTIRE |
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36 | * SHM driver including ALL target specific support files. |
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37 | * |
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38 | * The following table details the memory contents for the endian |
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39 | * field of the Node Status Control Block in the various |
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40 | * data format configurations (data is in hexadecimal): |
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41 | * |
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42 | * NEUTRAL NATIVE BYTE 0 BYTE 1 BYTE 2 BYTE 3 |
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43 | * ======= ====== ====== ====== ====== ====== |
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44 | * BIG BIG 00 00 00 01 |
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45 | * BIG LITTLE 10 00 00 00 |
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46 | * LITTLE BIG 01 00 00 00 |
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47 | * LITTLE LITTLE 00 00 00 10 |
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48 | * |
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49 | * |
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50 | * NOTE: XXX |
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51 | * PORTABILITY OF LOCKING INSTRUCTIONS |
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52 | * =================================== |
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53 | * The locking mechanism described below is not |
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54 | * general enough. Where the hardware supports |
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55 | * it we should use "atomic swap" instructions |
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56 | * so the values in the lock can be tailored to |
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57 | * support a CPU with only weak atomic memory |
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58 | * instructions. There are combinations of |
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59 | * CPUs with inflexible atomic memory instructions |
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60 | * which appear to be incompatible. For example, |
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61 | * the SPARClite instruction uses a byte which is |
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62 | * 0xFF when locked. The PA-RISC uses 1 to indicate |
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63 | * locked and 0 when unlocked. These CPUs appear to |
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64 | * have incompatible lock instructions. But |
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65 | * they could be used in a heterogenous system |
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66 | * with does not mix SPARCs and PA-RISCs. For |
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67 | * example, the i386 and SPARC or i386 and SPARC |
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68 | * could work together. The bottom line is that |
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69 | * not every CPU will work together using this |
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70 | * locking scheme. There are supposed to be |
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71 | * algorithms to do this without hardware assist |
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72 | * and one of these should be incorporated into |
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73 | * the shared memory driver. |
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74 | * |
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75 | * The most flexible scheme using the instructions |
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76 | * of the various CPUs for efficiency would be to use |
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77 | * "atomic swaps" wherever possible. Make the lock |
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78 | * and unlock configurable much like BIG vs LITTLE |
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79 | * endian use of shared memory is now. The values |
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80 | * of the lock could then reflect the "worst" |
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81 | * CPU in a system. This still results in mixes |
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82 | * of CPUs which are incompatible. |
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83 | * |
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84 | * The current locking mechanism is based upon the MC68020 |
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85 | * "tas" instruction which is atomic. All ports to other CPUs |
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86 | * comply with the restrictive placement of lock bit by this |
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87 | * instruction. The lock bit is the most significant bit in a |
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88 | * big-endian rtems_unsigned32. On other processors, the lock is |
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89 | * typically implemented via an atomic swap or atomic modify |
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90 | * bits type instruction. |
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91 | */ |
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92 | |
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93 | #define NEUTRAL_BIG |
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94 | |
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95 | #ifdef NEUTRAL_BIG |
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96 | #define SHM_BIG 0x00000001 |
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97 | #define SHM_LITTLE 0x10000000 |
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98 | #endif |
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99 | |
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100 | #ifdef NEUTRAL_LITTLE |
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101 | #define SHM_BIG 0x01000000 |
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102 | #define SHM_LITTLE 0x00000010 |
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103 | #endif |
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104 | |
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105 | /* |
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106 | * The following are the values used to fill in the lock field. Some CPUs |
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107 | * are able to write only a single value into field. By making the |
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108 | * lock and unlock values configurable, CPUs which support "atomic swap" |
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109 | * instructions can generally be made to work in any heterogeneous |
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110 | * configuration. However, it is possible for two CPUs to be incompatible |
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111 | * in regards to the lock field values. This occurs when two CPUs |
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112 | * which write only a single value to the field are used in a system |
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113 | * but the two CPUs write different incompatible values. |
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114 | * |
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115 | * NOTE: The following is a first attempt at defining values which |
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116 | * have a chance at working together. The m68k should use |
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117 | * chk2 instead of tas to be less restrictive. Target endian |
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118 | * problems (like the Force CPU386 which has (broken) big endian |
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119 | * view of the VMEbus address space) are not addressed yet. |
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120 | */ |
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121 | |
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122 | #if defined(i960) |
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123 | #define SHM_LOCK_VALUE 0x00000080 |
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124 | #define SHM_UNLOCK_VALUE 0 |
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125 | #elif defined(m68k) |
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126 | #define SHM_LOCK_VALUE 0x80000000 |
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127 | #define SHM_UNLOCK_VALUE 0 |
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128 | #define SHM_LOCK_VALUE 0x80000000 |
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129 | #define SHM_UNLOCK_VALUE 0 |
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130 | #elif defined(i386) |
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131 | #define SHM_LOCK_VALUE 0x80000000 |
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132 | #define SHM_UNLOCK_VALUE 0 |
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133 | #elif defined(hppa1_1) |
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134 | #define SHM_LOCK_VALUE 0 |
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135 | #define SHM_UNLOCK_VALUE 1 |
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136 | #elif defined(unix) |
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137 | #define SHM_LOCK_VALUE 0 |
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138 | #define SHM_UNLOCK_VALUE 1 |
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139 | #elif defined(no_cpu) /* for this values are irrelevant */ |
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140 | #define SHM_LOCK_VALUE 1 |
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141 | #define SHM_UNLOCK_VALUE 0 |
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142 | #endif |
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143 | |
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144 | #define Shm_Convert( value ) \ |
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145 | ((Shm_Configuration->convert) ? \ |
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146 | (*Shm_Configuration->convert)(value) : (value)) |
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147 | |
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148 | /* constants */ |
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149 | |
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150 | #define SHM_MASTER 1 /* master initialization node */ |
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151 | #define SHM_FIRST_NODE 1 |
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152 | |
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153 | /* size constants */ |
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154 | |
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155 | #define KILOBYTE (1024) |
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156 | #define MEGABYTE (1024*1024) |
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157 | |
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158 | /* inter-node interrupt values */ |
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159 | |
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160 | #define NO_INTERRUPT 0 /* used for polled nodes */ |
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161 | #define BYTE 1 |
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162 | #define WORD 2 |
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163 | #define LONG 4 |
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164 | |
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165 | /* operational mode constants -- used in SHM Configuration Table */ |
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166 | #define POLLED_MODE 0 |
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167 | #define INTR_MODE 1 |
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168 | |
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169 | /* error codes */ |
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170 | |
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171 | #define NO_ERROR 0 |
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172 | #define SHM_NO_FREE_PKTS 0xf0000 |
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173 | |
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174 | /* null pointers of different types */ |
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175 | |
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176 | #define NULL_ENV_CB ((Shm_Envelope_control *) 0) |
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177 | #define NULL_CONVERT 0 |
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178 | |
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179 | /* |
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180 | * size of stuff before preamble in envelope. |
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181 | * It must be a constant since we will use it to generate MAX_PACKET_SIZE |
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182 | */ |
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183 | |
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184 | #define SHM_ENVELOPE_PREFIX_OVERHEAD (4 * sizeof(vol_u32)) |
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185 | |
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186 | /* |
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187 | * The following is adjusted so envelopes are MAX_ENVELOPE_SIZE bytes long. |
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188 | * It must be >= RTEMS_MINIMUM_PACKET_SIZE in mppkt.h. |
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189 | */ |
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190 | |
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191 | #ifndef MAX_ENVELOPE_SIZE |
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192 | #define MAX_ENVELOPE_SIZE 0x180 |
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193 | #endif |
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194 | |
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195 | #define MAX_PACKET_SIZE (MAX_ENVELOPE_SIZE - \ |
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196 | SHM_ENVELOPE_PREFIX_OVERHEAD + \ |
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197 | sizeof(Shm_Envelope_preamble) + \ |
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198 | sizeof(Shm_Envelope_postamble)) |
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199 | |
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200 | |
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201 | /* constants pertinent to Locked Queue routines */ |
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202 | |
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203 | #define LQ_UNLOCKED SHM_UNLOCK_VALUE |
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204 | #define LQ_LOCKED SHM_LOCK_VALUE |
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205 | |
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206 | /* constants related to the Free Envelope Pool */ |
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207 | |
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208 | #define FREE_ENV_POOL 0 |
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209 | #define FREE_ENV_CB (&Shm_Locked_queues[ FREE_ENV_POOL ]) |
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210 | |
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211 | /* The following are important when dealing with |
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212 | * the shared memory communications interface area. |
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213 | * |
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214 | * NOTE: The starting address and length of the shared memory |
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215 | * is defined in a system dependent file. |
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216 | */ |
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217 | |
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218 | #define START_NS_CBS ((void *)Shm_Configuration->base) |
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219 | #define START_LQ_CBS ((START_NS_CBS) + \ |
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220 | ( (sizeof (Shm_Node_status_control)) * (Shm_Maximum_nodes + 1) ) ) |
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221 | #define START_ENVELOPES ( ((void *) START_LQ_CBS) + \ |
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222 | ( (sizeof (Shm_Locked_queue_Control)) * (Shm_Maximum_nodes + 1) ) ) |
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223 | #define END_SHMCI_AREA ( (void *) START_ENVELOPES + \ |
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224 | ( (sizeof (Shm_Envelope_control)) * Shm_Maximum_envelopes ) ) |
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225 | #define END_SHARED_MEM (START_NS_CBS+Shm_Configuration->length) |
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226 | |
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227 | /* macros */ |
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228 | |
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229 | #define Shm_Is_master_node() \ |
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230 | ( SHM_MASTER == Shm_Local_node ) |
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231 | |
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232 | #define Shm_Free_envelope( ecb ) \ |
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233 | Shm_Locked_queue_Add( FREE_ENV_CB, (ecb) ) |
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234 | #define Shm_Allocate_envelope() \ |
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235 | Shm_Locked_queue_Get(FREE_ENV_CB) |
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236 | |
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237 | #define Shm_Initialize_receive_queue(node) \ |
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238 | Shm_Locked_queue_Initialize( &Shm_Locked_queues[node], node ) |
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239 | |
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240 | #define Shm_Append_to_receive_queue(node, ecb) \ |
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241 | Shm_Locked_queue_Add( &Shm_Locked_queues[node], (ecb) ) |
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242 | |
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243 | #define Shm_Envelope_control_to_packet_prefix_pointer(ecb) \ |
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244 | ((void *)(ecb)->packet) |
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245 | |
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246 | #define Shm_Packet_prefix_to_envelope_control_pointer( pkt ) \ |
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247 | ((Shm_Envelope_control *)((rtems_unsigned8 *)(pkt) - \ |
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248 | (sizeof(Shm_Envelope_preamble) + SHM_ENVELOPE_PREFIX_OVERHEAD))) |
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249 | |
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250 | #define Shm_Build_preamble(ecb, node) \ |
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251 | (ecb)->Preamble.endian = Shm_Configuration->format |
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252 | |
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253 | #define Shm_Build_postamble( ecb ) |
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254 | |
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255 | /* volatile types */ |
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256 | |
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257 | typedef volatile rtems_unsigned8 vol_u8; |
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258 | typedef volatile rtems_unsigned32 vol_u32; |
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259 | |
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260 | /* shm control information */ |
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261 | |
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262 | struct shm_info { |
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263 | vol_u32 not_currently_used_0; |
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264 | vol_u32 not_currently_used_1; |
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265 | vol_u32 not_currently_used_2; |
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266 | vol_u32 not_currently_used_3; |
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267 | }; |
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268 | |
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269 | typedef struct { |
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270 | /*byte start_of_text;*/ |
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271 | vol_u32 endian; |
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272 | vol_u32 not_currently_used_0; |
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273 | vol_u32 not_currently_used_1; |
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274 | vol_u32 not_currently_used_2; |
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275 | } Shm_Envelope_preamble; |
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276 | |
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277 | typedef struct { |
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278 | } Shm_Envelope_postamble; |
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279 | |
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280 | /* WARNING! If you change this structure, don't forget to change |
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281 | * SHM_ENVELOPE_PREFIX_OVERHEAD and |
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282 | * Shm_Packet_prefix_to_envelope_control_pointer() above. |
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283 | */ |
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284 | |
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285 | /* This comment block describes the contents of each field |
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286 | * of the Envelope Control Block: |
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287 | * |
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288 | * next - The index of the next envelope on this queue. |
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289 | * queue - The index of the queue this envelope is on. |
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290 | * index - The index of this envelope. |
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291 | * Preamble - Generic packet preamble. One day this structure |
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292 | * could be enhanced to contain routing information. |
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293 | * packet - RTEMS MPCI packet. Untouched by SHM Driver |
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294 | * other than copying and format conversion as |
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295 | * documented in the RTEMS User's Guide. |
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296 | * Postamble - Generic packet postamble. One day this structure |
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297 | * could be enhanced to contain checksum information. |
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298 | */ |
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299 | |
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300 | typedef struct { |
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301 | vol_u32 next; /* next envelope on queue */ |
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302 | vol_u32 queue; /* queue on which this resides */ |
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303 | vol_u32 index; /* index into array of envelopes*/ |
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304 | vol_u32 pad0; /* insure the next one is aligned */ |
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305 | Shm_Envelope_preamble Preamble; /* header information */ |
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306 | vol_u8 packet[MAX_PACKET_SIZE]; /* RTEMS INFO */ |
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307 | Shm_Envelope_postamble Postamble;/* trailer information */ |
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308 | } Shm_Envelope_control; |
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309 | |
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310 | /* This comment block describes the contents of each field |
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311 | * of the Locked Queue Control Block: |
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312 | * |
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313 | * lock - Lock used to insure mutually exclusive access. |
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314 | * front - Index of first envelope on queue. This field |
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315 | * is used to remove head of queue (receive). |
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316 | * rear - Index of last envelope on queue. This field |
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317 | * is used to add evelope to queue (send). |
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318 | * owner - The node number of the recipient (owning) node. |
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319 | * RTEMS does not use the node number zero (0). |
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320 | * The zero node is used by the SHM Driver for the |
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321 | * Free Envelope Queue shared by all nodes. |
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322 | */ |
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323 | |
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324 | typedef struct { |
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325 | vol_u32 lock; /* lock field for this queue */ |
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326 | vol_u32 front; /* first envelope on queue */ |
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327 | vol_u32 rear; /* last envelope on queue */ |
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328 | vol_u32 owner; /* receiving (i.e. owning) node */ |
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329 | } Shm_Locked_queue_Control; |
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330 | |
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331 | /* This comment block describes the contents of each field |
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332 | * of the Node Status Control Block: |
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333 | * |
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334 | * status - Node status. Current values are Pending Initialization, |
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335 | * Initialization Complete, and Active Node. Other values |
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336 | * could be added to enhance fault tolerance. |
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337 | * error - Zero if the node has not failed. Otherwise, |
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338 | * this field contains a status indicating the |
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339 | * failure reason. |
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340 | * int_address, int_value, and int_length |
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341 | * - These field are the Interrupt Information table |
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342 | * for this node in neutral format. This is how |
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343 | * each node knows how to generate interrupts. |
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344 | */ |
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345 | |
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346 | typedef struct { |
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347 | vol_u32 status; /* node status information */ |
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348 | vol_u32 error; /* fatal error code */ |
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349 | vol_u32 int_address; /* write here for interrupt */ |
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350 | vol_u32 int_value; /* this value causes interrupt */ |
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351 | vol_u32 int_length; /* for this length (0,1,2,4) */ |
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352 | vol_u32 not_currently_used_0; |
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353 | vol_u32 not_currently_used_1; |
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354 | vol_u32 not_currently_used_2; |
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355 | } Shm_Node_status_control; |
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356 | |
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357 | /* This comment block describes the contents of each field |
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358 | * of the Interrupt Information Table. This table describes |
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359 | * how another node can generate an interrupt to this node. |
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360 | * This information is target board dependent. If the |
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361 | * SHM Driver is in POLLED_MODE, then all fields should |
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362 | * be initialized to NO_INTERRUPT. |
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363 | * |
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364 | * address - The address to which another node should |
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365 | * write to cause an interrupt. |
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366 | * value - The value which must be written |
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367 | * length - The size of the value to write. Valid |
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368 | * values are BYTE, WORD, and LONG. |
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369 | * |
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370 | * NOTE: The Node Status Control Block contains this |
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371 | * information in neutral format and not in a |
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372 | * structure to avoid potential alignment problems. |
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373 | */ |
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374 | |
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375 | typedef struct { |
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376 | vol_u32 *address; /* write here for interrupt */ |
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377 | vol_u32 value; /* this value causes interrupt */ |
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378 | vol_u32 length; /* for this length (0,1,2,4) */ |
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379 | } Shm_Interrupt_information; |
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380 | |
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381 | /* SHM Configuration Table |
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382 | * |
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383 | * This comment block describes the contents of each field |
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384 | * of the SHM Configuration Table. |
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385 | * |
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386 | * base - The base address of the shared memory. This |
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387 | * address may be specific to this node. |
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388 | * length - The length of the shared memory in bytes. |
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389 | * format - The natural format for rtems_unsigned32's in the |
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390 | * shared memory. Valid values are currently |
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391 | * only SHM_LITTLE and SHM_BIG. |
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392 | * convert - The address of the routine which converts |
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393 | * between neutral and local format. |
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394 | * poll_intr - The operational mode of the driver. Some |
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395 | * target boards may not provide hardware for |
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396 | * an interprocessor interrupt. If POLLED_MODE |
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397 | * is selected, the SHM driver will install a |
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398 | * wrapper around the Clock_isr() to poll for |
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399 | * incoming packets. Throughput is dependent |
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400 | * on the time between clock interrupts. |
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401 | * Valid values are POLLED_MODE and INTR_MODE. |
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402 | * cause_intr - This is the address of the routine used to |
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403 | * write to a particular address and cause an |
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404 | * interrupt on another node. This routine |
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405 | * may need to be target dependent if something |
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406 | * other than a normal write from C does not work. |
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407 | * Intr - This structure describes the operation required |
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408 | * to cause an interrupt to this node. The actual |
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409 | * contents of this structure are described above. |
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410 | */ |
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411 | |
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412 | struct shm_config_info { |
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413 | vol_u32 *base; /* base address of SHM */ |
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414 | vol_u32 length; /* length (in bytes) of SHM */ |
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415 | vol_u32 format; /* SHM is big or little endian */ |
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416 | vol_u32 (*convert)();/* neutral conversion routine */ |
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417 | vol_u32 poll_intr;/* POLLED or INTR driven mode */ |
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418 | void (*cause_intr)( rtems_unsigned32 ); |
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419 | Shm_Interrupt_information Intr; /* cause intr information */ |
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420 | }; |
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421 | |
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422 | typedef struct shm_config_info shm_config_table; |
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423 | |
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424 | /* global variables */ |
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425 | |
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426 | #ifdef _SHM_INIT |
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427 | #define SHM_EXTERN |
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428 | #else |
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429 | #define SHM_EXTERN extern |
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430 | #endif |
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431 | |
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432 | SHM_EXTERN shm_config_table *Shm_Configuration; |
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433 | SHM_EXTERN Shm_Interrupt_information Shm_Interrupt_table[16]; |
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434 | SHM_EXTERN Shm_Node_status_control *Shm_Node_statuses; |
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435 | SHM_EXTERN Shm_Locked_queue_Control *Shm_Locked_queues; |
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436 | SHM_EXTERN Shm_Envelope_control *Shm_Envelopes; |
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437 | SHM_EXTERN rtems_configuration_table *Shm_RTEMS_Configuration; |
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438 | SHM_EXTERN rtems_multiprocessing_table *Shm_RTEMS_MP_Configuration; |
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439 | SHM_EXTERN rtems_unsigned32 Shm_Receive_message_count; |
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440 | SHM_EXTERN rtems_unsigned32 Shm_Null_message_count; |
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441 | SHM_EXTERN rtems_unsigned32 Shm_Interrupt_count; |
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442 | SHM_EXTERN rtems_unsigned32 Shm_Local_node; |
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443 | SHM_EXTERN Shm_Locked_queue_Control *Shm_Local_receive_queue; |
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444 | SHM_EXTERN Shm_Node_status_control *Shm_Local_node_status; |
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445 | SHM_EXTERN rtems_unsigned32 Shm_isrstat; |
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446 | /* reported by shmdr */ |
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447 | |
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448 | SHM_EXTERN rtems_unsigned32 Shm_Pending_initialization; |
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449 | SHM_EXTERN rtems_unsigned32 Shm_Initialization_complete; |
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450 | SHM_EXTERN rtems_unsigned32 Shm_Active_node; |
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451 | |
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452 | SHM_EXTERN rtems_unsigned32 Shm_Maximum_nodes; |
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453 | SHM_EXTERN rtems_unsigned32 Shm_Maximum_envelopes; |
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454 | |
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455 | SHM_EXTERN rtems_unsigned32 Shm_Locked_queue_End_of_list; |
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456 | SHM_EXTERN rtems_unsigned32 Shm_Locked_queue_Not_on_list; |
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457 | |
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458 | /* functions */ |
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459 | |
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460 | /* locked queue routines */ |
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461 | void Shm_Locked_queue_Add( |
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462 | Shm_Locked_queue_Control *, Shm_Envelope_control * ); |
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463 | Shm_Envelope_control *Shm_Locked_queue_Get( Shm_Locked_queue_Control * ); |
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464 | void Shm_Locked_queue_Initialize( |
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465 | Shm_Locked_queue_Control *, rtems_unsigned32 ); |
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466 | /* Shm_Initialize_lock is CPU dependent */ |
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467 | /* Shm_Lock is CPU dependent */ |
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468 | /* Shm_Unlock is CPU dependent */ |
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469 | |
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470 | /* portable routines */ |
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471 | void Init_env_pool(); |
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472 | void Shm_Print_statistics( void ); |
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473 | void MPCI_Fatal( |
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474 | Internal_errors_Source source, |
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475 | boolean is_internal, |
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476 | rtems_unsigned32 error |
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477 | ); |
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478 | rtems_task Shm_Cause_interrupt( rtems_unsigned32 ); |
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479 | void Shm_Poll(); |
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480 | void Shm_setclockvec(); |
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481 | void Shm_Convert_packet( rtems_packet_prefix * ); |
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482 | |
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483 | /* CPU specific routines are inlined in shmcpu.h */ |
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484 | |
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485 | /* target specific routines */ |
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486 | void *Shm_Convert_address( void * ); |
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487 | void Shm_Get_configuration( rtems_unsigned32, shm_config_table ** ); |
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488 | void Shm_isr(); |
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489 | void Shm_setvec( void ); |
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490 | |
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491 | void Shm_Initialize_lock( Shm_Locked_queue_Control * ); |
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492 | void Shm_Lock( Shm_Locked_queue_Control * ); |
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493 | void Shm_Unlock( Shm_Locked_queue_Control * ); |
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494 | |
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495 | /* MPCI entry points */ |
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496 | rtems_mpci_entry Shm_Get_packet( |
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497 | rtems_packet_prefix ** |
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498 | ); |
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499 | |
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500 | rtems_mpci_entry Shm_Initialization( void ); |
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501 | |
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502 | rtems_mpci_entry Shm_Receive_packet( |
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503 | rtems_packet_prefix ** |
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504 | ); |
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505 | |
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506 | rtems_mpci_entry Shm_Return_packet( |
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507 | rtems_packet_prefix * |
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508 | ); |
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509 | |
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510 | rtems_mpci_entry Shm_Send_packet( |
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511 | rtems_unsigned32, |
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512 | rtems_packet_prefix * |
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513 | ); |
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514 | |
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515 | extern rtems_mpci_table MPCI_table; |
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516 | |
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517 | #ifdef _SHM_INIT |
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518 | |
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519 | /* multiprocessor communications interface (MPCI) table */ |
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520 | |
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521 | rtems_mpci_table MPCI_table = { |
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522 | 100000, /* default timeout value in ticks */ |
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523 | MAX_PACKET_SIZE, /* maximum packet size */ |
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524 | Shm_Initialization, /* initialization procedure */ |
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525 | Shm_Get_packet, /* get packet procedure */ |
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526 | Shm_Return_packet, /* return packet procedure */ |
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527 | Shm_Send_packet, /* packet send procedure */ |
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528 | Shm_Receive_packet /* packet receive procedure */ |
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529 | }; |
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530 | |
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531 | #endif |
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532 | |
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533 | #ifdef __cplusplus |
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534 | } |
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535 | #endif |
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536 | |
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537 | #endif |
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538 | /* end of include file */ |
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