source: rtems/c/src/lib/libbsp/sh/simsh4/start/start.S @ cd67dca

4.104.114.84.95
Last change on this file since cd67dca was cd67dca, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 11, 2001 at 9:04:35 PM

2001-10-11 Alexandra Kossovsky <sasha@…>

  • clock/Makefile.am, clock/ckinit.c, clock/.cvsignore, Makefile.am, README, bsp_specs, console/Makefile.am, console/console.c, console/.cvsignore, include/Makefile.am, include/bsp.h, include/coverhd.h, include/syscall.h, include/ramdisk.h, include/.cvsignore, start/Makefile.am, start/start.S, start/.cvsignore, startup/Makefile.am, startup/bspstart.c, startup/hw_init.c, startup/linkcmds, startup/linkcmds-le, startup/linkcmds-le.coff, startup/.cvsignore, timer/Makefile.am, timer/timer.c, timer/.cvsignore, wrapup/Makefile.am, wrapup/.cvsignore, configure.ac, .cvsignore, ChangeLog?: New files. Reviewed and updated to latest automake and autoconf standards by Ralf Corsepius <corsepiu@…>.
  • Property mode set to 100644
File size: 3.2 KB
Line 
1/*
2 * start.S -- Initialization code for SH4 simulator BSP
3 *
4 * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia
5 * Author: Victor V. Vengerov <vvv@oktet.ru>
6 *
7 * Based on work:
8 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
9 *           Bernd Becker (becker@faw.uni-ulm.de)
10 *
11 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
12 *
13 *  This program is distributed in the hope that it will be useful,
14 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
16 *
17 *  Modified to reflect Hitachi EDK SH7045F:
18 *  John M. Mills (jmills@tga.com)
19 *  TGA Technologies, Inc.
20 *  100 Pinnacle Way, Suite 140
21 *  Norcross, GA 30071 U.S.A.
22 * 
23 *
24 *  This modified file may be copied and distributed in accordance
25 *  the above-referenced license. It is provided for critique and
26 *  developmental purposes without any warranty nor representation
27 *  by the authors or by TGA Technologies.
28 *
29 *  COPYRIGHT (c) 1999-2001.
30 *  On-Line Applications Research Corporation (OAR).
31 *
32 *  The license and distribution terms for this file may be
33 *  found in the file LICENSE in this distribution or at
34 *  http://www.OARcorp.com/rtems/license.html.
35 *
36 *  $Id$
37 */
38
39#include "asm.h"
40#include "rtems/score/sh4_regs.h"
41
42        BEGIN_CODE
43        PUBLIC(start)
44
45SYM (start):
46        ! install the stack pointer
47        mov.l   stack_k,r15
48
49        mov.l   initial_sr_k,r0
50        ldc     r0,ssr
51        ldc     r0,sr
52
53        ! Set up VBR register
54        mov.l   _vbr_base_k,r0
55        ldc     r0,vbr
56
57
58#ifdef  START_HW_INIT   /* from $RTEMS_BSP.cfg */
59        ! Initialize minimal hardware
60        mov.l   hw_init_k, r0
61        jsr @r0
62        nop             !dead slot
63#endif /* START_HW_INIT */
64
65        ! zero out bss
66        mov.l   edata_k,r0
67        mov.l   end_k,r1
68        mov     #0,r2
690:
70        mov.l   r2,@r0
71        add     #4,r0
72        cmp/ge  r0,r1
73        bt      0b
74
75        ! initialise fpscr for gcc
76        mov.l set_fpscr_k, r1
77        jsr @r1
78        nop
79
80        ! Set FPSCR register
81        mov.l   initial_fpscr_k,r0
82        lds     r0,fpscr
83
84        ! call the mainline     
85        mov #0,r4               ! argc
86        mov.l main_k,r0
87        jsr @r0
88        mov #0,r5               ! argv - can place in dead slot
89
90        ! call exit
91        mov     r0,r4
92        mov.l   exit_k,r0
93        jsr     @r0
94        or      r0,r0
95
96        ! stop the simulator
97        trapa   #2
98        nop
99
100        .global ___trap34
101___trap34:
102        trapa   #34
103!       tst     r1,r1   ! r1 is errno
104!       bt      ret
105!       mov.l   perrno,r2
106!       mov.l   r1,@r2
107!ret:
108        rts
109        nop
110       
111!       .align  2
112!perrno:
113!       .long   _errno
114
115
116        END_CODE
117
118        .align 2
119set_fpscr_k:
120    .long   ___set_fpscr
121_vbr_base_k:
122        .long   SYM(_vbr_base)
123
124stack_k:
125        .long   SYM(stack)     
126edata_k:
127        .long   SYM(edata)
128end_k:
129        .long   SYM(end)
130main_k:
131        .long   SYM(boot_card)
132exit_k:
133        .long   SYM(exit)
134
135#ifdef  START_HW_INIT   /* from $RTEMS_BSP.cfg */
136hw_init_k:
137        .long   SYM(early_hw_init)
138#endif /* START_HW_INIT */
139
140vects_k:
141        .long   SYM(vectab)
142vects_size:
143        .word   255
144
145    .align 2
146initial_sr_k:
147        .long   SH4_SR_MD | SH4_SR_RB | SH4_SR_IMASK
148initial_fpscr_k:
149#ifdef __SH4__
150        .long   SH4_FPSCR_DN | SH4_FPSCR_PR | SH4_FPSCR_RM
151#else
152        .long   SH4_FPSCR_DN | SH4_FPSCR_RM
153#endif
154
155#ifdef __ELF__
156        .section .stack,"aw"
157#else
158        .section .stack
159#endif
160SYM(stack):
161        .long   0xdeaddead
162
163#ifdef __ELF__
164        .section .bss,"aw"
165#else
166        .section .bss
167#endif
168
169        .global __sh4sim_dummy_register
170__sh4sim_dummy_register:
171        .long   0
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