1 | /* |
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2 | * start.S -- Initialization code for SH4 simulator BSP |
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3 | * |
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4 | * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia |
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5 | * Author: Victor V. Vengerov <vvv@oktet.ru> |
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6 | * |
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7 | * Based on work: |
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8 | * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and |
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9 | * Bernd Becker (becker@faw.uni-ulm.de) |
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10 | * |
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11 | * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany |
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12 | * |
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13 | * This program is distributed in the hope that it will be useful, |
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14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
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16 | * |
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17 | * Modified to reflect Hitachi EDK SH7045F: |
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18 | * John M. Mills (jmills@tga.com) |
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19 | * TGA Technologies, Inc. |
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20 | * 100 Pinnacle Way, Suite 140 |
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21 | * Norcross, GA 30071 U.S.A. |
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22 | * |
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23 | * |
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24 | * This modified file may be copied and distributed in accordance |
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25 | * the above-referenced license. It is provided for critique and |
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26 | * developmental purposes without any warranty nor representation |
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27 | * by the authors or by TGA Technologies. |
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28 | * |
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29 | * COPYRIGHT (c) 1999-2001. |
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30 | * On-Line Applications Research Corporation (OAR). |
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31 | * |
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32 | * The license and distribution terms for this file may be |
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33 | * found in the file LICENSE in this distribution or at |
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34 | * http://www.rtems.com/license/LICENSE. |
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35 | * |
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36 | * $Id$ |
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37 | */ |
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38 | |
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39 | #include <rtems/asm.h> |
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40 | #include "rtems/score/sh4_regs.h" |
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41 | |
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42 | BEGIN_CODE |
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43 | PUBLIC(start) |
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44 | |
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45 | SYM (start): |
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46 | ! install the stack pointer |
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47 | mov.l stack_k,r15 |
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48 | |
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49 | mov.l initial_sr_k,r0 |
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50 | ldc r0,ssr |
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51 | ldc r0,sr |
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52 | |
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53 | ! Set up VBR register |
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54 | mov.l _vbr_base_k,r0 |
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55 | ldc r0,vbr |
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56 | |
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57 | |
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58 | #ifdef START_HW_INIT /* from $RTEMS_BSP.cfg */ |
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59 | ! Initialize minimal hardware |
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60 | mov.l hw_init_k, r0 |
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61 | jsr @r0 |
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62 | nop !dead slot |
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63 | #endif /* START_HW_INIT */ |
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64 | |
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65 | ! zero out bss |
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66 | mov.l edata_k,r0 |
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67 | mov.l end_k,r1 |
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68 | mov #0,r2 |
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69 | 0: |
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70 | mov.l r2,@r0 |
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71 | add #4,r0 |
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72 | cmp/ge r0,r1 |
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73 | bt 0b |
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74 | |
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75 | ! initialise fpscr for gcc |
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76 | mov.l set_fpscr_k, r1 |
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77 | jsr @r1 |
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78 | nop |
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79 | |
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80 | ! Set FPSCR register |
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81 | mov.l initial_fpscr_k,r0 |
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82 | lds r0,fpscr |
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83 | |
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84 | ! call the mainline |
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85 | mov #0,r4 ! argc |
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86 | mov.l main_k,r0 |
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87 | jsr @r0 |
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88 | mov #0,r5 ! argv - can place in dead slot |
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89 | |
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90 | ! call exit |
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91 | mov r0,r4 |
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92 | mov.l exit_k,r0 |
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93 | jsr @r0 |
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94 | or r0,r0 |
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95 | |
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96 | ! stop the simulator |
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97 | trapa #2 |
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98 | nop |
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99 | |
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100 | .global ___trap34 |
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101 | ___trap34: |
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102 | trapa #34 |
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103 | ! tst r1,r1 ! r1 is errno |
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104 | ! bt ret |
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105 | ! mov.l perrno,r2 |
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106 | ! mov.l r1,@r2 |
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107 | !ret: |
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108 | rts |
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109 | nop |
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110 | |
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111 | ! .align 2 |
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112 | !perrno: |
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113 | ! .long _errno |
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114 | |
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115 | |
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116 | END_CODE |
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117 | |
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118 | .align 2 |
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119 | set_fpscr_k: |
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120 | .long ___set_fpscr |
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121 | _vbr_base_k: |
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122 | .long SYM(_vbr_base) |
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123 | |
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124 | stack_k: |
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125 | .long SYM(stack) |
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126 | edata_k: |
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127 | .long SYM(edata) |
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128 | end_k: |
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129 | .long SYM(end) |
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130 | main_k: |
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131 | .long SYM(boot_card) |
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132 | exit_k: |
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133 | .long SYM(exit) |
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134 | |
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135 | #ifdef START_HW_INIT /* from $RTEMS_BSP.cfg */ |
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136 | hw_init_k: |
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137 | .long SYM(early_hw_init) |
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138 | #endif /* START_HW_INIT */ |
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139 | |
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140 | vects_k: |
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141 | .long SYM(vectab) |
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142 | vects_size: |
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143 | .word 255 |
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144 | |
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145 | .align 2 |
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146 | initial_sr_k: |
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147 | .long SH4_SR_MD | SH4_SR_RB | SH4_SR_IMASK |
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148 | initial_fpscr_k: |
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149 | #ifdef __SH4__ |
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150 | .long SH4_FPSCR_DN | SH4_FPSCR_PR | SH4_FPSCR_RM |
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151 | #else |
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152 | .long SH4_FPSCR_DN | SH4_FPSCR_RM |
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153 | #endif |
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154 | |
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155 | #ifdef __ELF__ |
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156 | .section .stack,"aw" |
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157 | #else |
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158 | .section .stack |
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159 | #endif |
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160 | SYM(stack): |
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161 | .long 0xdeaddead |
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162 | |
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163 | #ifdef __ELF__ |
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164 | .section .bss,"aw" |
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165 | #else |
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166 | .section .bss |
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167 | #endif |
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168 | |
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169 | .global __sh4sim_dummy_register |
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170 | __sh4sim_dummy_register: |
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171 | .long 0 |
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