source: rtems/c/src/lib/libbsp/sh/gensh4/start/start.S @ c669bf30

4.104.115
Last change on this file since c669bf30 was c669bf30, checked in by Joel Sherrill <joel.sherrill@…>, on 04/24/10 at 21:45:57

2010-04-24 Joel Sherrill <joel.sherrill@…>

  • start/start.S: Verify boot_card is invoked properly with argc, argv.
  • Property mode set to 100644
File size: 6.1 KB
Line 
1/*
2 * start.S -- Initialization code for SH7750 generic BSP
3 *
4 * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia
5 * Author: Victor V. Vengerov <vvv@oktet.ru>
6 *
7 * Based on work:
8 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
9 *           Bernd Becker (becker@faw.uni-ulm.de)
10 *
11 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
12 *
13 *  This program is distributed in the hope that it will be useful,
14 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
16 *
17 *  Modified to reflect Hitachi EDK SH7045F:
18 *  John M. Mills (jmills@tga.com)
19 *  TGA Technologies, Inc.
20 *  100 Pinnacle Way, Suite 140
21 *  Norcross, GA 30071 U.S.A.
22 *
23 *
24 *  This modified file may be copied and distributed in accordance
25 *  the above-referenced license. It is provided for critique and
26 *  developmental purposes without any warranty nor representation
27 *  by the authors or by TGA Technologies.
28 *
29 *  COPYRIGHT (c) 1999-2001.
30 *  On-Line Applications Research Corporation (OAR).
31 *
32 *  The license and distribution terms for this file may be
33 *  found in the file LICENSE in this distribution or at
34 *  http://www.rtems.com/license/LICENSE.
35 *
36 *  $Id$
37 */
38
39#include <rtems/asm.h>
40#include "rtems/score/sh4_regs.h"
41#include "rtems/score/sh7750_regs.h"
42
43        BEGIN_CODE
44        PUBLIC(start)
45
46/*
47 * Algorithm of the first part of the start():
48 *
49 * 1. Initialize stack
50 * 2. Are we from reset or from gdb? Set value for boot_mode in r9.
51 * 3. Initialize hardware if we are from reset. Cache is off.
52 * 4. Copy data from flash to ram; set up boot mode and jump to real address.
53 * 5. Zero out bss.
54 * 6. Turn memory cach on.
55 */
56
57SYM (start):
58        ! install the stack pointer
59        mov.l   stack_k,r15
60
61        mov.l   initial_sr_k,r0
62        ldc     r0,ssr
63        ldc     r0,sr
64
65        ! let us see if we are from gdb stub or from power-on reset
66        bsr     fake_func
67        nop
68fake_func:
69
70        sts     pr, r0
71        shlr8   r0
72        mov.l   reset_pc_value_shift_8_k, r1
73        cmp/eq  r0, r1
74        movt    r9      ! r9 == ! boot_mode
75        neg     r9, r9
76        add     #1, r9  ! r9 == boot_mode
77
78        ! what is in boot_mode?
79        cmp/pl  r9      ! r9 > 0  ->  T = 1
80
81        ! if boot_mode != SH4_BOOT_MODE_FLASH
82        bt      hw_init_end
83        nop
84
85#if defined(START_HW_INIT)      /* from $RTEMS_BSP.cfg */
86        ! Initialize minimal hardware
87        ! to run hw_init we need to calculate its address
88        ! as it is before data coping
89        mov.l   hw_init_k, r0
90        mov.l   copy_start_k, r1
91        mov.l   copy_end_k, r2
92        cmp/ge  r0, r1
93        bt      0f
94        cmp/ge  r0, r2
95        bf      0f
96        ! if  copy_start <= hw_init <= copy_end  then
97        neg     r1, r1
98        mov.l   copy_start_in_rom_k, r3
99        add     r1,r0
100        add     r3, r0
1010:
102        jsr @r0
103        nop             !delay slot
104#endif /* START_HW_INIT */
105hw_init_end:
106
107        ! copy data from rom to ram
108        mov.l   copy_start_k, r0
109        mov.l   copy_end_k, r1
110        mov.l   copy_start_in_rom_k, r2
111
112        ! if copy_from == copy_to do not copy anything
113        cmp/eq  r0, r2
114        bt      real_address
115        nop
116
117copy_data_cycle:
118        cmp/ge  r1, r0
119        bt      end_of_copy_data_cycle
120        nop
121        mov.l   @r2+, r3
122        mov.l   r3, @r0
123        add     #4, r0
124        bra     copy_data_cycle
125        nop
126
127end_of_copy_data_cycle:
128        ! go to 0x8....... adresses
129        mov.l   real_address_k, r0
130        lds     r0, pr
131        rts
132        nop
133real_address:
134        ! write boot_mode to ram
135        mov.l   boot_mode_k, r5
136        mov.l   r9, @r5
137
138zero_bss:
139        ! zero out bss
140        mov.l   __bss_start_k,r0
141        mov.l   __bss_end_k,r1
142        mov     #0,r2
1430:
144        mov.l   r2,@r0
145        add     #4,r0
146        cmp/ge  r0,r1
147        bt      0b
148        nop
149
150        ! Turn cache on
151        mov.l   cache_on_k, r0
152        jsr @r0
153        nop     !delay slot
154
155        ! Save old value of VBR register. We will need it to allow
156        ! debugger agent hook exceptions.
157        mov.l   __VBR_Saved_k,r0
158        stc     vbr,r5
159        mov.l   r5,@r0
160        ! Set up VBR register
161        mov.l   _vbr_base_k,r0
162        ldc     r0,vbr
163
164        ! initialise fpscr for gcc
165        mov.l set_fpscr_k, r1
166        jsr @r1
167        nop
168
169        ! Set FPSCR register
170        mov.l   initial_fpscr_k,r0
171        lds     r0,fpscr
172
173        ! call the mainline
174        mov #0,r4               ! argc
175        mov.l main_k,r0
176        jsr @r0
177        nop
178
179        ! call exit
180        mov     r0,r4
181        mov.l   exit_k,r0
182        jsr     @r0
183        or      r0,r0
184
185        .global _stop
186_stop:
187        mov     #11,r0
188        mov     #0,r4
189        trapa   #0x3f
190        nop
191__stop:
192        bra     __stop
193        nop
194
195        END_CODE
196
197        .align 2
198copy_start_k:
199        .long copy_start
200copy_end_k:
201        .long copy_end
202copy_start_in_rom_k:
203        .long copy_start_in_rom
204
205real_address_k:
206        .long real_address
207set_fpscr_k:
208    .long   ___set_fpscr
209_vbr_base_k:
210        .long   SYM(_vbr_base)
211__VBR_Saved_k:
212        .long   SYM(_VBR_Saved)
213stack_k:
214        .long   SYM(stack)
215__bss_start_k:
216        .long   __bss_start
217__bss_end_k:
218        .LONG   __bss_end
219main_k:
220        .long   SYM(boot_card)
221exit_k:
222        .long   SYM(_exit)
223
224#ifdef  START_HW_INIT   /* from $RTEMS_BSP.cfg */
225hw_init_k:
226        .long   SYM(early_hw_init)
227#endif /* START_HW_INIT */
228
229cache_on_k:
230        .long   SYM(bsp_cache_on)
231
232vects_k:
233        .long   SYM(vectab)
234vects_size:
235        .word   255
236
237    .align 2
238initial_sr_k:
239        .long   SH4_SR_MD | SH4_SR_IMASK
240initial_fpscr_k:
241#ifdef __SH4__
242        .long   SH4_FPSCR_DN | SH4_FPSCR_PR | SH4_FPSCR_RM
243#else
244        .long   SH4_FPSCR_DN | SH4_FPSCR_RM
245#endif
246
247reset_pc_value_shift_8_k:
248        .long   0xa00000
249
250boot_mode_k:
251        .long   _boot_mode
252
253#ifdef __ELF__
254        .section .stack,"aw"
255#else
256        .section .stack
257#endif
258SYM(stack):
259        .long   0xdeaddead
260
261#ifdef __ELF__
262        .section .bss,"aw"
263#else
264        .section .bss
265#endif
266
267        .global __sh4sim_dummy_register
268__sh4sim_dummy_register:
269        .long   0
270
271        .section    .data
272        .global _boot_mode
273_boot_mode:
274        .long   0
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