source: rtems/c/src/lib/libbsp/sh/gensh4/README @ f61a85a8

4.104.114.84.95
Last change on this file since f61a85a8 was 5850c533, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 26, 2001 at 1:41:07 PM

2001-10-26 Alexandra Kossovsky <sasha@…>

  • README, console/console.c, hw_init/hw_init.c, include/bsp.h, startup/bspstart.c, startup/linkcmds: Minor fixes post merge.
  • Property mode set to 100644
File size: 3.1 KB
Line 
1#
2#  $Id$
3#
4#  Author: Alexandra Kossovsky <sasha@oktet.ru>
5#          Victor Vengerov     <vvv@oktet.ru>
6#   OKTET Ltd, http://www.oktet.ru
7#
8
9BSP NAME:           generic SH4 (gensh4)
10BOARD:              n/a
11BUS:                n/a
12CPU FAMILY:         Hitachi SH
13CPU:                SH 7750
14COPROCESSORS:       none
15MODE:               n/a
16
17DEBUG MONITOR:      gdb (sh-ipl-g+ loader/stub)
18
19PERIPHERALS
20===========
21TIMERS:             on-chip
22SERIAL PORTS:       on-chip (with 2 ports)
23REAL-TIME CLOCK:    none
24DMA:                not used
25VIDEO:              none
26SCSI:               none
27NETWORKING:         none
28
29DRIVER INFORMATION
30==================
31CLOCK DRIVER:       on-chip timer
32IOSUPP DRIVER:      default
33SHMSUPP:            n/a
34TIMER DRIVER:       on-chip timer
35TTY DRIVER:         /dev/console
36
37STDIO
38=====
39PORT:               /dev/console
40ELECTRICAL:         n/a
41BAUD:               n/a
42BITS PER CHARACTER: n/a
43PARITY:             n/a
44STOP BITS:          n/a
45
46NOTES
47=====
48
49(1) Driver for the on-chip serial devices is tested only with 1st serial
50    port. We cannot test it on serial port with FIFO.
51
52    Console driver has 4 modes -- 2 with termios (interrupt-driven &
53    poll-driven modes), one raw mode working with serial port directly,
54    without termios, and one mode working with gdb stub (using 'trapa'
55    handled by sh-ipl-g+).
56
57(2) The present 'hw_init.c' file provides 'early_hw_init'(void) which
58    is normally called from 'start.S' to provide such minimal HW setup.
59    It is written in C, but it should be noted that any accesses to memory
60    (except hardware registers) are prohibited until hardware not
61    initialized. To avoid access to stack, hw_init.c should be compiled with
62    -fomit-frame-pointer.
63
64    hw_init.c also provides 'bsp_cache_on'(void) normally called from
65    'start.S' after copying all data from rom to ram.
66
67(3) In 'configure.ac' you should properly set 'CPU_CLOCK_RATE_HZ'.
68    It is frequency fed to the CPU core (external clock frequency can be
69    multiplied by on-chip PLLs). Please note that it is not a frequency of
70    external oscillator! See Hardware Manual, section 10, for details.
71    Global variable 'SH4_CPU_HZ_Frequency' is declared in 'bsp.h' and
72    initilized in 'bspstart.c' to ${HZ}. It is used by sci driver,
73    which exists in 'libcpu/sh/sh7750'.
74
75(4) There is SH4_WITH_IPL macro in console driver 'sh4_uart.h'.
76    When it is defined, the application works under
77    gdb-stub (it is able to turn cache on by 'trapa', use gdb mode in console
78    driver and get out from gdb to use other console modes).
79
80(5) There are 3 likcmds:
81    - linkcmds: code and data loaded to RAM. No code/data moving required.
82    - linkcmds.rom: code executed from the ROM; .data section moved to the
83    RAM on initialization.
84    - linkcmds.rom2ram: execution started from the ROM (after reset); code
85    and data moved to the RAM and execution continued from RAM.
86
87    The same 'start.S' is used for all cases.
88
89(6) You can get gdb stub from http://www.oktet.ru/download/sh4/sh-ipl.tar.gz.
90    It is based on 'sh-ipl-g+' package used in sh-linux project.
91
92(7) This project was done in cooperation with Transas company
93    http://www.transas.com
94
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