source: rtems/c/src/lib/libbsp/sh/gensh2/startup/linkcmds @ 4a238002

4.104.114.84.95
Last change on this file since 4a238002 was 4a238002, checked in by Joel Sherrill <joel.sherrill@…>, on 11/18/99 at 21:22:58

Patch from "John M. Mills" <jmills@…> with subsequent cleanup from
Ralf Corsepius <corsepiu@…> that adds initial Hitachi SH-2
support to RTEMS. Ralf's comments are:

Changes:
------

  1. SH-Port:
  • Many files renamed.
  • CONSOLE_DEVNAME and MHZ defines removed from libcpu.
  • console.c moved to libbsp/sh/shared, build in libbsp/sh/<BSP>/console applying VPATH.
  • CONSOLE_DEVNAME made BSP-specific, replacement is defined in bsp.h
  • MHZ define replaced with HZ (extendent resolution) in custom/*.cfg
  • -DHZ=HZ used in bspstart.c, only
  • Makefile variable HZ used in bsp-dependent directories only.
  1. SH1-Port
  • clock-driver rewritten to provide better resolution for odd CPU frequencies. This driver is only partially tested on hardware, ie. sightly experimental, but I don't expect severe problems with it.
  • Polling SCI-driver added. This driver is experimental and completly untested yet. Therefore it is not yet used for the console (/dev/console is still pointing to /dev/null, cf. gensh1/bsp.h).
  • minor changes to the timer driver
  • SH1 specific delay()/CPU_delay() now is implemented as a function
  1. SH2-Port
  • Merged
  • IMO, the code is still in its infancy. Therefore I have interspersed comments (FIXME) it for items which I think John should look after.
  • sci and console drivers partially rewritten and extended (John, I hope you don't mind).
  • Copyright notices are not yet adapted
  • Property mode set to 100644
File size: 6.2 KB
Line 
1/*
2 * This is an adapted linker script from egcs-1.0.1
3 *
4 * Memory layout for an SH7045F with main memory in area 2
5 * This memory layout it very similar to that used for Hitachi's
6 * EVB with CMON in FLASH
7 *
8 * NOTE: The ram start address may vary, all other start addresses are fixed
9 *       Not suiteable for gdb's simulator
10 *
11 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
12 *           Bernd Becker (becker@faw.uni-ulm.de)
13 *
14 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
15 *
16 *  This program is distributed in the hope that it will be useful,
17 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
19 *
20 *
21 *  COPYRIGHT (c) 1998.
22 *  On-Line Applications Research Corporation (OAR).
23 *  Copyright assigned to U.S. Government, 1994.
24 *
25 *  The license and distribution terms for this file may be
26 *  found in the file LICENSE in this distribution or at
27 *  http://www.OARcorp.com/rtems/license.html.
28 *
29 *      Modified to reflect SH7045F processor and EVB:
30 *      John M. Mills (jmills@tga.com)
31 *      TGA Technologies, Inc.
32 *      100 Pinnacle Way, Suite 140
33 *      Norcross, GA 30071 U.S.A.
34 *
35 *      This modified file may be copied and distributed in accordance
36 *      the above-referenced license. It is provided for critique and
37 *      developmental purposes without any warranty nor representation
38 *      by the authors or by TGA Technologies.
39 *
40 *  $Id$
41 */
42
43OUTPUT_FORMAT("coff-sh")
44OUTPUT_ARCH(sh)
45ENTRY(_start)
46
47/* These assignments load code into SH7045F EVB SRAM for monitor debugging */
48
49MEMORY
50{
51  rom           : o = 0x00400000, l = 0x00040000
52  ram           : o = 0x00440000, l = 0x00040000
53  onchip_peri   : o = 0xFFFF8000, l = 0x00000800
54  onchip_ram    : o = 0xFFFFF000, l = 0x00001000
55}
56
57/* Sections are defined for RAM loading and monitor debugging */
58SECTIONS
59{
60  /* boot vector table */
61  .monvects 0x00400000 (NOLOAD): {
62    _monvects = . ;
63  } > rom
64
65  /* monitor play area */
66  .monram 0x00440000 (NOLOAD) :
67  {
68  _ramstart = .;
69  } > ram
70
71  /* monitor vector table */
72  .vects   0x00442000 (NOLOAD) : {
73    _vectab = . ;
74    *(.vects);
75  }
76
77  /* Read-only sections, merged into text segment: */
78
79  . = 0x00444000 ;
80  .interp        : { *(.interp)         }
81  .hash          : { *(.hash)           }
82  .dynsym        : { *(.dynsym)         }
83  .dynstr        : { *(.dynstr)         }
84  .gnu.version   : { *(.gnu.version)    }
85  .gnu.version_d : { *(.gnu.version_d)  }
86  .gnu.version_r : { *(.gnu.version_r)  }
87  .rel.text      :
88    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
89  .rela.text     :
90    { *(.rela.text) *(.rela.gnu.linkonce.t*) }
91  .rel.data      :
92    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
93  .rela.data     :
94    { *(.rela.data) *(.rela.gnu.linkonce.d*) }
95  .rel.rodata    :
96    { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
97  .rela.rodata   :
98    { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
99  .rel.got       : { *(.rel.got)                }
100  .rela.got      : { *(.rela.got)               }
101  .rel.ctors     : { *(.rel.ctors)      }
102  .rela.ctors    : { *(.rela.ctors)     }
103  .rel.dtors     : { *(.rel.dtors)      }
104  .rela.dtors    : { *(.rela.dtors)     }
105  .rel.init      : { *(.rel.init)       }
106  .rela.init     : { *(.rela.init)      }
107  .rel.fini      : { *(.rel.fini)       }
108  .rela.fini     : { *(.rela.fini)      }
109  .rel.bss       : { *(.rel.bss)                }
110  .rela.bss      : { *(.rela.bss)               }
111  .rel.plt       : { *(.rel.plt)                }
112  .rela.plt      : { *(.rela.plt)               }
113  .init          : { *(.init)   } =0
114  .plt           : { *(.plt)    }
115  .text   .      :
116  {
117    *(.text)
118    *(.stub)
119    /* .gnu.warning sections are handled specially by elf32.em.  */
120    *(.gnu.warning)
121    *(.gnu.linkonce.t*)
122  } > ram
123  _etext = .;
124  PROVIDE (etext = .);
125  .fini    .  : { *(.fini)    } =0
126  .rodata  .  : { *(.rodata) *(.gnu.linkonce.r*) }
127  .rodata1 .  : { *(.rodata1) }
128  /* Adjust the address for the data segment.  We want to adjust up to
129     the same address within the page on the next page up.  */
130  . = ALIGN(128) + (. & (128 - 1));
131  .data  .  :
132  {
133    *(.data)
134    *(.gnu.linkonce.d*)
135    CONSTRUCTORS
136  } > ram
137  .data1  . : { *(.data1) }
138  .ctors  .       :
139  {
140    ___ctors = .;
141    *(.ctors)
142    ___ctors_end = .;
143  }
144  .dtors  .       :
145  {
146    ___dtors = .;
147    *(.dtors)
148    ___dtors_end = .;
149  }
150  .got     .      : { *(.got.plt) *(.got) }
151  .dynamic .      : { *(.dynamic) }
152  /* We want the small data sections together, so single-instruction offsets
153     can access them all, and initialized data all before uninitialized, so
154     we can shorten the on-disk segment size.  */
155  .sdata   .  : { *(.sdata) }
156  _edata  =  .;
157  PROVIDE (edata = .);
158  __bss_start = .;
159  .sbss    .  : { *(.sbss) *(.scommon) }
160  .bss     .  :
161  {
162   *(.dynbss)
163   *(.bss)
164   *(COMMON)
165  } > ram
166  _end = . ;
167  PROVIDE (end = .);
168
169  _HeapStart = . ;
170  . = . + 1024 * 20 ;
171  PROVIDE( _HeapEnd = . );
172
173  _WorkSpaceStart = . ;
174  . = 0x00480000 ;
175  PROVIDE(_WorkSpaceEnd = .);
176
177  _CPU_Interrupt_stack_low  = 0xFFFFF000 ;
178  _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
179
180  /* Stabs debugging sections.  */
181  .stab 0 : { *(.stab) }
182  .stabstr 0 : { *(.stabstr) }
183  .stab.excl 0 : { *(.stab.excl) }
184  .stab.exclstr 0 : { *(.stab.exclstr) }
185  .stab.index 0 : { *(.stab.index) }
186  .stab.indexstr 0 : { *(.stab.indexstr) }
187  .comment 0 : { *(.comment) }
188  /* DWARF debug sections.
189     Symbols in the DWARF debugging sections are relative to the beginning
190     of the section so we begin them at 0.  */
191  /* DWARF 1 */
192  .debug          0 : { *(.debug) }
193  .line           0 : { *(.line) }
194  /* GNU DWARF 1 extensions */
195  .debug_srcinfo  0 : { *(.debug_srcinfo) }
196  .debug_sfnames  0 : { *(.debug_sfnames) }
197  /* DWARF 1.1 and DWARF 2 */
198  .debug_aranges  0 : { *(.debug_aranges) }
199  .debug_pubnames 0 : { *(.debug_pubnames) }
200  /* DWARF 2 */
201  .debug_info     0 : { *(.debug_info) }
202  .debug_abbrev   0 : { *(.debug_abbrev) }
203  .debug_line     0 : { *(.debug_line) }
204  .debug_frame    0 : { *(.debug_frame) }
205  .debug_str      0 : { *(.debug_str) }
206  .debug_loc      0 : { *(.debug_loc) }
207  .debug_macinfo  0 : { *(.debug_macinfo) }
208  /* SGI/MIPS DWARF 2 extensions */
209  .debug_weaknames 0 : { *(.debug_weaknames) }
210  .debug_funcnames 0 : { *(.debug_funcnames) }
211  .debug_typenames 0 : { *(.debug_typenames) }
212  .debug_varnames  0 : { *(.debug_varnames) }
213
214  .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram
215  /* These must appear regardless of  .  */
216}
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