source: rtems/c/src/lib/libbsp/sh/gensh2/startup/linkcmds @ 11a6c97

4.104.115
Last change on this file since 11a6c97 was 11a6c97, checked in by Joel Sherrill <joel.sherrill@…>, on 09/15/08 at 19:18:29

2008-09-15 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, configure.ac, include/bsp.h, startup/linkcmds: Use shared bsp_get_work_area() in its own file and rely on BSP Framework to perform more initialization. After factoring this out, it turned out that all SuperH BSPs has the same bsp_start() implementation so this was made shared.
  • startup/bspstart.c: Removed.
  • Property mode set to 100644
File size: 6.9 KB
Line 
1/*
2 * This is an adapted linker script from egcs-1.0.1
3 *
4 * Memory layout for an SH7045F with main memory in area 2
5 * This memory layout it very similar to that used for Hitachi's
6 * EVB with CMON in FLASH
7 *
8 * NOTE: The ram start address may vary, all other start addresses are fixed
9 *       Not suiteable for gdb's simulator
10 *
11 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
12 *           Bernd Becker (becker@faw.uni-ulm.de)
13 *
14 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
15 *
16 *  This program is distributed in the hope that it will be useful,
17 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
19 *
20 *
21 *  COPYRIGHT (c) 1998.
22 *  On-Line Applications Research Corporation (OAR).
23 *
24 *  The license and distribution terms for this file may be
25 *  found in the file LICENSE in this distribution or at
26 *  http://www.rtems.com/license/LICENSE.
27 *
28 *      Modified to reflect SH7045F processor and EVB:
29 *      John M. Mills (jmills@tga.com)
30 *      TGA Technologies, Inc.
31 *      100 Pinnacle Way, Suite 140
32 *      Norcross, GA 30071 U.S.A.
33 *
34 *      This modified file may be copied and distributed in accordance
35 *      the above-referenced license. It is provided for critique and
36 *      developmental purposes without any warranty nor representation
37 *      by the authors or by TGA Technologies.
38 *
39 *  $Id$
40 */
41
42OUTPUT_ARCH(sh)
43ENTRY(_start)
44
45/* These assignments load code into SH7045F EVB SRAM for monitor debugging */
46
47_RamBase = DEFINED(_RamBase) ? _RamBase : 0x00440000;
48_RamSize = DEFINED(_RamSize) ? _RamSize : 512K;
49
50MEMORY
51{
52  rom           : o = 0x00400000, l = 0x00040000
53  ram           : o = 0x00440000, l = 0x00080000
54  onchip_peri   : o = 0xFFFF8000, l = 0x00000800
55  onchip_ram    : o = 0xFFFFF000, l = 0x00001000
56}
57
58/* Sections are defined for RAM loading and monitor debugging */
59SECTIONS
60{
61  /* boot vector table */
62  .monvects 0x00400000 (NOLOAD): {
63    _monvects = . ;
64  } > rom
65
66  /* monitor play area */
67  .monram 0x00440000 (NOLOAD) :
68  {
69  _ramstart = .;
70  } > ram
71
72  /* monitor vector table */
73  .vects   0x00442000 (NOLOAD) : {
74    _vectab = . ;
75    *(.vects);
76  }
77
78  /* Read-only sections, merged into text segment: */
79
80  . = 0x00444000 ;
81  .interp        : { *(.interp)         }
82  .hash          : { *(.hash)           }
83  .dynsym        : { *(.dynsym)         }
84  .dynstr        : { *(.dynstr)         }
85  .gnu.version   : { *(.gnu.version)    }
86  .gnu.version_d : { *(.gnu.version_d)  }
87  .gnu.version_r : { *(.gnu.version_r)  }
88  .rela.dyn       :
89    {
90      *(.rela.init)
91      *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
92      *(.rela.fini)
93      *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
94      *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
95      *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
96      *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
97      *(.rela.ctors)
98      *(.rela.dtors)
99      *(.rela.got)
100      *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*)
101      *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*)
102      *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*)
103      *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*)
104      *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
105    } >ram
106  .rel.text      :
107    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
108  .rel.data      :
109    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
110  .rel.rodata    :
111    { *(.rel.rodata*) *(.rel.gnu.linkonce.r*) }
112  .rel.got       : { *(.rel.got)                }
113  .rel.ctors     : { *(.rel.ctors)      }
114  .rel.dtors     : { *(.rel.dtors)      }
115  .rel.init      : { *(.rel.init)       }
116  .rel.fini      : { *(.rel.fini)       }
117  .rel.bss       : { *(.rel.bss)                }
118  .rel.plt       : { *(.rel.plt)                }
119  .init          : { *(.init)   } =0
120  .plt           : { *(.plt)    }
121  .text   .      :
122  {
123    _start = .;
124    *(.text*)
125    *(.stub)
126
127    /*
128     * Special FreeBSD sysctl sections.
129     */
130    . = ALIGN (16);
131    ___start_set_sysctl_set = .;
132    *(set_sysc*);   /* set_sysctl_* but name is truncated by SH-coff */
133    ___stop_set_sysctl_set = ABSOLUTE(.);
134    *(set_doma*);   /* set_domain_* but name is truncated by SH-coff */
135    *(set_pseu*);   /* set_pseudo_* but name is truncated by SH-coff */
136
137    /* .gnu.warning sections are handled specially by elf32.em.  */
138    *(.gnu.warning)
139    *(.gnu.linkonce.t*)
140  } > ram
141  _etext = .;
142  PROVIDE (etext = .);
143  .fini    .  : { *(.fini)    } =0
144  .rodata  .  : { *(.rodata*) *(.gnu.linkonce.r*) }
145  .rodata1 .  : { *(.rodata1) }
146  /* Adjust the address for the data segment.  We want to adjust up to
147     the same address within the page on the next page up.  */
148  . = ALIGN(128) + (. & (128 - 1));
149  .data  .  :
150  {
151    *(.data*)
152    *(.gcc_exc*)
153    ___EH_FRAME_BEGIN__ = .;
154    *(.eh_fram*)
155    ___EH_FRAME_END__ = .;
156    LONG(0);
157    *(.gcc_except_table*)
158    *(.gnu.linkonce.d*)
159    CONSTRUCTORS
160  } > ram
161  .data1  . : { *(.data1) }
162  .ctors  .       :
163  {
164    ___ctors = .;
165    *(.ctors)
166    ___ctors_end = .;
167  }
168  .dtors  .       :
169  {
170    ___dtors = .;
171    *(.dtors)
172    ___dtors_end = .;
173  }
174  .got     .      : { *(.got.plt) *(.got) }
175  .dynamic .      : { *(.dynamic) }
176  /* We want the small data sections together, so single-instruction offsets
177     can access them all, and initialized data all before uninitialized, so
178     we can shorten the on-disk segment size.  */
179  .sdata   .  : { *(.sdata) }
180  _edata  =  .;
181  PROVIDE (edata = .);
182  __bss_start = .;
183  .sbss    .  : { *(.sbss*) *(.scommon) }
184  .bss     .  :
185  {
186   *(.dynbss)
187   *(.bss .bss* .gnu.linkonce.b*)
188   *(COMMON)
189  } > ram
190  _end = . ;
191  PROVIDE (end = .);
192
193  _WorkSpaceStart = . ;
194
195  _CPU_Interrupt_stack_low  = 0xFFFFF000;
196  _CPU_Interrupt_stack_high = 0xFFFFFFFF;
197
198  /* Stabs debugging sections.  */
199  .stab 0 : { *(.stab) }
200  .stabstr 0 : { *(.stabstr) }
201  .stab.excl 0 : { *(.stab.excl) }
202  .stab.exclstr 0 : { *(.stab.exclstr) }
203  .stab.index 0 : { *(.stab.index) }
204  .stab.indexstr 0 : { *(.stab.indexstr) }
205  .comment 0 : { *(.comment) }
206  /* DWARF debug sections.
207     Symbols in the DWARF debugging sections are relative to the beginning
208     of the section so we begin them at 0.  */
209  /* DWARF 1 */
210  .debug          0 : { *(.debug) }
211  .line           0 : { *(.line) }
212  /* GNU DWARF 1 extensions */
213  .debug_srcinfo  0 : { *(.debug_srcinfo) }
214  .debug_sfnames  0 : { *(.debug_sfnames) }
215  /* DWARF 1.1 and DWARF 2 */
216  .debug_aranges  0 : { *(.debug_aranges) }
217  .debug_pubnames 0 : { *(.debug_pubnames) }
218  /* DWARF 2 */
219  .debug_info     0 : { *(.debug_info) }
220  .debug_abbrev   0 : { *(.debug_abbrev) }
221  .debug_line     0 : { *(.debug_line) }
222  .debug_frame    0 : { *(.debug_frame) }
223  .debug_str      0 : { *(.debug_str) }
224  .debug_loc      0 : { *(.debug_loc) }
225  .debug_macinfo  0 : { *(.debug_macinfo) }
226  /* SGI/MIPS DWARF 2 extensions */
227  .debug_weaknames 0 : { *(.debug_weaknames) }
228  .debug_funcnames 0 : { *(.debug_funcnames) }
229  .debug_typenames 0 : { *(.debug_typenames) }
230  .debug_varnames  0 : { *(.debug_varnames) }
231
232  .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram
233  /* These must appear regardless of  .  */
234}
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