source: rtems/c/src/lib/libbsp/sh/gensh2/startup/linkcmds.rom @ 4a238002

4.104.114.84.95
Last change on this file since 4a238002 was 4a238002, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 18, 1999 at 9:22:58 PM

Patch from "John M. Mills" <jmills@…> with subsequent cleanup from
Ralf Corsepius <corsepiu@…> that adds initial Hitachi SH-2
support to RTEMS. Ralf's comments are:

Changes:
------

  1. SH-Port:
  • Many files renamed.
  • CONSOLE_DEVNAME and MHZ defines removed from libcpu.
  • console.c moved to libbsp/sh/shared, build in libbsp/sh/<BSP>/console applying VPATH.
  • CONSOLE_DEVNAME made BSP-specific, replacement is defined in bsp.h
  • MHZ define replaced with HZ (extendent resolution) in custom/*.cfg
  • -DHZ=HZ used in bspstart.c, only
  • Makefile variable HZ used in bsp-dependent directories only.
  1. SH1-Port
  • clock-driver rewritten to provide better resolution for odd CPU frequencies. This driver is only partially tested on hardware, ie. sightly experimental, but I don't expect severe problems with it.
  • Polling SCI-driver added. This driver is experimental and completly untested yet. Therefore it is not yet used for the console (/dev/console is still pointing to /dev/null, cf. gensh1/bsp.h).
  • minor changes to the timer driver
  • SH1 specific delay()/CPU_delay() now is implemented as a function
  1. SH2-Port
  • Merged
  • IMO, the code is still in its infancy. Therefore I have interspersed comments (FIXME) it for items which I think John should look after.
  • sci and console drivers partially rewritten and extended (John, I hope you don't mind).
  • Copyright notices are not yet adapted
  • Property mode set to 100644
File size: 6.2 KB
Line 
1/*
2 * This is an adapted linker script from egcs-1.0.1
3 *
4 * Memory layout for an SH7045F with main memory in area 2
5 * This memory layout it very similar to that used for Hitachi's
6 * EVB with CMON in FLASH
7 *
8 * NOTE: The ram start address may vary, all other start addresses are fixed
9 *       Not suiteable for gdb's simulator
10 *
11 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
12 *           Bernd Becker (becker@faw.uni-ulm.de)
13 *
14 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
15 *
16 *  This program is distributed in the hope that it will be useful,
17 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
18 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
19 *
20 *
21 *  COPYRIGHT (c) 1998.
22 *  On-Line Applications Research Corporation (OAR).
23 *  Copyright assigned to U.S. Government, 1994.
24 *
25 *  The license and distribution terms for this file may be
26 *  found in the file LICENSE in this distribution or at
27 *  http://www.OARcorp.com/rtems/license.html.
28 *
29 *      Modified to reflect SH7045F processor and EVB:
30 *      John M. Mills (jmills@tga.com)
31 *      TGA Technologies, Inc.
32 *      100 Pinnacle Way, Suite 140
33 *      Norcross, GA 30071 U.S.A.
34 *
35 *      This modified file may be copied and distributed in accordance
36 *      the above-referenced license. It is provided for critique and
37 *      developmental purposes without any warranty nor representation
38 *      by the authors or by TGA Technologies.
39 *
40 *  $Id$
41 */
42
43OUTPUT_FORMAT("coff-sh")
44OUTPUT_ARCH(sh)
45ENTRY(_start)
46
47/* These asignments represent actual SH7045F EVB architecture */
48
49MEMORY
50{
51  rom           : o = 0x00000000, l = 0x00040000
52  ram           : o = 0x00400000, l = 0x00080000
53  onchip_peri   : o = 0xFFFF8000, l = 0x00000800
54  onchip_ram    : o = 0xFFFFF000, l = 0x00001000
55}
56
57
58/* Sections are defined for RAM loading and monitor debugging */
59SECTIONS
60{
61  /* boot vector table */
62  .monvects 0x00000000 (NOLOAD): {
63    _monvects = . ;
64  } > rom
65
66  /* monitor play area */
67  .monram 0x00400000 (NOLOAD) :
68  {
69  _ramstart = .;
70  } > ram
71
72  /* monitor vector table */
73  .vects   0x00402000 (NOLOAD) : {
74    _vectab = . ;
75    *(.vects);
76  }
77
78  /* Read-only sections, merged into text segment: */
79
80  . = 0x00404000 ;
81  .interp        : { *(.interp)         }
82  .hash          : { *(.hash)           }
83  .dynsym        : { *(.dynsym)         }
84  .dynstr        : { *(.dynstr)         }
85  .gnu.version   : { *(.gnu.version)    }
86  .gnu.version_d : { *(.gnu.version_d)  }
87  .gnu.version_r : { *(.gnu.version_r)  }
88  .rel.text      :
89    { *(.rel.text) *(.rel.gnu.linkonce.t*) }
90  .rela.text     :
91    { *(.rela.text) *(.rela.gnu.linkonce.t*) }
92  .rel.data      :
93    { *(.rel.data) *(.rel.gnu.linkonce.d*) }
94  .rela.data     :
95    { *(.rela.data) *(.rela.gnu.linkonce.d*) }
96  .rel.rodata    :
97    { *(.rel.rodata) *(.rel.gnu.linkonce.r*) }
98  .rela.rodata   :
99    { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
100  .rel.got       : { *(.rel.got)                }
101  .rela.got      : { *(.rela.got)               }
102  .rel.ctors     : { *(.rel.ctors)      }
103  .rela.ctors    : { *(.rela.ctors)     }
104  .rel.dtors     : { *(.rel.dtors)      }
105  .rela.dtors    : { *(.rela.dtors)     }
106  .rel.init      : { *(.rel.init)       }
107  .rela.init     : { *(.rela.init)      }
108  .rel.fini      : { *(.rel.fini)       }
109  .rela.fini     : { *(.rela.fini)      }
110  .rel.bss       : { *(.rel.bss)                }
111  .rela.bss      : { *(.rela.bss)               }
112  .rel.plt       : { *(.rel.plt)                }
113  .rela.plt      : { *(.rela.plt)               }
114  .init          : { *(.init)   } =0
115  .plt           : { *(.plt)    }
116  .text   .      :
117  {
118    *(.text)
119    *(.stub)
120    /* .gnu.warning sections are handled specially by elf32.em.  */
121    *(.gnu.warning)
122    *(.gnu.linkonce.t*)
123  } > ram
124  _etext = .;
125  PROVIDE (etext = .);
126  .fini    .  : { *(.fini)    } =0
127  .rodata  .  : { *(.rodata) *(.gnu.linkonce.r*) }
128  .rodata1 .  : { *(.rodata1) }
129  /* Adjust the address for the data segment.  We want to adjust up to
130     the same address within the page on the next page up.  */
131  . = ALIGN(128) + (. & (128 - 1));
132  .data  .  :
133  {
134    *(.data)
135    *(.gnu.linkonce.d*)
136    CONSTRUCTORS
137  } > ram
138  .data1  . : { *(.data1) }
139  .ctors  .       :
140  {
141    ___ctors = .;
142    *(.ctors)
143    ___ctors_end = .;
144  }
145  .dtors  .       :
146  {
147    ___dtors = .;
148    *(.dtors)
149    ___dtors_end = .;
150  }
151  .got     .      : { *(.got.plt) *(.got) }
152  .dynamic .      : { *(.dynamic) }
153  /* We want the small data sections together, so single-instruction offsets
154     can access them all, and initialized data all before uninitialized, so
155     we can shorten the on-disk segment size.  */
156  .sdata   .  : { *(.sdata) }
157  _edata  =  .;
158  PROVIDE (edata = .);
159  __bss_start = .;
160  .sbss    .  : { *(.sbss) *(.scommon) }
161  .bss     .  :
162  {
163   *(.dynbss)
164   *(.bss)
165   *(COMMON)
166  } > ram
167  _end = . ;
168  PROVIDE (end = .);
169
170  _HeapStart = . ;
171  . = . + 1024 * 20 ;
172  PROVIDE( _HeapEnd = . );
173
174  _WorkSpaceStart = . ;
175  . = 0x00480000 ;
176  PROVIDE(_WorkSpaceEnd = .);
177
178  _CPU_Interrupt_stack_low  = 0xFFFFF000 ;
179  _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ;
180
181  /* Stabs debugging sections.  */
182  .stab 0 : { *(.stab) }
183  .stabstr 0 : { *(.stabstr) }
184  .stab.excl 0 : { *(.stab.excl) }
185  .stab.exclstr 0 : { *(.stab.exclstr) }
186  .stab.index 0 : { *(.stab.index) }
187  .stab.indexstr 0 : { *(.stab.indexstr) }
188  .comment 0 : { *(.comment) }
189  /* DWARF debug sections.
190     Symbols in the DWARF debugging sections are relative to the beginning
191     of the section so we begin them at 0.  */
192  /* DWARF 1 */
193  .debug          0 : { *(.debug) }
194  .line           0 : { *(.line) }
195  /* GNU DWARF 1 extensions */
196  .debug_srcinfo  0 : { *(.debug_srcinfo) }
197  .debug_sfnames  0 : { *(.debug_sfnames) }
198  /* DWARF 1.1 and DWARF 2 */
199  .debug_aranges  0 : { *(.debug_aranges) }
200  .debug_pubnames 0 : { *(.debug_pubnames) }
201  /* DWARF 2 */
202  .debug_info     0 : { *(.debug_info) }
203  .debug_abbrev   0 : { *(.debug_abbrev) }
204  .debug_line     0 : { *(.debug_line) }
205  .debug_frame    0 : { *(.debug_frame) }
206  .debug_str      0 : { *(.debug_str) }
207  .debug_loc      0 : { *(.debug_loc) }
208  .debug_macinfo  0 : { *(.debug_macinfo) }
209  /* SGI/MIPS DWARF 2 extensions */
210  .debug_weaknames 0 : { *(.debug_weaknames) }
211  .debug_funcnames 0 : { *(.debug_funcnames) }
212  .debug_typenames 0 : { *(.debug_typenames) }
213  .debug_varnames  0 : { *(.debug_varnames) }
214
215  .stack 0xFFFFFEC0 : { _stack = .; *(.stack) } > onchip_ram
216  /* These must appear regardless of  .  */
217}
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