source: rtems/c/src/lib/libbsp/sh/gensh2/startup/hw_init.c @ 8b91282

4.104.114.84.95
Last change on this file since 8b91282 was 8b91282, checked in by Joel Sherrill <joel.sherrill@…>, on Dec 21, 1999 at 2:27:52 PM

Patch rtems-rc-19991203-5.diff from Ralf Corsepius <corsepiu@…>
which cleans up and merges some Hitachi SH-2 modifications from
John Mills <jmills@…>.

  • Property mode set to 100644
File size: 3.6 KB
Line 
1/*
2 *  hw_init.c: set up sh7045F internal subunits
3 *             Pin and memory assignments assume
4 *             target is Hitachi SH7045F EVB ("lcevb")
5 *
6 *  Author: John M. Mills (jmills@tga.com)
7 *  COPYRIGHT(c) 1999, TGA Technologies, Inc
8 *                     Norcross, GA 30071 U.S.A
9 *
10 *  This program is distributed in the hope that it will be useful,
11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13 *
14 *
15 *  The license and distribution terms for this file may be
16 *  found in the file LICENSE in this distribution or at
17 *  http://www.OARcorp.com/rtems/license.html.
18 *
19 *  Adapted from Hitachi EVB7045F tutorial files by:
20 *  John M. Mills (jmills@tga.com)
21 *  TGA Technologies, Inc.
22 *  100 Pinnacle Way, Suite 140
23 *  Norcross, GA 30071 U.S.A.
24 * 
25 *
26 *  This file may be copied and distributed in accordance
27 *  the above-referenced license. It is provided for critique and
28 *  developmental purposes without any warranty nor representation
29 *  by the authors or by TGA Technologies.
30 *
31 *  $Id$
32 */
33
34#include <bsp.h>
35
36#include <stdlib.h>
37
38#include <rtems/libio.h>
39#include <iosupp.h>
40#include <rtems/score/sh_io.h>
41#include <rtems/score/iosh7045.h>
42
43/* exported entry */
44extern void hw_initialize (void);
45
46/* STANDALONE_EVB sets up bus, DRAM, PFC, and SCI0 */
47/* no STANDALONE_EVB accepts defaults, adds RESET, SCI1, WDT */
48
49/***************************************************/
50/*      Inline function to access CPU features     */
51/*      from C.  This makes use of GNU extensions. */
52/***************************************************/
53
54__inline__ void set_interrupt_mask(unsigned char mask)
55{
56  asm("mov.l r0,@-r15");
57  asm("mov %0,r0"::"r"(mask)); 
58  asm("and #0xF,r0");
59  asm("rotl r0");
60  asm("rotl r0");
61  asm("rotl r0");
62  asm("rotl r0");
63  asm("ldc r0,sr");
64  asm("mov.l @r15+,r0");
65}
66
67void hw_initialize (void) 
68{
69        int a;
70        unsigned8 temp8;
71        unsigned16 temp16;
72
73#ifdef STANDALONE_EVB
74        /* FIXME: replace 'magic numbers' */
75
76        write16(0x2020, BSC_BCR1);  /* Bus width access - 32-bit on CS1 */
77        write16(0xF3DD, BSC_BCR2);  /* Idle cycles CS3-CS0 - 0 idle cycles*/
78        write16(0xFF3F, BSC_WCR1);  /* Waits for CS3-CS0 - 3 waits on CS1 */
79        write16(0x000F, BSC_WCR2);  /* Waits for DRAM/DMA access - default */
80        write16(0x0000, BSC_DCR);   /* DRAM control - default */
81        write16(0x0000, BSC_RTCSR); /* DRAM refresh - default */
82        write16(0x0000, BSC_RTCNT); /* DRAM refresh counter - default*/
83        write16(0x0000, BSC_RTCOR); /* DRAM refresh compare match - default */
84       
85        write16(0x5000, PFC_PACRH); /* Pin function controller - WRHH, WRHL */
86        write16(0x1550, PFC_PACRL1); /* Pin fun. controller - WRH,WRL,RD,CS1 */
87        write16(0x0000, PFC_PBCR1); /* Pin function controller - default */
88        write16(0x2005, PFC_PBCR2); /* Pin function controller - A18,A17,A16 */
89        write16(0xFFFF, PFC_PCCR);  /* Pin function controller - A15-A0  */
90        write16(0x5555, PFC_PDCRH1; /* Pin function controller - D31-D24 */
91        write16(0x5555, PFC_PDCRH2); /* Pin function controller - D23-D16 */
92        write16(0xFFFF, PFC_PDCRL); /* Pin function controller - D15-D0  */
93        write16(0x0000, PFC_IFCR);  /* Pin function controller - default */
94        write16(0x0005, PFC_PACRL2); /* Pin function controller - Tx0, Rx0 */
95
96        write16(0x00, PFC_PACRL2); /* default disconnects all I/O */
97                                   /* pins; connected by DEVICE_open() */
98#endif
99
100        /* default hardware setup for SH7045F EVB */
101
102        /* PFC: General I/O except pin 13 (reset): */
103        temp16 = read16(PFC_PECR1) | 0x0800;
104        write16(temp16, PFC_PECR1);
105
106        /* All I/O lines bits 7-0: */
107        write16(0x00, PFC_PECR2);
108
109        /* P5 (LED) out, all other pins in: */
110        temp16 = read16(PFC_PEIOR) | 0x0020;
111        write16(temp16, PFC_PEIOR);
112
113}
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