source: rtems/c/src/lib/libbsp/sh/gensh1/startup/cpu_asm.c @ b850e7f

5
Last change on this file since b850e7f was b850e7f, checked in by Sebastian Huber <sebastian.huber@…>, on 12/08/17 at 12:23:41

bsp/gensh1: Move libcpu files to BSP

Update #3254.

  • Property mode set to 100644
File size: 3.9 KB
Line 
1/*
2 *  This file contains the basic algorithms for all assembly code used
3 *  in an specific CPU port of RTEMS.  These algorithms must be implemented
4 *  in assembly language
5 *
6 *  NOTE:  This port uses a C file with inline assembler instructions
7 *
8 *  Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and
9 *           Bernd Becker (becker@faw.uni-ulm.de)
10 *
11 *  COPYRIGHT (c) 1997-1998, FAW Ulm, Germany
12 *
13 *  This program is distributed in the hope that it will be useful,
14 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
16 *
17 *
18 *  COPYRIGHT (c) 1998.
19 *  On-Line Applications Research Corporation (OAR).
20 *
21 *  The license and distribution terms for this file may be
22 *  found in the file LICENSE in this distribution or at
23 *  http://www.rtems.org/license/LICENSE.
24 *
25 */
26
27/*
28 *  This is supposed to be an assembly file.  This means that system.h
29 *  and cpu.h should not be included in a "real" cpu_asm file.  An
30 *  implementation in assembly should include "cpu_asm.h"
31 */
32
33#include <rtems/system.h>
34#include <rtems/score/percpu.h>
35#include <rtems/score/isr.h>
36#include <rtems/score/threaddispatch.h>
37#include <rtems/score/sh.h>
38#include <rtems/score/ispsh7032.h>
39
40#include <rtems/score/ispsh7032.h>
41#include <rtems/score/iosh7032.h>
42#include <rtems/score/sh_io.h>
43
44/* from cpu_isps.c */
45extern proc_ptr         _Hardware_isr_Table[];
46
47#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
48  unsigned long    *_old_stack_ptr;
49#endif
50
51register unsigned long  *stack_ptr __asm__ ("r15");
52
53/*
54 * sh_set_irq_priority
55 *
56 * this function sets the interrupt level of the specified interrupt
57 *
58 * parameters:
59 *             - irq : interrupt number
60 *             - prio: priority to set for this interrupt number
61 *
62 * returns:    0 if ok
63 *             -1 on error
64 */
65
66unsigned int sh_set_irq_priority(
67  unsigned int irq,
68  unsigned int prio )
69{
70  uint32_t         shiftcount;
71  uint32_t         prioreg;
72  uint16_t         temp16;
73  ISR_Level        level;
74
75  /*
76   * first check for valid interrupt
77   */
78  if (( irq > 113) || (_Hardware_isr_Table[irq] == _dummy_isp))
79    return -1;
80  /*
81   * check for valid irq priority
82   */
83  if ( prio > 15 )
84    return -1;
85
86  /*
87   * look up appropriate interrupt priority register
88   */
89  if ( irq > 71)
90    {
91      irq = irq - 72;
92      shiftcount = 12 - ((irq & ~0x03) % 16);
93
94      switch( irq / 16)
95        {
96        case 0: { prioreg = INTC_IPRC; break;}
97        case 1: { prioreg = INTC_IPRD; break;}
98        case 2: { prioreg = INTC_IPRE; break;}
99        default: return -1;
100        }
101    }
102  else
103    {
104      shiftcount = 12 - 4 * ( irq % 4);
105      if ( irq > 67)
106        prioreg = INTC_IPRB;
107      else
108        prioreg = INTC_IPRA;
109    }
110
111  /*
112   * Set the interrupt priority register
113   */
114  _ISR_Local_disable( level );
115
116    temp16 = read16( prioreg);
117    temp16 &= ~( 15 << shiftcount);
118    temp16 |= prio << shiftcount;
119    write16( temp16, prioreg);
120
121  _ISR_Local_enable( level );
122
123  return 0;
124}
125
126/*
127 *  This routine provides the RTEMS interrupt management.
128 */
129
130void __ISR_Handler( uint32_t   vector)
131{
132  ISR_Level level;
133
134  _ISR_Local_disable( level );
135
136  _Thread_Dispatch_disable();
137
138#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
139  if ( _ISR_Nest_level == 0 )
140    {
141      /* Install irq stack */
142      _old_stack_ptr = stack_ptr;
143      stack_ptr = _CPU_Interrupt_stack_high;
144    }
145
146#endif
147
148  _ISR_Nest_level++;
149
150  _ISR_Local_enable( level );
151
152  /* call isp */
153  if ( _ISR_Vector_table[ vector])
154    (*_ISR_Vector_table[ vector ])( vector );
155
156  _ISR_Local_disable( level );
157
158  _Thread_Dispatch_unnest( _Per_CPU_Get() );
159
160  _ISR_Nest_level--;
161
162#if(CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
163
164  if ( _ISR_Nest_level == 0 )
165    /* restore old stack pointer */
166    stack_ptr = _old_stack_ptr;
167#endif
168
169  _ISR_Local_enable( level );
170
171  if ( _ISR_Nest_level )
172    return;
173
174  if ( !_Thread_Dispatch_is_enabled() ) {
175    return;
176  }
177
178  if ( _Thread_Dispatch_necessary ) {
179    _Thread_Dispatch();
180  }
181}
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