source: rtems/c/src/lib/libbsp/powerpc/virtex/README @ d11d1d2a

4.104.114.95
Last change on this file since d11d1d2a was d11d1d2a, checked in by Joel Sherrill <joel.sherrill@…>, on 12/11/07 at 15:46:53

2007-12-11 Joel Sherrill <joel.sherrill@…>

  • README, include/bsp.h, startup/bspstart.c: Eliminate copies of the Configuration Table. Use the RTEMS provided accessor macros to obtain configuration fields.
  • Property mode set to 100644
File size: 2.3 KB
Line 
1#
2#  $Id$
3#
4
5# Adapted from vitex BSP
6
7BSP NAME:           Virtex
8BOARD:              Xilinx ML-403 and (hopefully) any vitex/PPC based board
9BUS:                N/A
10CPU FAMILY:         ppc
11CPU:                PowerPC 405GP
12COPROCESSORS:       N/A
13MODE:               32 bit mode
14
15DEBUG MONITOR:
16
17PERIPHERALS
18===========
19TIMERS:             405GP internal
20SERIAL PORTS:       Xilinx consolelite
21REAL-TIME CLOCK:    none
22DMA:                Xilinx vitex internal
23VIDEO:              none
24SCSI:               none
25NETWORKING:         Xilinx TEMAC
26
27DRIVER INFORMATION
28==================
29CLOCK DRIVER:       PPC Decrementer
30IOSUPP DRIVER:      N/A
31SHMSUPP:            N/A
32TIMER DRIVER:       N/A
33TTY DRIVER:         consoleelite
34
35STDIO
36=====
37PORT:               Console port 0
38ELECTRICAL:         RS-232
39BAUD:               as defined in FPGA design
40BITS PER CHARACTER: 8
41PARITY:             None
42STOP BITS:          1
43
44Notes
45=====
46
47Board description
48-----------------
49clock rate:     234 MHz
50ROM:            16MByte FLASH
51RAM:            64MByte DRAM
52
53virtex only supports single processor operations.
54
55Porting
56-------
57This board support package is written for a typical virtex/PPC FPGA
58system. The rough features of such a board are described above.
59
60When a new virtex FPGA system is created (using the Xilinx design
61software), a parameter file "xparameters.h" is also created, which
62describes the basic features of the hardware (like peripherals
63inculded, interrupt routing etc).
64
65This BSP normally takes its basic HW description for the file
66"xparameters_dflt.h", which describes my FPGA system. When this BSP
67should run on a different hardware, a path to the proper
68"xparameters.h" can be provided on the "configure" command line.
69
70For adapting this BSP to other boards,
71
72the following files should be
73modified:
74
75- c/src/lib/libbsp/powerpc/virtex/startup/linkcmds
76        for the memory layout required
77
78- c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c
79        Here you can select the clock source for the timers and the
80        serial interface (system clock or external clock pin), the clock
81        rates, initial baud rate and other stuff
82
83- c/src/lib/libbsp/powerpc/virtex/include/bsp.h
84        some BSP-related constants
85
86- c/src/lib/libbsp/powerpc/virtex/*
87        well, they should be generic, so there _should_ be no reason
88        to mess around there (but who knows...)
89
90
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