1 | # |
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2 | # $Id$ |
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3 | # |
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4 | |
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5 | # Adapted from vitex BSP |
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6 | |
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7 | BSP NAME: Virtex |
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8 | BOARD: Xilinx ML-403 and (hopefully) any vitex/PPC based board |
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9 | BUS: N/A |
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10 | CPU FAMILY: ppc |
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11 | CPU: PowerPC 405GP |
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12 | COPROCESSORS: N/A |
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13 | MODE: 32 bit mode |
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14 | |
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15 | DEBUG MONITOR: |
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16 | |
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17 | PERIPHERALS |
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18 | =========== |
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19 | TIMERS: 405GP internal |
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20 | SERIAL PORTS: Xilinx consolelite |
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21 | REAL-TIME CLOCK: none |
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22 | DMA: Xilinx vitex internal |
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23 | VIDEO: none |
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24 | SCSI: none |
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25 | NETWORKING: Xilinx TEMAC |
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26 | |
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27 | DRIVER INFORMATION |
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28 | ================== |
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29 | CLOCK DRIVER: PPC Decrementer |
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30 | IOSUPP DRIVER: N/A |
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31 | SHMSUPP: N/A |
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32 | TIMER DRIVER: N/A |
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33 | TTY DRIVER: consoleelite |
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34 | |
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35 | STDIO |
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36 | ===== |
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37 | PORT: Console port 0 |
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38 | ELECTRICAL: RS-232 |
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39 | BAUD: as defined in FPGA design |
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40 | BITS PER CHARACTER: 8 |
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41 | PARITY: None |
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42 | STOP BITS: 1 |
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43 | |
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44 | Notes |
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45 | ===== |
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46 | |
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47 | Board description |
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48 | ----------------- |
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49 | clock rate: 234 MHz |
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50 | ROM: 16MByte FLASH |
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51 | RAM: 64MByte DRAM |
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52 | |
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53 | virtex only supports single processor operations. |
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54 | |
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55 | Porting |
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56 | ------- |
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57 | This board support package is written for a typical virtex/PPC FPGA |
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58 | system. The rough features of such a board are described above. |
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59 | |
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60 | When a new virtex FPGA system is created (using the Xilinx design |
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61 | software), a parameter file "xparameters.h" is also created, which |
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62 | describes the basic features of the hardware (like peripherals |
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63 | inculded, interrupt routing etc). |
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64 | |
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65 | This BSP normally takes its basic HW description for the file |
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66 | "xparameters_dflt.h", which describes my FPGA system. When this BSP |
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67 | should run on a different hardware, a path to the proper |
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68 | "xparameters.h" can be provided on the "configure" command line. |
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69 | |
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70 | For adapting this BSP to other boards, |
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71 | |
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72 | the following files should be |
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73 | modified: |
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74 | |
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75 | - c/src/lib/libbsp/powerpc/virtex/startup/linkcmds |
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76 | for the memory layout required |
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77 | |
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78 | - c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c |
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79 | Here you can select the clock source for the timers and the |
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80 | serial interface (system clock or external clock pin), the clock |
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81 | rates, initial baud rate and other stuff |
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82 | |
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83 | - c/src/lib/libbsp/powerpc/virtex/include/bsp.h |
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84 | some BSP-related constants |
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85 | |
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86 | - c/src/lib/libbsp/powerpc/virtex/* |
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87 | well, they should be generic, so there _should_ be no reason |
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88 | to mess around there (but who knows...) |
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89 | |
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90 | |
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