1 | /*===============================================================*\ |
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2 | | Project: RTEMS TQM8xx BSP | |
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3 | +-----------------------------------------------------------------+ |
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4 | | This file has been adapted to MPC8xx by | |
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5 | | Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> | |
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6 | | Copyright (c) 2008 | |
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7 | | Embedded Brains GmbH | |
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8 | | Obere Lagerstr. 30 | |
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9 | | D-82178 Puchheim | |
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10 | | Germany | |
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11 | | rtems@embedded-brains.de | |
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12 | | | |
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13 | | See the other copyright notice below for the original parts. | |
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14 | +-----------------------------------------------------------------+ |
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15 | | The license and distribution terms for this file may be | |
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16 | | found in the file LICENSE in this distribution or at | |
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17 | | | |
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18 | | http://www.rtems.com/license/LICENSE. | |
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19 | | | |
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20 | +-----------------------------------------------------------------+ |
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21 | | this file contains the console driver | |
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22 | \*===============================================================*/ |
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23 | /* derived from: */ |
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24 | /* |
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25 | * RTEMS/TCPIP driver for MPC8xx Ethernet |
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26 | * |
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27 | * split into separate driver files for SCC and FEC by |
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28 | * Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> |
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29 | * |
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30 | * Modified for MPC860 by Jay Monkman (jmonkman@frasca.com) |
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31 | * |
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32 | * This supports Ethernet on either SCC1 or the FEC of the MPC860T. |
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33 | * Right now, we only do 10 Mbps, even with the FEC. The function |
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34 | * rtems_enet_driver_attach determines which one to use. Currently, |
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35 | * only one may be used at a time. |
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36 | * |
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37 | * Based on the MC68360 network driver by |
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38 | * W. Eric Norum |
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39 | * Saskatchewan Accelerator Laboratory |
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40 | * University of Saskatchewan |
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41 | * Saskatoon, Saskatchewan, CANADA |
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42 | * eric@skatter.usask.ca |
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43 | * |
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44 | * This supports ethernet on SCC1. Right now, we only do 10 Mbps. |
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45 | * |
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46 | * Modifications by Darlene Stewart <Darlene.Stewart@iit.nrc.ca> |
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47 | * and Charles-Antoine Gauthier <charles.gauthier@iit.nrc.ca> |
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48 | * Copyright (c) 1999, National Research Council of Canada |
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49 | * |
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50 | * $Id$ |
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51 | */ |
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52 | #include <bsp.h> |
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53 | #include <stdio.h> |
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54 | #include <errno.h> |
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55 | #include <rtems/error.h> |
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56 | #include <rtems/rtems_bsdnet.h> |
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57 | |
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58 | #include <sys/param.h> |
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59 | #include <sys/mbuf.h> |
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60 | #include <sys/socket.h> |
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61 | #include <sys/sockio.h> |
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62 | |
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63 | #include <net/if.h> |
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64 | |
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65 | #include <netinet/in.h> |
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66 | #include <netinet/if_ether.h> |
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67 | #include <bsp/irq.h> |
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68 | |
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69 | #include <sys/types.h> |
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70 | #include <sys/socket.h> |
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71 | #include <arpa/inet.h> |
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72 | |
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73 | /* |
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74 | * Number of interfaces supported by this driver |
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75 | */ |
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76 | #define NIFACES 1 |
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77 | |
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78 | /* |
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79 | * Default number of buffer descriptors set aside for this driver. |
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80 | * The number of transmit buffer descriptors has to be quite large |
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81 | * since a single frame often uses four or more buffer descriptors. |
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82 | */ |
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83 | #define RX_BUF_COUNT 32 |
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84 | #define TX_BUF_COUNT 8 |
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85 | #define TX_BD_PER_BUF 4 |
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86 | |
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87 | #define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255") |
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88 | |
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89 | /* |
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90 | * RTEMS event used by interrupt handler to signal daemons. |
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91 | * This must *not* be the same event used by the TCP/IP task synchronization. |
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92 | */ |
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93 | #define INTERRUPT_EVENT RTEMS_EVENT_1 |
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94 | |
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95 | /* |
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96 | * RTEMS event used to start transmit daemon. |
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97 | * This must not be the same as INTERRUPT_EVENT. |
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98 | */ |
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99 | #define START_TRANSMIT_EVENT RTEMS_EVENT_2 |
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100 | |
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101 | /* |
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102 | * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518). |
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103 | * Round off to nearest multiple of RBUF_ALIGN. |
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104 | */ |
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105 | #define MAX_MTU_SIZE 1518 |
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106 | #define RBUF_ALIGN 4 |
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107 | #define RBUF_SIZE ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN) |
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108 | |
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109 | #if (MCLBYTES < RBUF_SIZE) |
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110 | # error "Driver must have MCLBYTES > RBUF_SIZE" |
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111 | #endif |
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112 | |
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113 | /* |
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114 | * Per-device data |
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115 | */ |
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116 | struct m8xx_fec_enet_struct { |
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117 | struct arpcom arpcom; |
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118 | struct mbuf **rxMbuf; |
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119 | struct mbuf **txMbuf; |
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120 | int acceptBroadcast; |
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121 | int rxBdCount; |
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122 | int txBdCount; |
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123 | int txBdHead; |
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124 | int txBdTail; |
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125 | int txBdActiveCount; |
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126 | m8xxBufferDescriptor_t *rxBdBase; |
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127 | m8xxBufferDescriptor_t *txBdBase; |
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128 | rtems_id rxDaemonTid; |
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129 | rtems_id txDaemonTid; |
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130 | |
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131 | /* |
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132 | * Statistics |
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133 | */ |
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134 | unsigned long rxInterrupts; |
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135 | unsigned long rxNotFirst; |
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136 | unsigned long rxNotLast; |
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137 | unsigned long rxGiant; |
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138 | unsigned long rxNonOctet; |
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139 | unsigned long rxRunt; |
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140 | unsigned long rxBadCRC; |
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141 | unsigned long rxOverrun; |
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142 | unsigned long rxCollision; |
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143 | |
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144 | unsigned long txInterrupts; |
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145 | unsigned long txDeferred; |
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146 | unsigned long txHeartbeat; |
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147 | unsigned long txLateCollision; |
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148 | unsigned long txRetryLimit; |
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149 | unsigned long txUnderrun; |
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150 | unsigned long txLostCarrier; |
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151 | unsigned long txRawWait; |
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152 | }; |
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153 | static struct m8xx_fec_enet_struct enet_driver[NIFACES]; |
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154 | |
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155 | /* |
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156 | * FEC interrupt handler |
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157 | */ |
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158 | static void m8xx_fec_interrupt_handler () |
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159 | { |
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160 | /* |
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161 | * Frame received? |
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162 | */ |
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163 | if (m8xx.fec.ievent & M8xx_FEC_IEVENT_RFINT) { |
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164 | m8xx.fec.ievent = M8xx_FEC_IEVENT_RFINT; |
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165 | enet_driver[0].rxInterrupts++; |
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166 | rtems_event_send (enet_driver[0].rxDaemonTid, INTERRUPT_EVENT); |
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167 | } |
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168 | |
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169 | /* |
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170 | * Buffer transmitted or transmitter error? |
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171 | */ |
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172 | if (m8xx.fec.ievent & M8xx_FEC_IEVENT_TFINT) { |
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173 | m8xx.fec.ievent = M8xx_FEC_IEVENT_TFINT; |
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174 | enet_driver[0].txInterrupts++; |
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175 | rtems_event_send (enet_driver[0].txDaemonTid, INTERRUPT_EVENT); |
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176 | } |
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177 | } |
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178 | |
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179 | /* |
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180 | * Please organize FEC controller code better by moving code from |
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181 | * m860_fec_initialize_hardware to m8xx_fec_ethernet_on |
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182 | */ |
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183 | static void m8xx_fec_ethernet_on(){}; |
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184 | static void m8xx_fec_ethernet_off(){}; |
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185 | static int m8xx_fec_ethernet_isOn (const rtems_irq_connect_data* ptr) |
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186 | { |
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187 | return BSP_irq_enabled_at_siu (ptr->name); |
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188 | } |
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189 | |
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190 | static rtems_irq_connect_data ethernetFECIrqData = { |
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191 | BSP_FAST_ETHERNET_CTRL, |
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192 | (rtems_irq_hdl) m8xx_fec_interrupt_handler, |
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193 | (rtems_irq_enable) m8xx_fec_ethernet_on, |
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194 | (rtems_irq_disable) m8xx_fec_ethernet_off, |
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195 | (rtems_irq_is_enabled)m8xx_fec_ethernet_isOn |
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196 | }; |
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197 | |
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198 | static void |
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199 | m8xx_fec_initialize_hardware (struct m8xx_fec_enet_struct *sc) |
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200 | { |
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201 | int i; |
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202 | unsigned char *hwaddr; |
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203 | |
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204 | /* |
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205 | * Issue reset to FEC |
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206 | */ |
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207 | m8xx.fec.ecntrl=0x1; |
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208 | |
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209 | /* |
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210 | * Put ethernet transciever in reset |
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211 | */ |
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212 | m8xx.pgcra |= 0x80; |
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213 | |
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214 | /* |
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215 | * Configure I/O ports |
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216 | */ |
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217 | m8xx.pdpar = 0x1fff; |
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218 | m8xx.pddir = 0x1c58; |
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219 | |
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220 | /* |
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221 | * Take ethernet transciever out of reset |
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222 | */ |
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223 | m8xx.pgcra &= ~0x80; |
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224 | |
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225 | /* |
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226 | * Set SIU interrupt level to LVL2 |
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227 | * |
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228 | */ |
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229 | m8xx.fec.ivec = ((((unsigned) BSP_FAST_ETHERNET_CTRL)/2) << 29); |
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230 | |
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231 | /* |
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232 | * Set the TX and RX fifo sizes. For now, we'll split it evenly |
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233 | */ |
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234 | /* If you uncomment these, the FEC will not work right. |
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235 | m8xx.fec.r_fstart = ((m8xx.fec.r_bound & 0x3ff) >> 2) & 0x3ff; |
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236 | m8xx.fec.x_fstart = 0; |
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237 | */ |
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238 | |
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239 | /* |
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240 | * Set our physical address |
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241 | */ |
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242 | hwaddr = sc->arpcom.ac_enaddr; |
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243 | |
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244 | m8xx.fec.addr_low = (hwaddr[0] << 24) | (hwaddr[1] << 16) | |
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245 | (hwaddr[2] << 8) | (hwaddr[3] << 0); |
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246 | m8xx.fec.addr_high = (hwaddr[4] << 24) | (hwaddr[5] << 16); |
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247 | |
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248 | /* |
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249 | * Clear the hash table |
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250 | */ |
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251 | m8xx.fec.hash_table_high = 0; |
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252 | m8xx.fec.hash_table_low = 0; |
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253 | |
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254 | /* |
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255 | * Set up receive buffer size |
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256 | */ |
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257 | m8xx.fec.r_buf_size = 0x5f0; /* set to 1520 */ |
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258 | |
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259 | /* |
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260 | * Allocate mbuf pointers |
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261 | */ |
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262 | sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, |
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263 | M_MBUF, M_NOWAIT); |
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264 | sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, |
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265 | M_MBUF, M_NOWAIT); |
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266 | if (!sc->rxMbuf || !sc->txMbuf) |
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267 | rtems_panic ("No memory for mbuf pointers"); |
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268 | |
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269 | /* |
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270 | * Set receiver and transmitter buffer descriptor bases |
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271 | */ |
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272 | sc->rxBdBase = m8xx_bd_allocate(sc->rxBdCount); |
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273 | sc->txBdBase = m8xx_bd_allocate(sc->txBdCount); |
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274 | m8xx.fec.r_des_start = (int)sc->rxBdBase; |
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275 | m8xx.fec.x_des_start = (int)sc->txBdBase; |
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276 | |
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277 | /* |
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278 | * Set up Receive Control Register: |
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279 | * Not promiscuous mode |
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280 | * MII mode |
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281 | * Half duplex |
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282 | * No loopback |
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283 | */ |
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284 | m8xx.fec.r_cntrl = 0x00000006; |
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285 | |
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286 | /* |
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287 | * Set up Transmit Control Register: |
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288 | * Half duplex |
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289 | * No heartbeat |
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290 | */ |
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291 | m8xx.fec.x_cntrl = 0x00000000; |
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292 | |
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293 | /* |
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294 | * Set up DMA function code: |
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295 | * Big-endian |
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296 | * DMA functino code = 0 |
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297 | */ |
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298 | m8xx.fec.fun_code = 0x78000000; |
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299 | |
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300 | /* |
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301 | * Initialize SDMA configuration register |
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302 | * SDMA ignores FRZ |
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303 | * FEC not aggressive |
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304 | * FEC arbitration ID = 0 => U-bus arbitration = 6 |
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305 | * RISC arbitration ID = 1 => U-bus arbitration = 5 |
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306 | */ |
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307 | m8xx.sdcr = 1; |
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308 | |
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309 | /* |
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310 | * Set MII speed to 2.5 MHz for 25 Mhz system clock |
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311 | */ |
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312 | m8xx.fec.mii_speed = 0x0a; |
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313 | m8xx.fec.mii_data = 0x58021000; |
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314 | |
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315 | /* |
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316 | * Set up receive buffer descriptors |
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317 | */ |
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318 | for (i = 0 ; i < sc->rxBdCount ; i++) |
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319 | (sc->rxBdBase + i)->status = 0; |
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320 | |
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321 | /* |
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322 | * Set up transmit buffer descriptors |
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323 | */ |
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324 | for (i = 0 ; i < sc->txBdCount ; i++) { |
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325 | (sc->txBdBase + i)->status = 0; |
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326 | sc->txMbuf[i] = NULL; |
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327 | } |
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328 | sc->txBdHead = sc->txBdTail = 0; |
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329 | sc->txBdActiveCount = 0; |
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330 | |
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331 | /* |
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332 | * Mask all FEC interrupts and clear events |
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333 | */ |
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334 | m8xx.fec.imask = M8xx_FEC_IEVENT_TFINT | |
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335 | M8xx_FEC_IEVENT_RFINT; |
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336 | m8xx.fec.ievent = ~0; |
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337 | |
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338 | /* |
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339 | * Set up interrupts |
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340 | */ |
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341 | if (!BSP_install_rtems_irq_handler (ðernetFECIrqData)) |
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342 | rtems_panic ("Can't attach M860 FEC interrupt handler\n"); |
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343 | |
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344 | } |
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345 | static void fec_rxDaemon (void *arg) |
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346 | { |
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347 | struct m8xx_fec_enet_struct *sc = (struct m8xx_fec_enet_struct *)arg; |
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348 | struct ifnet *ifp = &sc->arpcom.ac_if; |
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349 | struct mbuf *m; |
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350 | uint16_t status; |
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351 | m8xxBufferDescriptor_t *rxBd; |
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352 | int rxBdIndex; |
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353 | |
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354 | /* |
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355 | * Allocate space for incoming packets and start reception |
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356 | */ |
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357 | for (rxBdIndex = 0 ; ;) { |
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358 | rxBd = sc->rxBdBase + rxBdIndex; |
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359 | MGETHDR (m, M_WAIT, MT_DATA); |
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360 | MCLGET (m, M_WAIT); |
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361 | m->m_pkthdr.rcvif = ifp; |
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362 | sc->rxMbuf[rxBdIndex] = m; |
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363 | rxBd->buffer = mtod (m, void *); |
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364 | rxBd->status = M8xx_BD_EMPTY; |
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365 | m8xx.fec.r_des_active = 0x1000000; |
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366 | if (++rxBdIndex == sc->rxBdCount) { |
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367 | rxBd->status |= M8xx_BD_WRAP; |
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368 | break; |
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369 | } |
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370 | } |
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371 | |
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372 | /* |
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373 | * Input packet handling loop |
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374 | */ |
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375 | rxBdIndex = 0; |
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376 | for (;;) { |
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377 | rxBd = sc->rxBdBase + rxBdIndex; |
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378 | |
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379 | /* |
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380 | * Wait for packet if there's not one ready |
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381 | */ |
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382 | if ((status = rxBd->status) & M8xx_BD_EMPTY) { |
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383 | /* |
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384 | * Clear old events |
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385 | */ |
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386 | m8xx.fec.ievent = M8xx_FEC_IEVENT_RFINT; |
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387 | |
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388 | /* |
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389 | * Wait for packet |
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390 | * Note that the buffer descriptor is checked |
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391 | * *before* the event wait -- this catches the |
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392 | * possibility that a packet arrived between the |
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393 | * `if' above, and the clearing of the event register. |
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394 | */ |
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395 | while ((status = rxBd->status) & M8xx_BD_EMPTY) { |
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396 | rtems_event_set events; |
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397 | |
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398 | /* |
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399 | * Unmask RXF (Full frame received) event |
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400 | */ |
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401 | m8xx.fec.ievent |= M8xx_FEC_IEVENT_RFINT; |
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402 | |
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403 | rtems_bsdnet_event_receive (INTERRUPT_EVENT, |
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404 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
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405 | RTEMS_NO_TIMEOUT, |
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406 | &events); |
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407 | } |
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408 | } |
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409 | |
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410 | /* |
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411 | * Check that packet is valid |
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412 | */ |
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413 | if (status & M8xx_BD_LAST) { |
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414 | /* |
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415 | * Pass the packet up the chain. |
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416 | * FIXME: Packet filtering hook could be done here. |
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417 | */ |
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418 | struct ether_header *eh; |
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419 | |
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420 | /* |
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421 | * Invalidate the buffer for this descriptor |
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422 | */ |
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423 | rtems_cache_invalidate_multiple_data_lines((const void *)rxBd->buffer, rxBd->length); |
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424 | |
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425 | m = sc->rxMbuf[rxBdIndex]; |
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426 | m->m_len = m->m_pkthdr.len = rxBd->length - |
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427 | sizeof(uint32_t) - |
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428 | sizeof(struct ether_header); |
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429 | eh = mtod (m, struct ether_header *); |
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430 | m->m_data += sizeof(struct ether_header); |
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431 | ether_input (ifp, eh, m); |
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432 | |
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433 | /* |
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434 | * Allocate a new mbuf |
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435 | */ |
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436 | MGETHDR (m, M_WAIT, MT_DATA); |
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437 | MCLGET (m, M_WAIT); |
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438 | m->m_pkthdr.rcvif = ifp; |
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439 | sc->rxMbuf[rxBdIndex] = m; |
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440 | rxBd->buffer = mtod (m, void *); |
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441 | } |
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442 | else { |
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443 | /* |
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444 | * Something went wrong with the reception |
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445 | */ |
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446 | if (!(status & M8xx_BD_LAST)) |
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447 | sc->rxNotLast++; |
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448 | if (status & M8xx_BD_LONG) |
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449 | sc->rxGiant++; |
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450 | if (status & M8xx_BD_NONALIGNED) |
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451 | sc->rxNonOctet++; |
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452 | if (status & M8xx_BD_SHORT) |
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453 | sc->rxRunt++; |
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454 | if (status & M8xx_BD_CRC_ERROR) |
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455 | sc->rxBadCRC++; |
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456 | if (status & M8xx_BD_OVERRUN) |
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457 | sc->rxOverrun++; |
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458 | if (status & M8xx_BD_COLLISION) |
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459 | sc->rxCollision++; |
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460 | } |
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461 | /* |
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462 | * Reenable the buffer descriptor |
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463 | */ |
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464 | rxBd->status = (status & M8xx_BD_WRAP) | |
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465 | M8xx_BD_EMPTY; |
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466 | m8xx.fec.r_des_active = 0x1000000; |
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467 | /* |
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468 | * Move to next buffer descriptor |
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469 | */ |
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470 | if (++rxBdIndex == sc->rxBdCount) |
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471 | rxBdIndex = 0; |
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472 | } |
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473 | } |
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474 | |
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475 | /* |
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476 | * Soak up buffer descriptors that have been sent. |
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477 | * Note that a buffer descriptor can't be retired as soon as it becomes |
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478 | * ready. The MPC860 manual (MPC860UM/AD 07/98 Rev.1) and the MPC821 |
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479 | * manual state that, "If an Ethernet frame is made up of multiple |
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480 | * buffers, the user should not reuse the first buffer descriptor until |
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481 | * the last buffer descriptor of the frame has had its ready bit cleared |
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482 | * by the CPM". |
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483 | */ |
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484 | static void |
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485 | m8xx_fec_Enet_retire_tx_bd (struct m8xx_fec_enet_struct *sc) |
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486 | { |
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487 | uint16_t status; |
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488 | int i; |
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489 | int nRetired; |
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490 | struct mbuf *m, *n; |
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491 | |
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492 | i = sc->txBdTail; |
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493 | nRetired = 0; |
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494 | while ((sc->txBdActiveCount != 0) |
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495 | && (((status = (sc->txBdBase + i)->status) & M8xx_BD_READY) == 0)) { |
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496 | /* |
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497 | * See if anything went wrong |
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498 | */ |
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499 | if (status & (M8xx_BD_DEFER | |
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500 | M8xx_BD_HEARTBEAT | |
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501 | M8xx_BD_LATE_COLLISION | |
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502 | M8xx_BD_RETRY_LIMIT | |
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503 | M8xx_BD_UNDERRUN | |
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504 | M8xx_BD_CARRIER_LOST)) { |
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505 | /* |
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506 | * Check for errors which stop the transmitter. |
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507 | */ |
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508 | if (status & (M8xx_BD_LATE_COLLISION | |
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509 | M8xx_BD_RETRY_LIMIT | |
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510 | M8xx_BD_UNDERRUN)) { |
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511 | if (status & M8xx_BD_LATE_COLLISION) |
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512 | enet_driver[0].txLateCollision++; |
---|
513 | if (status & M8xx_BD_RETRY_LIMIT) |
---|
514 | enet_driver[0].txRetryLimit++; |
---|
515 | if (status & M8xx_BD_UNDERRUN) |
---|
516 | enet_driver[0].txUnderrun++; |
---|
517 | |
---|
518 | /* |
---|
519 | * Restart the transmitter |
---|
520 | */ |
---|
521 | /* FIXME: this should get executed only if using the SCC */ |
---|
522 | m8xx_cp_execute_cmd (M8xx_CR_OP_RESTART_TX | M8xx_CR_CHAN_SCC1); |
---|
523 | } |
---|
524 | if (status & M8xx_BD_DEFER) |
---|
525 | enet_driver[0].txDeferred++; |
---|
526 | if (status & M8xx_BD_HEARTBEAT) |
---|
527 | enet_driver[0].txHeartbeat++; |
---|
528 | if (status & M8xx_BD_CARRIER_LOST) |
---|
529 | enet_driver[0].txLostCarrier++; |
---|
530 | } |
---|
531 | nRetired++; |
---|
532 | if (status & M8xx_BD_LAST) { |
---|
533 | /* |
---|
534 | * A full frame has been transmitted. |
---|
535 | * Free all the associated buffer descriptors. |
---|
536 | */ |
---|
537 | sc->txBdActiveCount -= nRetired; |
---|
538 | while (nRetired) { |
---|
539 | nRetired--; |
---|
540 | m = sc->txMbuf[sc->txBdTail]; |
---|
541 | MFREE (m, n); |
---|
542 | if (++sc->txBdTail == sc->txBdCount) |
---|
543 | sc->txBdTail = 0; |
---|
544 | } |
---|
545 | } |
---|
546 | if (++i == sc->txBdCount) |
---|
547 | i = 0; |
---|
548 | } |
---|
549 | } |
---|
550 | |
---|
551 | static void fec_sendpacket (struct ifnet *ifp, struct mbuf *m) |
---|
552 | { |
---|
553 | struct m8xx_fec_enet_struct *sc = ifp->if_softc; |
---|
554 | volatile m8xxBufferDescriptor_t *firstTxBd, *txBd; |
---|
555 | /* struct mbuf *l = NULL; */ |
---|
556 | uint16_t status; |
---|
557 | int nAdded; |
---|
558 | |
---|
559 | /* |
---|
560 | * Free up buffer descriptors |
---|
561 | */ |
---|
562 | m8xx_fec_Enet_retire_tx_bd (sc); |
---|
563 | |
---|
564 | /* |
---|
565 | * Set up the transmit buffer descriptors. |
---|
566 | * No need to pad out short packets since the |
---|
567 | * hardware takes care of that automatically. |
---|
568 | * No need to copy the packet to a contiguous buffer |
---|
569 | * since the hardware is capable of scatter/gather DMA. |
---|
570 | */ |
---|
571 | nAdded = 0; |
---|
572 | txBd = firstTxBd = sc->txBdBase + sc->txBdHead; |
---|
573 | for (;;) { |
---|
574 | /* |
---|
575 | * Wait for buffer descriptor to become available. |
---|
576 | */ |
---|
577 | if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { |
---|
578 | /* |
---|
579 | * Clear old events |
---|
580 | */ |
---|
581 | m8xx.fec.ievent = M8xx_FEC_IEVENT_TFINT; |
---|
582 | |
---|
583 | /* |
---|
584 | * Wait for buffer descriptor to become available. |
---|
585 | * Note that the buffer descriptors are checked |
---|
586 | * *before* * entering the wait loop -- this catches |
---|
587 | * the possibility that a buffer descriptor became |
---|
588 | * available between the `if' above, and the clearing |
---|
589 | * of the event register. |
---|
590 | * This is to catch the case where the transmitter |
---|
591 | * stops in the middle of a frame -- and only the |
---|
592 | * last buffer descriptor in a frame can generate |
---|
593 | * an interrupt. |
---|
594 | */ |
---|
595 | m8xx_fec_Enet_retire_tx_bd (sc); |
---|
596 | while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { |
---|
597 | rtems_event_set events; |
---|
598 | |
---|
599 | /* |
---|
600 | * Unmask TXB (buffer transmitted) and |
---|
601 | * TXE (transmitter error) events. |
---|
602 | */ |
---|
603 | m8xx.fec.ievent |= M8xx_FEC_IEVENT_TFINT; |
---|
604 | rtems_bsdnet_event_receive (INTERRUPT_EVENT, |
---|
605 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
---|
606 | RTEMS_NO_TIMEOUT, |
---|
607 | &events); |
---|
608 | m8xx_fec_Enet_retire_tx_bd (sc); |
---|
609 | } |
---|
610 | } |
---|
611 | |
---|
612 | /* |
---|
613 | * Don't set the READY flag till the |
---|
614 | * whole packet has been readied. |
---|
615 | */ |
---|
616 | status = nAdded ? M8xx_BD_READY : 0; |
---|
617 | |
---|
618 | /* |
---|
619 | * FIXME: Why not deal with empty mbufs at at higher level? |
---|
620 | * The IP fragmentation routine in ip_output |
---|
621 | * can produce packet fragments with zero length. |
---|
622 | * I think that ip_output should be changed to get |
---|
623 | * rid of these zero-length mbufs, but for now, |
---|
624 | * I'll deal with them here. |
---|
625 | */ |
---|
626 | if (m->m_len) { |
---|
627 | /* |
---|
628 | * Fill in the buffer descriptor |
---|
629 | */ |
---|
630 | txBd->buffer = mtod (m, void *); |
---|
631 | txBd->length = m->m_len; |
---|
632 | |
---|
633 | /* |
---|
634 | * Flush the buffer for this descriptor |
---|
635 | */ |
---|
636 | rtems_cache_flush_multiple_data_lines(txBd->buffer, txBd->length); |
---|
637 | |
---|
638 | sc->txMbuf[sc->txBdHead] = m; |
---|
639 | nAdded++; |
---|
640 | if (++sc->txBdHead == sc->txBdCount) { |
---|
641 | status |= M8xx_BD_WRAP; |
---|
642 | sc->txBdHead = 0; |
---|
643 | } |
---|
644 | /* l = m;*/ |
---|
645 | m = m->m_next; |
---|
646 | } |
---|
647 | else { |
---|
648 | /* |
---|
649 | * Just toss empty mbufs |
---|
650 | */ |
---|
651 | struct mbuf *n; |
---|
652 | MFREE (m, n); |
---|
653 | m = n; |
---|
654 | /* |
---|
655 | if (l != NULL) |
---|
656 | l->m_next = m; |
---|
657 | */ |
---|
658 | } |
---|
659 | |
---|
660 | /* |
---|
661 | * Set the transmit buffer status. |
---|
662 | * Break out of the loop if this mbuf is the last in the frame. |
---|
663 | */ |
---|
664 | if (m == NULL) { |
---|
665 | if (nAdded) { |
---|
666 | status |= M8xx_BD_LAST | M8xx_BD_TX_CRC; |
---|
667 | txBd->status = status; |
---|
668 | firstTxBd->status |= M8xx_BD_READY; |
---|
669 | m8xx.fec.x_des_active = 0x1000000; |
---|
670 | sc->txBdActiveCount += nAdded; |
---|
671 | } |
---|
672 | break; |
---|
673 | } |
---|
674 | txBd->status = status; |
---|
675 | txBd = sc->txBdBase + sc->txBdHead; |
---|
676 | } |
---|
677 | } |
---|
678 | void fec_txDaemon (void *arg) |
---|
679 | { |
---|
680 | struct m8xx_fec_enet_struct *sc = (struct m8xx_fec_enet_struct *)arg; |
---|
681 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
682 | struct mbuf *m; |
---|
683 | rtems_event_set events; |
---|
684 | |
---|
685 | for (;;) { |
---|
686 | /* |
---|
687 | * Wait for packet |
---|
688 | */ |
---|
689 | rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, |
---|
690 | RTEMS_EVENT_ANY | RTEMS_WAIT, |
---|
691 | RTEMS_NO_TIMEOUT, |
---|
692 | &events); |
---|
693 | |
---|
694 | /* |
---|
695 | * Send packets till queue is empty |
---|
696 | */ |
---|
697 | for (;;) { |
---|
698 | /* |
---|
699 | * Get the next mbuf chain to transmit. |
---|
700 | */ |
---|
701 | IF_DEQUEUE(&ifp->if_snd, m); |
---|
702 | if (!m) |
---|
703 | break; |
---|
704 | fec_sendpacket (ifp, m); |
---|
705 | } |
---|
706 | ifp->if_flags &= ~IFF_OACTIVE; |
---|
707 | } |
---|
708 | } |
---|
709 | static void fec_init (void *arg) |
---|
710 | { |
---|
711 | struct m8xx_fec_enet_struct *sc = arg; |
---|
712 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
713 | |
---|
714 | if (sc->txDaemonTid == 0) { |
---|
715 | |
---|
716 | /* |
---|
717 | * Set up SCC hardware |
---|
718 | */ |
---|
719 | m8xx_fec_initialize_hardware (sc); |
---|
720 | |
---|
721 | /* |
---|
722 | * Start driver tasks |
---|
723 | */ |
---|
724 | sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, fec_txDaemon, sc); |
---|
725 | sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, fec_rxDaemon, sc); |
---|
726 | |
---|
727 | } |
---|
728 | |
---|
729 | /* |
---|
730 | * Set flags appropriately |
---|
731 | */ |
---|
732 | if (ifp->if_flags & IFF_PROMISC) |
---|
733 | m8xx.fec.r_cntrl |= 0x8; |
---|
734 | else |
---|
735 | m8xx.fec.r_cntrl &= ~0x8; |
---|
736 | |
---|
737 | /* |
---|
738 | * Tell the world that we're running. |
---|
739 | */ |
---|
740 | ifp->if_flags |= IFF_RUNNING; |
---|
741 | |
---|
742 | /* |
---|
743 | * Enable receiver and transmitter |
---|
744 | */ |
---|
745 | m8xx.fec.ecntrl = 0x2; |
---|
746 | } |
---|
747 | |
---|
748 | /* |
---|
749 | * Send packet (caller provides header). |
---|
750 | */ |
---|
751 | static void |
---|
752 | m8xx_fec_enet_start (struct ifnet *ifp) |
---|
753 | { |
---|
754 | struct m8xx_fec_enet_struct *sc = ifp->if_softc; |
---|
755 | |
---|
756 | rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT); |
---|
757 | ifp->if_flags |= IFF_OACTIVE; |
---|
758 | } |
---|
759 | |
---|
760 | static void fec_stop (struct m8xx_fec_enet_struct *sc) |
---|
761 | { |
---|
762 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
763 | |
---|
764 | ifp->if_flags &= ~IFF_RUNNING; |
---|
765 | |
---|
766 | /* |
---|
767 | * Shut down receiver and transmitter |
---|
768 | */ |
---|
769 | m8xx.fec.ecntrl = 0x0; |
---|
770 | } |
---|
771 | |
---|
772 | /* |
---|
773 | * Show interface statistics |
---|
774 | */ |
---|
775 | static void fec_enet_stats (struct m8xx_fec_enet_struct *sc) |
---|
776 | { |
---|
777 | printf (" Rx Interrupts:%-8lu", sc->rxInterrupts); |
---|
778 | printf (" Not First:%-8lu", sc->rxNotFirst); |
---|
779 | printf (" Not Last:%-8lu\n", sc->rxNotLast); |
---|
780 | printf (" Giant:%-8lu", sc->rxGiant); |
---|
781 | printf (" Runt:%-8lu", sc->rxRunt); |
---|
782 | printf (" Non-octet:%-8lu\n", sc->rxNonOctet); |
---|
783 | printf (" Bad CRC:%-8lu", sc->rxBadCRC); |
---|
784 | printf (" Overrun:%-8lu", sc->rxOverrun); |
---|
785 | printf (" Collision:%-8lu\n", sc->rxCollision); |
---|
786 | printf (" Discarded:%-8lu\n", (unsigned long)m8xx.scc1p.un.ethernet.disfc); |
---|
787 | |
---|
788 | printf (" Tx Interrupts:%-8lu", sc->txInterrupts); |
---|
789 | printf (" Deferred:%-8lu", sc->txDeferred); |
---|
790 | printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat); |
---|
791 | printf (" No Carrier:%-8lu", sc->txLostCarrier); |
---|
792 | printf ("Retransmit Limit:%-8lu", sc->txRetryLimit); |
---|
793 | printf (" Late Collision:%-8lu\n", sc->txLateCollision); |
---|
794 | printf (" Underrun:%-8lu", sc->txUnderrun); |
---|
795 | printf (" Raw output wait:%-8lu\n", sc->txRawWait); |
---|
796 | } |
---|
797 | |
---|
798 | static int fec_ioctl (struct ifnet *ifp, int command, caddr_t data) |
---|
799 | { |
---|
800 | struct m8xx_fec_enet_struct *sc = ifp->if_softc; |
---|
801 | int error = 0; |
---|
802 | |
---|
803 | switch (command) { |
---|
804 | case SIOCGIFADDR: |
---|
805 | case SIOCSIFADDR: |
---|
806 | ether_ioctl (ifp, command, data); |
---|
807 | break; |
---|
808 | |
---|
809 | case SIOCSIFFLAGS: |
---|
810 | switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { |
---|
811 | case IFF_RUNNING: |
---|
812 | fec_stop (sc); |
---|
813 | break; |
---|
814 | |
---|
815 | case IFF_UP: |
---|
816 | fec_init (sc); |
---|
817 | break; |
---|
818 | |
---|
819 | case IFF_UP | IFF_RUNNING: |
---|
820 | fec_stop (sc); |
---|
821 | fec_init (sc); |
---|
822 | break; |
---|
823 | |
---|
824 | default: |
---|
825 | break; |
---|
826 | } |
---|
827 | break; |
---|
828 | |
---|
829 | case SIO_RTEMS_SHOW_STATS: |
---|
830 | fec_enet_stats (sc); |
---|
831 | break; |
---|
832 | |
---|
833 | /* |
---|
834 | * FIXME: All sorts of multicast commands need to be added here! |
---|
835 | */ |
---|
836 | default: |
---|
837 | error = EINVAL; |
---|
838 | break; |
---|
839 | } |
---|
840 | return error; |
---|
841 | } |
---|
842 | int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) |
---|
843 | { |
---|
844 | struct m8xx_fec_enet_struct *sc; |
---|
845 | struct ifnet *ifp; |
---|
846 | int mtu; |
---|
847 | int unitNumber; |
---|
848 | char *unitName; |
---|
849 | static const uint8_t maczero[] ={0,0,0,0,0,0}; |
---|
850 | |
---|
851 | /* |
---|
852 | * Parse driver name |
---|
853 | */ |
---|
854 | if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0) |
---|
855 | return 0; |
---|
856 | |
---|
857 | /* |
---|
858 | * Is driver free? |
---|
859 | */ |
---|
860 | if ((unitNumber <= 0) || (unitNumber > NIFACES)) { |
---|
861 | printf ("Bad SCC unit number.\n"); |
---|
862 | return 0; |
---|
863 | } |
---|
864 | sc = &enet_driver[unitNumber - 1]; |
---|
865 | ifp = &sc->arpcom.ac_if; |
---|
866 | if (ifp->if_softc != NULL) { |
---|
867 | printf ("Driver already in use.\n"); |
---|
868 | return 0; |
---|
869 | } |
---|
870 | |
---|
871 | /* |
---|
872 | * Process options |
---|
873 | */ |
---|
874 | if (config->hardware_address) { |
---|
875 | memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN); |
---|
876 | } |
---|
877 | #ifdef BSP_HAS_TQMMON |
---|
878 | else if(0 != memcmp(maczero,TQM_BD_INFO.eth_addr,ETHER_ADDR_LEN)) { |
---|
879 | memcpy (sc->arpcom.ac_enaddr, TQM_BD_INFO.eth_addr, ETHER_ADDR_LEN); |
---|
880 | } |
---|
881 | #endif |
---|
882 | else { |
---|
883 | /* FIXME to read the enaddr from NVRAM */ |
---|
884 | } |
---|
885 | if (config->mtu) |
---|
886 | mtu = config->mtu; |
---|
887 | else |
---|
888 | mtu = ETHERMTU; |
---|
889 | if (config->rbuf_count) |
---|
890 | sc->rxBdCount = config->rbuf_count; |
---|
891 | else |
---|
892 | sc->rxBdCount = RX_BUF_COUNT; |
---|
893 | if (config->xbuf_count) |
---|
894 | sc->txBdCount = config->xbuf_count; |
---|
895 | else |
---|
896 | sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; |
---|
897 | sc->acceptBroadcast = !config->ignore_broadcast; |
---|
898 | |
---|
899 | /* |
---|
900 | * Set up network interface values |
---|
901 | */ |
---|
902 | ifp->if_softc = sc; |
---|
903 | ifp->if_unit = unitNumber; |
---|
904 | ifp->if_name = unitName; |
---|
905 | ifp->if_mtu = mtu; |
---|
906 | ifp->if_init = fec_init; |
---|
907 | ifp->if_ioctl = fec_ioctl; |
---|
908 | ifp->if_start = m8xx_fec_enet_start; |
---|
909 | ifp->if_output = ether_output; |
---|
910 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; |
---|
911 | if (ifp->if_snd.ifq_maxlen == 0) |
---|
912 | ifp->if_snd.ifq_maxlen = ifqmaxlen; |
---|
913 | |
---|
914 | /* |
---|
915 | * Attach the interface |
---|
916 | */ |
---|
917 | if_attach (ifp); |
---|
918 | ether_ifattach (ifp); |
---|
919 | return 1; |
---|
920 | }; |
---|
921 | |
---|
922 | int rtems_fec_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, |
---|
923 | int attaching) |
---|
924 | { |
---|
925 | return rtems_fec_driver_attach(config); |
---|
926 | } |
---|