source: rtems/c/src/lib/libbsp/powerpc/t32mppc/startup/bspstart.c @ b7cd6d51

4.115
Last change on this file since b7cd6d51 was b7cd6d51, checked in by Sebastian Huber <sebastian.huber@…>, on 12/15/14 at 10:49:10

bsp/t32mppc: Fix warnings

  • Property mode set to 100644
File size: 1.8 KB
RevLine 
[e21c287c]1/*
[b7cd6d51]2 * Copyright (c) 2012-2014 embedded brains GmbH.  All rights reserved.
[e21c287c]3 *
4 *  embedded brains GmbH
[b7cd6d51]5 *  Dornierstr. 4
[e21c287c]6 *  82178 Puchheim
7 *  Germany
8 *  <rtems@embedded-brains.de>
9 *
10 * The license and distribution terms for this file may be
11 * found in the file LICENSE in this distribution or at
[c499856]12 * http://www.rtems.org/license/LICENSE.
[e21c287c]13 */
14
15#include <rtems/config.h>
[24bf11e]16#include <rtems/counter.h>
[e21c287c]17
18#include <bsp.h>
19#include <bsp/vectors.h>
20#include <bsp/bootcard.h>
21#include <bsp/irq-generic.h>
22#include <bsp/linker-symbols.h>
23
24LINKER_SYMBOL(bsp_exc_vector_base);
25
26/*
27 * Configuration parameter for clock driver.  The Trace32 PowerPC simulator has
28 * an odd decrementer frequency.  The time base frequency is one tick per
29 * instruction.  The decrementer frequency is one tick per ten instructions.
30 * The clock driver assumes that the time base and decrementer frequencies are
31 * equal.  For now we simulate processor that issues 10000000 instructions per
32 * second.
33 */
34uint32_t bsp_time_base_frequency = 10000000 / 10;
35
36void BSP_panic(char *s)
37{
38  rtems_interrupt_level level;
39
40  rtems_interrupt_disable(level);
[b7cd6d51]41  (void) level;
[e21c287c]42
43  printk("%s PANIC %s\n", rtems_get_version_string(), s);
44
45  while (1) {
46    /* Do nothing */
47  }
48}
49
50void _BSP_Fatal_error(unsigned n)
51{
52  rtems_interrupt_level level;
53
54  rtems_interrupt_disable(level);
[b7cd6d51]55  (void) level;
[e21c287c]56
57  printk("%s PANIC ERROR %u\n", rtems_get_version_string(), n);
58
59  while (1) {
60    /* Do nothing */
61  }
62}
63
64void bsp_start(void)
65{
66  get_ppc_cpu_type();
67  get_ppc_cpu_revision();
68
[24bf11e]69  rtems_counter_initialize_converter(bsp_time_base_frequency);
70
[e21c287c]71  /* Initialize exception handler */
[5f91272]72  ppc_exc_initialize_with_vector_base(
[e21c287c]73    (uintptr_t) bsp_section_work_begin,
[5f91272]74    rtems_configuration_get_interrupt_stack_size(),
75    bsp_exc_vector_base
[e21c287c]76  );
77
78  /* Initalize interrupt support */
[dd8df59]79  bsp_interrupt_initialize();
[e21c287c]80}
Note: See TracBrowser for help on using the repository browser.