[e21c287c] | 1 | /* |
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[5d0fa047] | 2 | * Copyright (c) 2012, 2017 embedded brains GmbH. All rights reserved. |
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[e21c287c] | 3 | * |
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| 4 | * embedded brains GmbH |
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[8d6ceb1] | 5 | * Dornierstr. 4 |
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[e21c287c] | 6 | * 82178 Puchheim |
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| 7 | * Germany |
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| 8 | * <rtems@embedded-brains.de> |
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| 9 | * |
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| 10 | * The license and distribution terms for this file may be |
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| 11 | * found in the file LICENSE in this distribution or at |
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[c499856] | 12 | * http://www.rtems.org/license/LICENSE. |
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[e21c287c] | 13 | */ |
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| 14 | |
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| 15 | #include <bspopts.h> |
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| 16 | |
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[5d0fa047] | 17 | #include <rtems/score/percpu.h> |
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[e21c287c] | 18 | #include <libcpu/powerpc-utility.h> |
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| 19 | #include <bsp/vectors.h> |
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| 20 | |
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| 21 | .globl _start |
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| 22 | .globl bsp_exc_vector_base |
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| 23 | |
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| 24 | .section ".bsp_start_text", "ax" |
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| 25 | |
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[8d6ceb1] | 26 | /* Primitive NULL pointer protection */ |
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| 27 | .rept 1024 |
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| 28 | sc |
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| 29 | .endr |
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| 30 | |
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[e21c287c] | 31 | _start: |
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| 32 | /* Enable time base */ |
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| 33 | li r0, 0x4000 |
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| 34 | mtspr HID0, r0 |
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| 35 | |
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| 36 | /* Initialize start stack */ |
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| 37 | LWI r1, start_stack_end |
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| 38 | subi r1, r1, 16 |
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| 39 | li r0, 0 |
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| 40 | stw r0, 0(r1) |
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| 41 | |
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[50382788] | 42 | SET_SELF_CPU_CONTROL r3, r4 |
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[5d0fa047] | 43 | |
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[e21c287c] | 44 | /* Copy fast text */ |
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| 45 | LWI r3, bsp_section_fast_text_begin |
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| 46 | LWI r4, bsp_section_fast_text_load_begin |
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| 47 | LWI r5, bsp_section_fast_text_size |
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| 48 | bl copy |
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| 49 | |
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| 50 | /* Copy read-only data */ |
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| 51 | LWI r3, bsp_section_rodata_begin |
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| 52 | LWI r4, bsp_section_rodata_load_begin |
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| 53 | LWI r5, bsp_section_rodata_size |
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| 54 | bl copy |
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| 55 | |
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| 56 | /* Copy fast data */ |
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| 57 | LWI r3, bsp_section_fast_data_begin |
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| 58 | LWI r4, bsp_section_fast_data_load_begin |
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| 59 | LWI r5, bsp_section_fast_data_size |
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| 60 | bl copy |
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| 61 | |
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| 62 | /* Copy data */ |
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| 63 | LWI r3, bsp_section_data_begin |
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| 64 | LWI r4, bsp_section_data_load_begin |
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| 65 | LWI r5, bsp_section_data_size |
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| 66 | bl copy |
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| 67 | |
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| 68 | /* Clear SBSS */ |
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| 69 | LWI r3, bsp_section_sbss_begin |
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| 70 | LWI r4, bsp_section_sbss_size |
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| 71 | bl bsp_start_zero |
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| 72 | |
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| 73 | /* Clear BSS */ |
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| 74 | LWI r3, bsp_section_bss_begin |
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| 75 | LWI r4, bsp_section_bss_size |
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| 76 | bl bsp_start_zero |
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| 77 | |
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| 78 | /* Set up EABI and SYSV environment */ |
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| 79 | bl __eabi |
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| 80 | |
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| 81 | /* Clear command line */ |
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| 82 | li r3, 0 |
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| 83 | |
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| 84 | bl boot_card |
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| 85 | |
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| 86 | twiddle: |
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| 87 | b twiddle |
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| 88 | |
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| 89 | copy: |
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| 90 | cmpw r3, r4 |
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| 91 | beqlr |
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| 92 | b memcpy |
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| 93 | |
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| 94 | /* Exception vector prologues area */ |
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| 95 | .section ".bsp_start_text", "ax" |
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| 96 | .align 4 |
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| 97 | bsp_exc_vector_base: |
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[7078a00b] | 98 | /* Critical input */ |
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| 99 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 100 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 101 | li r3, 0 |
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| 102 | b ppc_exc_fatal_critical |
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| 103 | /* Machine check */ |
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| 104 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 105 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 106 | li r3, 1 |
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| 107 | b ppc_exc_fatal_machine_check |
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| 108 | /* Data storage */ |
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| 109 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 110 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 111 | li r3, 2 |
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| 112 | b ppc_exc_fatal_normal |
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| 113 | /* Instruction storage */ |
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| 114 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 115 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 116 | li r3, 3 |
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| 117 | b ppc_exc_fatal_normal |
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| 118 | /* External input */ |
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| 119 | PPC_REG_STORE_UPDATE r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1) |
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| 120 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 121 | li r3, 4 |
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| 122 | b ppc_exc_interrupt |
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| 123 | /* Alignment */ |
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| 124 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 125 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 126 | li r3, 5 |
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| 127 | b ppc_exc_fatal_normal |
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| 128 | /* Program */ |
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| 129 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 130 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 131 | li r3, 6 |
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| 132 | b ppc_exc_fatal_normal |
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| 133 | /* Floating-point unavailable */ |
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| 134 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 135 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 136 | li r3, 7 |
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| 137 | b ppc_exc_fatal_normal |
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| 138 | /* System call */ |
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| 139 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 140 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 141 | li r3, 8 |
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| 142 | b ppc_exc_fatal_normal |
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| 143 | /* APU unavailable */ |
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| 144 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 145 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 146 | li r3, 9 |
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| 147 | b ppc_exc_fatal_normal |
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| 148 | /* Decrementer */ |
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| 149 | PPC_REG_STORE_UPDATE r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1) |
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| 150 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 151 | li r3, 10 |
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| 152 | b ppc_exc_interrupt |
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| 153 | /* Fixed-interval timer interrupt */ |
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| 154 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 155 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 156 | li r3, 11 |
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| 157 | b ppc_exc_fatal_normal |
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| 158 | /* Watchdog timer interrupt */ |
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| 159 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 160 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 161 | li r3, 12 |
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| 162 | b ppc_exc_fatal_critical |
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| 163 | /* Data TLB error */ |
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| 164 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 165 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 166 | li r3, 13 |
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| 167 | b ppc_exc_fatal_normal |
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| 168 | /* Instruction TLB error */ |
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| 169 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 170 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 171 | li r3, 14 |
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| 172 | b ppc_exc_fatal_normal |
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| 173 | /* Debug */ |
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| 174 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 175 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 176 | li r3, 15 |
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| 177 | b ppc_exc_fatal_debug |
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| 178 | /* SPE APU unavailable or AltiVec unavailable */ |
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| 179 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 180 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 181 | li r3, 32 |
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| 182 | b ppc_exc_fatal_normal |
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| 183 | /* SPE floating-point data exception or AltiVec assist */ |
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| 184 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 185 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 186 | li r3, 33 |
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| 187 | b ppc_exc_fatal_normal |
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| 188 | /* SPE floating-point round exception */ |
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| 189 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 190 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 191 | li r3, 34 |
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| 192 | b ppc_exc_fatal_normal |
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| 193 | /* Performance monitor */ |
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| 194 | PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1) |
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| 195 | PPC_REG_STORE r3, GPR3_OFFSET(r1) |
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| 196 | li r3, 35 |
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| 197 | b ppc_exc_fatal_normal |
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[e21c287c] | 198 | |
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| 199 | /* Start stack area */ |
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| 200 | .section ".bsp_rwextra", "aw", @nobits |
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| 201 | .align 4 |
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| 202 | .space 4096 |
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| 203 | start_stack_end: |
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