1 | /* irq.h |
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2 | * |
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3 | * This include file describe the data structure and the functions implemented |
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4 | * by rtems to write interrupt handlers. |
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5 | * |
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6 | * |
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7 | * SS555 port sponsored by Defence Research and Development Canada - Suffield |
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8 | * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) |
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9 | * |
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10 | * Derived from libbsp/powerpc/mbx8xx/irq/irq.h: |
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11 | * |
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12 | * CopyRight (C) 1999 valette@crf.canon.fr |
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13 | * |
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14 | * This code is heavilly inspired by the public specification of STREAM V2 |
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15 | * that can be found at : |
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16 | * |
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17 | * <http://www.chorus.com/Documentation/index.html> by following |
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18 | * the STREAM API Specification Document link. |
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19 | * |
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20 | * The license and distribution terms for this file may be |
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21 | * found in found in the file LICENSE in this distribution or at |
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22 | * http://www.rtems.com/license/LICENSE. |
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23 | * |
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24 | * $Id$ |
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25 | */ |
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26 | |
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27 | #ifndef LIBBSP_POWERPC_SS555_IRQ_IRQ_H |
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28 | #define LIBBSP_POWERPC_SS555_IRQ_IRQ_H |
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29 | |
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30 | #include <libcpu/irq.h> |
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31 | |
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32 | #ifndef ASM |
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33 | |
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34 | #ifdef __cplusplus |
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35 | extern "C" { |
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36 | #endif |
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37 | |
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38 | /* |
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39 | * The SS555 has no external interrupt controller chip, so use the standard |
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40 | * routines from the CPU-dependent code. |
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41 | */ |
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42 | #define BSP_install_rtems_irq_handler(ptr) CPU_install_rtems_irq_handler(ptr) |
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43 | #define BSP_get_current_rtems_irq_handler(ptr) CPU_get_current_rtems_irq_handler(ptr) |
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44 | #define BSP_remove_rtems_irq_handler(ptr) CPU_remove_rtems_irq_handler(ptr) |
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45 | #define BSP_rtems_irq_mngt_set(config) CPU_rtems_irq_mngt_set(config) |
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46 | #define BSP_rtems_irq_mngt_get(config) CPU_rtems_irq_mngt_get(config) |
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47 | #define BSP_rtems_irq_mng_init(cpuId) CPU_rtems_irq_mng_init(cpuId) |
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48 | |
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49 | #ifdef __cplusplus |
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50 | } |
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51 | #endif |
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52 | |
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53 | #endif /* ASM */ |
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54 | |
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55 | #endif /* LIBBSP_POWERPC_SS555_IRQ_IRQ_H */ |
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