1 | /* bsp.h |
---|
2 | * |
---|
3 | * This include file contains all board IO definitions. |
---|
4 | * |
---|
5 | * This file includes definitions for the Intec SS555. |
---|
6 | * |
---|
7 | * |
---|
8 | * SS555 port sponsored by Defence Research and Development Canada - Suffield |
---|
9 | * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) |
---|
10 | * |
---|
11 | * Derived from c/src/lib/libbsp/powerpc/mbx8xx/include/bsp.h: |
---|
12 | * |
---|
13 | * COPYRIGHT (c) 1989-1998. |
---|
14 | * On-Line Applications Research Corporation (OAR). |
---|
15 | * |
---|
16 | * The license and distribution terms for this file may be |
---|
17 | * found in the file LICENSE in this distribution or at |
---|
18 | * http://www.rtems.com/license/LICENSE. |
---|
19 | * |
---|
20 | * $Id$ |
---|
21 | */ |
---|
22 | |
---|
23 | #ifndef __SS555_h |
---|
24 | #define __SS555_h |
---|
25 | |
---|
26 | #ifdef __cplusplus |
---|
27 | extern "C" { |
---|
28 | #endif |
---|
29 | |
---|
30 | #include <bspopts.h> |
---|
31 | |
---|
32 | #include <rtems.h> |
---|
33 | #include <console.h> |
---|
34 | #include <clockdrv.h> |
---|
35 | #include <mpc5xx.h> |
---|
36 | #include <mpc5xx/console.h> |
---|
37 | #include <libcpu/vectors.h> |
---|
38 | #include <bsp/irq.h> |
---|
39 | |
---|
40 | /* |
---|
41 | * Clock definitions |
---|
42 | */ |
---|
43 | |
---|
44 | #define BSP_CRYSTAL_HZ 4000000 /* crystal frequency, Hz */ |
---|
45 | #define BSP_CLOCK_HZ 40000000 /* CPU clock frequency, Hz |
---|
46 | |
---|
47 | /* |
---|
48 | * I/O definitions |
---|
49 | * |
---|
50 | * The SS555 board includes a CPLD to control on-board features and |
---|
51 | * off-board devices. |
---|
52 | */ |
---|
53 | typedef struct cpld_ { |
---|
54 | rtems_unsigned8 cs3a[32]; /* Chip select 3A */ |
---|
55 | rtems_unsigned8 pad0[0x200000 - 0x000020]; |
---|
56 | |
---|
57 | rtems_unsigned8 cs3b[32]; /* Chip select 3B */ |
---|
58 | rtems_unsigned8 pad2[0x400000 - 0x200020]; |
---|
59 | |
---|
60 | rtems_unsigned8 cs3c[32]; /* Chip select 3C */ |
---|
61 | rtems_unsigned8 pad4[0x600000 - 0x400020]; |
---|
62 | |
---|
63 | rtems_unsigned8 cs3d[32]; /* Chip select 3D */ |
---|
64 | rtems_unsigned8 pad6[0x800000 - 0x600020]; |
---|
65 | |
---|
66 | rtems_unsigned8 serial_ints; /* Enable/disable serial interrupts */ |
---|
67 | rtems_unsigned8 serial_resets; /* Enable/disable serial resets */ |
---|
68 | rtems_unsigned8 serial_ack; /* Acknowledge serial transfers */ |
---|
69 | rtems_unsigned8 pad8[0xA00000 - 0x800003]; |
---|
70 | |
---|
71 | rtems_unsigned8 iflash_writess; /* Enable/disable internal-flash writes */ |
---|
72 | rtems_unsigned8 nflash_writess; /* Enable/disable NAND-flash writes */ |
---|
73 | rtems_unsigned8 padA[0xC00000 - 0xA00002]; |
---|
74 | } cpld_t; |
---|
75 | |
---|
76 | extern volatile cpld_t cpld; /* defined in linkcmds */ |
---|
77 | |
---|
78 | /* |
---|
79 | * Define the time limits for RTEMS Test Suite test durations. |
---|
80 | * Long test and short test duration limits are provided. These |
---|
81 | * values are in seconds and need to be converted to ticks for the |
---|
82 | * application. |
---|
83 | * |
---|
84 | */ |
---|
85 | |
---|
86 | #define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ |
---|
87 | #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ |
---|
88 | |
---|
89 | /* |
---|
90 | * Stuff for Time Test 27 |
---|
91 | * |
---|
92 | * The following require that IRQ7 be jumpered to ground. On the SS555, |
---|
93 | * this can be done by shorting together CN5 pin 48 and CN5 pin 50. |
---|
94 | */ |
---|
95 | |
---|
96 | #define MUST_WAIT_FOR_INTERRUPT 1 |
---|
97 | |
---|
98 | #define Declarations_for_tm27 \ |
---|
99 | void tm27On() \ |
---|
100 | { \ |
---|
101 | } \ |
---|
102 | \ |
---|
103 | void tm27Off() \ |
---|
104 | { \ |
---|
105 | } \ |
---|
106 | \ |
---|
107 | int tm27IsOn() \ |
---|
108 | { \ |
---|
109 | return 1; \ |
---|
110 | } \ |
---|
111 | \ |
---|
112 | rtems_irq_connect_data tm27IrqData = { \ |
---|
113 | CPU_USIU_EXT_IRQ_7, \ |
---|
114 | (rtems_irq_hdl)0, \ |
---|
115 | (rtems_irq_enable)tm27On, \ |
---|
116 | (rtems_irq_disable)tm27Off, \ |
---|
117 | (rtems_irq_is_enabled)tm27IsOn \ |
---|
118 | }; |
---|
119 | |
---|
120 | #define Install_tm27_vector( handler ) \ |
---|
121 | { \ |
---|
122 | usiu.siel |= (1 << 17); \ |
---|
123 | usiu.sipend |= (1 << 17); \ |
---|
124 | \ |
---|
125 | tm27IrqData.hdl = (rtems_irq_hdl)handler; \ |
---|
126 | BSP_install_rtems_irq_handler (&tm27IrqData); \ |
---|
127 | } |
---|
128 | |
---|
129 | #define Cause_tm27_intr() \ |
---|
130 | { \ |
---|
131 | usiu.siel &= ~(1 << 17); \ |
---|
132 | } |
---|
133 | |
---|
134 | #define Clear_tm27_intr() \ |
---|
135 | { \ |
---|
136 | usiu.siel |= (1 << 17); \ |
---|
137 | usiu.sipend |= (1 << 17); \ |
---|
138 | } |
---|
139 | |
---|
140 | #define Lower_tm27_intr() \ |
---|
141 | { \ |
---|
142 | ppc_cached_irq_mask |= (1 << 17); \ |
---|
143 | usiu.simask = ppc_cached_irq_mask; \ |
---|
144 | } |
---|
145 | |
---|
146 | /* miscellaneous stuff assumed to exist */ |
---|
147 | |
---|
148 | extern rtems_configuration_table BSP_Configuration; |
---|
149 | |
---|
150 | /* |
---|
151 | * Device Driver Table Entries |
---|
152 | */ |
---|
153 | |
---|
154 | /* |
---|
155 | * NOTE: Use the standard Console driver entry |
---|
156 | */ |
---|
157 | |
---|
158 | /* |
---|
159 | * NOTE: Use the standard Clock driver entry |
---|
160 | */ |
---|
161 | |
---|
162 | /* |
---|
163 | * How many libio files we want |
---|
164 | */ |
---|
165 | |
---|
166 | #define BSP_LIBIO_MAX_FDS 20 |
---|
167 | |
---|
168 | /* functions */ |
---|
169 | |
---|
170 | void bsp_cleanup( void ); |
---|
171 | |
---|
172 | rtems_isr_entry set_vector( /* returns old vector */ |
---|
173 | rtems_isr_entry handler, /* isr routine */ |
---|
174 | rtems_vector_number vector, /* vector number */ |
---|
175 | int type /* RTEMS or RAW intr */ |
---|
176 | ); |
---|
177 | |
---|
178 | #ifdef __cplusplus |
---|
179 | } |
---|
180 | #endif |
---|
181 | |
---|
182 | #endif |
---|
183 | /* end of include file */ |
---|