source: rtems/c/src/lib/libbsp/powerpc/ss555/include/bsp.h @ 9cff822a

4.115
Last change on this file since 9cff822a was 9cff822a, checked in by Joel Sherrill <joel.sherrill@…>, on 07/16/15 at 15:40:05

Most bsp.h: Switch to LIBBSP_@CPU@_@BSP_FAMILY@_H for guard

This was done by the following script run from libbsp:

find * -name bsp.h | xargs -e grep -l "#ifndef.*_BSP_H" | while read b
do

echo $b
cpu=echo $b | cut -d'/' -f1 | tr '[:lower:]' '[:upper:]'
bsp=echo $b | cut -d'/' -f2 | tr '[:lower:]' '[:upper:]'
g="LIBBSP_${cpu}_${bsp}_BSP_H"
# echo $g
sed -e "s/ifndef _BSP_H/ifndef ${g}/" \

-e "s/define _BSP_H/define ${g}/" \

-i $b

done
  • Property mode set to 100644
File size: 2.2 KB
Line 
1/*
2 *  This file includes definitions for the Intec SS555.
3 */
4
5/*
6 *  SS555 port sponsored by Defence Research and Development Canada - Suffield
7 *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
8 *
9 *  Derived from c/src/lib/libbsp/powerpc/mbx8xx/include/bsp.h:
10 *
11 *  COPYRIGHT (c) 1989-1998.
12 *  On-Line Applications Research Corporation (OAR).
13 *
14 *  The license and distribution terms for this file may be
15 *  found in the file LICENSE in this distribution or at
16 *  http://www.rtems.org/license/LICENSE.
17 */
18
19#ifndef LIBBSP_POWERPC_SS555_BSP_H
20#define LIBBSP_POWERPC_SS555_BSP_H
21
22#ifndef ASM
23
24#include <bspopts.h>
25#include <bsp/default-initial-extension.h>
26
27#include <rtems.h>
28#include <rtems/console.h>
29#include <rtems/clockdrv.h>
30#include <mpc5xx.h>
31#include <mpc5xx/console.h>
32#include <libcpu/vectors.h>
33#include <bsp/irq.h>
34
35#ifdef __cplusplus
36extern "C" {
37#endif
38
39/*
40 * Clock definitions
41 */
42
43#define BSP_CRYSTAL_HZ   4000000        /* crystal frequency, Hz */
44#define BSP_CLOCK_HZ    40000000        /* CPU clock frequency, Hz
45
46/*
47 * I/O definitions
48 *
49 * The SS555 board includes a CPLD to control on-board features and
50 * off-board devices.
51 */
52typedef struct cpld_ {
53  uint8_t       cs3a[32];               /* Chip select 3A */
54  uint8_t       pad0[0x200000 - 0x000020];
55
56  uint8_t       cs3b[32];               /* Chip select 3B */
57  uint8_t       pad2[0x400000 - 0x200020];
58
59  uint8_t       cs3c[32];               /* Chip select 3C */
60  uint8_t       pad4[0x600000 - 0x400020];
61
62  uint8_t       cs3d[32];               /* Chip select 3D */
63  uint8_t       pad6[0x800000 - 0x600020];
64
65  uint8_t       serial_ints;    /* Enable/disable serial interrupts */
66  uint8_t       serial_resets;  /* Enable/disable serial resets */
67  uint8_t       serial_ack;     /* Acknowledge serial transfers */
68  uint8_t       pad8[0xA00000 - 0x800003];
69
70  uint8_t       iflash_writess; /* Enable/disable internal-flash writes */
71  uint8_t       nflash_writess; /* Enable/disable NAND-flash writes */
72  uint8_t       padA[0xC00000 - 0xA00002];
73} cpld_t;
74
75extern volatile cpld_t cpld;              /* defined in linkcmds */
76
77/* clock/p_clock.c */
78extern int BSP_disconnect_clock_handler (void);
79
80extern int BSP_connect_clock_handler (rtems_irq_hdl hdl);
81
82/*
83 *  Prototypes for methods called from .S to support dependency tracking.
84 */
85void _InitSS555(void);
86
87#ifdef __cplusplus
88}
89#endif
90
91#endif /* !ASM */
92
93#endif
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