1 | /* |
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2 | * vectors.h Exception frame related contant and API. |
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3 | * |
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4 | * This include file describe the data structure and the functions implemented |
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5 | * by rtems to handle exceptions. |
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6 | * |
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7 | * CopyRight (C) 1999 valette@crf.canon.fr |
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8 | * |
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9 | * The license and distribution terms for this file may be |
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10 | * found in found in the file LICENSE in this distribution or at |
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11 | * http://www.OARcorp.com/rtems/license.html. |
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12 | * |
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13 | * $Id$ |
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14 | */ |
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15 | #ifndef LIBBSP_POWERPC_MCP750_VECTORS_H |
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16 | #define LIBBSP_POWERPC_MCP750_VECTORS_H |
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17 | |
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18 | /* |
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19 | * The callee (high level exception code written in C) |
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20 | * will store the Link Registers (return address) at entry r1 + 4 !!!. |
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21 | * So let room for it!!!. |
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22 | */ |
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23 | #define LINK_REGISTER_CALLEE_UPDATE_ROOM 4 |
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24 | #define SRR0_FRAME_OFFSET 8 |
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25 | #define SRR1_FRAME_OFFSET 12 |
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26 | #define EXCEPTION_NUMBER_OFFSET 16 |
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27 | #define GPR0_OFFSET 20 |
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28 | #define GPR1_OFFSET 24 |
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29 | #define GPR2_OFFSET 28 |
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30 | #define GPR3_OFFSET 32 |
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31 | #define GPR4_OFFSET 36 |
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32 | #define GPR5_OFFSET 40 |
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33 | #define GPR6_OFFSET 44 |
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34 | #define GPR7_OFFSET 48 |
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35 | #define GPR8_OFFSET 52 |
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36 | #define GPR9_OFFSET 56 |
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37 | #define GPR10_OFFSET 60 |
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38 | #define GPR11_OFFSET 64 |
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39 | #define GPR12_OFFSET 68 |
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40 | #define GPR13_OFFSET 72 |
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41 | #define GPR14_OFFSET 76 |
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42 | #define GPR15_OFFSET 80 |
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43 | #define GPR16_OFFSET 84 |
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44 | #define GPR17_OFFSET 88 |
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45 | #define GPR18_OFFSET 92 |
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46 | #define GPR19_OFFSET 96 |
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47 | #define GPR20_OFFSET 100 |
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48 | #define GPR21_OFFSET 104 |
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49 | #define GPR22_OFFSET 108 |
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50 | #define GPR23_OFFSET 112 |
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51 | #define GPR24_OFFSET 116 |
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52 | #define GPR25_OFFSET 120 |
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53 | #define GPR26_OFFSET 124 |
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54 | #define GPR27_OFFSET 128 |
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55 | #define GPR28_OFFSET 132 |
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56 | #define GPR29_OFFSET 136 |
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57 | #define GPR30_OFFSET 140 |
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58 | #define GPR31_OFFSET 144 |
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59 | #define EXC_CR_OFFSET 148 |
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60 | #define EXC_CTR_OFFSET 152 |
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61 | #define EXC_XER_OFFSET 156 |
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62 | #define EXC_LR_OFFSET 160 |
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63 | #define EXC_DAR_OFFSET 164 |
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64 | /* |
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65 | * maintain the EABI requested 8 bytes aligment |
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66 | * As SVR4 ABI requires 16, make it 16 (as some |
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67 | * exception may need more registers to be processed...) |
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68 | */ |
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69 | #define EXCEPTION_FRAME_END 176 |
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70 | |
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71 | #ifndef ASM |
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72 | /* |
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73 | * default raw exception handlers |
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74 | */ |
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75 | |
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76 | extern void default_exception_vector_code_prolog(); |
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77 | extern int default_exception_vector_code_prolog_size; |
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78 | |
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79 | /* codemove is like memmove, but it also gets the cache line size |
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80 | * as 4th parameter to synchronize them. If this last parameter is |
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81 | * zero, it performs more or less like memmove. No copy is performed if |
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82 | * source and destination addresses are equal. However the caches |
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83 | * are synchronized. Note that the size is always rounded up to the |
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84 | * next mutiple of 4. |
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85 | */ |
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86 | extern void * codemove(void *, const void *, unsigned int, unsigned long); |
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87 | extern void initialize_exceptions(); |
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88 | |
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89 | typedef struct { |
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90 | unsigned EXC_SRR0; |
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91 | unsigned EXC_SRR1; |
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92 | unsigned _EXC_number; |
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93 | unsigned GPR0; |
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94 | unsigned GPR1; |
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95 | unsigned GPR2; |
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96 | unsigned GPR3; |
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97 | unsigned GPR4; |
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98 | unsigned GPR5; |
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99 | unsigned GPR6; |
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100 | unsigned GPR7; |
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101 | unsigned GPR8; |
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102 | unsigned GPR9; |
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103 | unsigned GPR10; |
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104 | unsigned GPR11; |
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105 | unsigned GPR12; |
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106 | unsigned GPR13; |
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107 | unsigned GPR14; |
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108 | unsigned GPR15; |
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109 | unsigned GPR16; |
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110 | unsigned GPR17; |
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111 | unsigned GPR18; |
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112 | unsigned GPR19; |
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113 | unsigned GPR20; |
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114 | unsigned GPR21; |
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115 | unsigned GPR22; |
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116 | unsigned GPR23; |
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117 | unsigned GPR24; |
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118 | unsigned GPR25; |
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119 | unsigned GPR26; |
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120 | unsigned GPR27; |
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121 | unsigned GPR28; |
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122 | unsigned GPR29; |
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123 | unsigned GPR30; |
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124 | unsigned GPR31; |
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125 | unsigned EXC_CR; |
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126 | unsigned EXC_CTR; |
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127 | unsigned EXC_XER; |
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128 | unsigned EXC_LR; |
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129 | unsigned EXC_MSR; |
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130 | unsigned EXC_DAR; |
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131 | }BSP_Exception_frame; |
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132 | |
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133 | |
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134 | typedef void (*exception_handler_t) (BSP_Exception_frame* excPtr); |
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135 | extern exception_handler_t globalExceptHdl; |
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136 | /* |
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137 | * Compatibility with pc386 |
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138 | */ |
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139 | typedef BSP_Exception_frame CPU_Exception_frame; |
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140 | typedef exception_handler_t cpuExcHandlerType; |
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141 | |
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142 | #endif /* ASM */ |
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143 | |
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144 | #endif /* LIBBSP_POWERPC_MCP750_VECTORS_H */ |
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