source: rtems/c/src/lib/libbsp/powerpc/shared/vectors/vectors.h @ d8ada5b

4.104.114.84.9
Last change on this file since d8ada5b was d8ada5b, checked in by Till Straumann <strauman@…>, on Dec 2, 2005 at 2:47:23 AM

2005-12-01 Till Straumann <strauman@…>

  • shared/vectors/vectors.h, shared/vectors/vectors.S, shared/vectors/vectors_init.c: Reduced size of default prologue (some exceptions, e.g., altivec unavail.) are only 0x20 bytes apart. Also introduced a modified prologue that switches r0..r3 shadowing off (r0..r3 undefined on certain 603e variants when incurring a TLB miss).
  • Property mode set to 100644
File size: 3.8 KB
Line 
1/*
2 * vectors.h Exception frame related contant and API.
3 *
4 *  This include file describe the data structure and the functions implemented
5 *  by rtems to handle exceptions.
6 *
7 *  CopyRight (C) 1999 valette@crf.canon.fr
8 *
9 *  The license and distribution terms for this file may be
10 *  found in found in the file LICENSE in this distribution or at
11 *  http://www.rtems.com/license/LICENSE.
12 *
13 *  $Id$
14 */
15#ifndef LIBBSP_POWERPC_MCP750_VECTORS_H
16#define LIBBSP_POWERPC_MCP750_VECTORS_H
17
18/*
19 * The callee (high level exception code written in C)
20 * will store the Link Registers (return address) at entry r1 + 4 !!!.
21 * So let room for it!!!.
22 */
23#define LINK_REGISTER_CALLEE_UPDATE_ROOM 4
24#define SRR0_FRAME_OFFSET 8
25#define SRR1_FRAME_OFFSET 12
26#define EXCEPTION_NUMBER_OFFSET 16
27#define GPR0_OFFSET 20
28#define GPR1_OFFSET 24
29#define GPR2_OFFSET 28
30#define GPR3_OFFSET 32
31#define GPR4_OFFSET 36
32#define GPR5_OFFSET 40
33#define GPR6_OFFSET 44
34#define GPR7_OFFSET 48
35#define GPR8_OFFSET 52
36#define GPR9_OFFSET 56
37#define GPR10_OFFSET 60
38#define GPR11_OFFSET 64
39#define GPR12_OFFSET 68
40#define GPR13_OFFSET 72
41#define GPR14_OFFSET 76
42#define GPR15_OFFSET 80
43#define GPR16_OFFSET 84
44#define GPR17_OFFSET 88
45#define GPR18_OFFSET 92
46#define GPR19_OFFSET 96
47#define GPR20_OFFSET 100
48#define GPR21_OFFSET 104
49#define GPR22_OFFSET 108
50#define GPR23_OFFSET 112
51#define GPR24_OFFSET 116
52#define GPR25_OFFSET 120
53#define GPR26_OFFSET 124
54#define GPR27_OFFSET 128
55#define GPR28_OFFSET 132
56#define GPR29_OFFSET 136
57#define GPR30_OFFSET 140
58#define GPR31_OFFSET 144
59#define EXC_CR_OFFSET 148
60#define EXC_CTR_OFFSET 152
61#define EXC_XER_OFFSET 156
62#define EXC_LR_OFFSET 160
63#define EXC_MSR_OFFSET 164
64#define EXC_DAR_OFFSET 168
65/*
66 * maintain the EABI requested 8 bytes aligment
67 * As SVR4 ABI requires 16, make it 16 (as some
68 * exception may need more registers to be processed...)
69 */
70#define    EXCEPTION_FRAME_END 176
71
72#ifndef ASM
73/*
74 * default raw exception handlers
75 */
76
77extern  void default_exception_vector_code_prolog();
78extern  void tgpr_clr_exception_vector_code_prolog();
79/* This symbol is generated by the linker; prevent it from
80 * being accessed in one of the short data areas by declaring
81 * it as an array
82 */
83extern  int  default_exception_vector_code_prolog_size[];
84extern  int  tgpr_clr_exception_vector_code_prolog_size[];
85
86/* codemove is like memmove, but it also gets the cache line size
87 * as 4th parameter to synchronize them. If this last parameter is
88 * zero, it performs more or less like memmove. No copy is performed if
89 * source and destination addresses are equal. However the caches
90 * are synchronized. Note that the size is always rounded up to the
91 * next mutiple of 4.
92 */
93extern void * codemove(void *, const void *, unsigned int, unsigned long);
94extern void initialize_exceptions();
95
96typedef struct {
97  unsigned      EXC_SRR0;
98  unsigned      EXC_SRR1;
99  unsigned      _EXC_number;
100  unsigned      GPR0;
101  unsigned      GPR1;
102  unsigned      GPR2;
103  unsigned      GPR3;
104  unsigned      GPR4;
105  unsigned      GPR5;
106  unsigned      GPR6;
107  unsigned      GPR7;
108  unsigned      GPR8;
109  unsigned      GPR9;
110  unsigned      GPR10;
111  unsigned      GPR11;
112  unsigned      GPR12;
113  unsigned      GPR13;
114  unsigned      GPR14;
115  unsigned      GPR15;
116  unsigned      GPR16;
117  unsigned      GPR17;
118  unsigned      GPR18;
119  unsigned      GPR19;
120  unsigned      GPR20;
121  unsigned      GPR21;
122  unsigned      GPR22;
123  unsigned      GPR23;
124  unsigned      GPR24;
125  unsigned      GPR25;
126  unsigned      GPR26;
127  unsigned      GPR27;
128  unsigned      GPR28;
129  unsigned      GPR29;
130  unsigned      GPR30;
131  unsigned      GPR31;
132  unsigned      EXC_CR;
133  unsigned      EXC_CTR;
134  unsigned      EXC_XER;
135  unsigned      EXC_LR;
136  unsigned      EXC_MSR;
137  unsigned      EXC_DAR;
138}BSP_Exception_frame;
139
140typedef void (*exception_handler_t) (BSP_Exception_frame* excPtr);
141extern exception_handler_t globalExceptHdl;
142/*
143 * Compatibility with pc386
144 */
145typedef BSP_Exception_frame CPU_Exception_frame;
146typedef exception_handler_t cpuExcHandlerType;
147
148#endif /* ASM */
149
150#endif /* LIBBSP_POWERPC_MCP750_VECTORS_H */
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