source: rtems/c/src/lib/libbsp/powerpc/shared/vectors/vectors.S @ d1999c8b

4.104.114.84.95
Last change on this file since d1999c8b was 7eb776a2, checked in by Till Straumann <strauman@…>, on 01/05/06 at 23:18:55
  • shared/vectors/vectors.S: mask high bits when calculating the exception vector number to yield correct result even if the vectors reside in the upper area (0xfff00000; psim).
  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*
2 * (c) 1999, Eric Valette valette@crf.canon.fr
3 *
4 *
5 *  This file contains the assembly code for the PowerPC
6 *  exception veneers for RTEMS.
7 *
8 * $Id$
9 */
10
11#include <rtems/asm.h>
12#include <rtems/score/cpu.h>
13#include <bsp/vectors.h>
14#include <libcpu/raw_exception.h>
15
16#define SYNC \
17        sync; \
18        isync
19
20        PUBLIC_VAR (__rtems_start)
21        .section .entry_point_section,"awx",@progbits
22/*
23 * Entry point information used by bootloader code
24 */
25SYM (__rtems_start):
26        .long   __rtems_entry_point
27
28        /*
29         * end of special Entry point section
30         */
31        .text
32        /* 603e shadows GPR0..GPR3 for certain exceptions. We must switch
33         * that off before we can use the stack pointer. Note that this is
34         * ONLY safe if the shadowing is actually active -- otherwise, r1
35         * is destroyed. We deliberately use r1 so problems become obvious
36         * if this is abused!
37         */
38PUBLIC_VAR(tgpr_clr_exception_vector_code_prolog)
39SYM (tgpr_clr_exception_vector_code_prolog):
40        mfmsr   r1
41        rlwinm  r1,r1,0,15,13
42        mtmsr   r1
43        isync
44        /* fall thru */
45PUBLIC_VAR(default_exception_vector_code_prolog)
46SYM (default_exception_vector_code_prolog):
47        /*
48         * let room for exception frame
49         */
50        stw     r3, GPR3_OFFSET-EXCEPTION_FRAME_END(r1)
51        mflr    r3
52        stw     r3, EXC_LR_OFFSET-EXCEPTION_FRAME_END(r1)
53        bla     push_normalized_frame
54
55        /* IMPORTANT: prologue size MUST be < 32 bytes; 'altivec unavailable' exception
56         *            is already at 0xf20 :-(
57         */
58
59        PUBLIC_VAR (default_exception_vector_code_prolog_size)
60        PUBLIC_VAR (tgpr_clr_exception_vector_code_prolog_size)
61
62        default_exception_vector_code_prolog_size = . - default_exception_vector_code_prolog
63        tgpr_clr_exception_vector_code_prolog_size= . - tgpr_clr_exception_vector_code_prolog
64
65        .p2align 5
66PUBLIC_VAR (push_normalized_frame)
67SYM (push_normalized_frame):
68        stwu    r1, - (EXCEPTION_FRAME_END)(r1)
69        mfcr    r3
70        stw     r3,  EXC_CR_OFFSET(r1)
71        /*
72         * r3 = exception vector entry point
73         * (256 * vector number) + few instructions
74         */
75        mflr    r3
76        /*
77         * r3 = r3 >> 8 = vector #
78         * mask upper bits in case vectors are in the high area (psim)
79         */
80        rlwinm  r3,r3,32-8,20,31
81        stw     r3, EXCEPTION_NUMBER_OFFSET(r1)
82        stw     r0, GPR0_OFFSET(r1)
83        /* R2 should never change (EABI: pointer to .sdata2) - we
84         * save it nevertheless..
85         */
86        stw     r2, GPR2_OFFSET(r1)
87        mfsrr0  r3
88        stw     r3, SRR0_FRAME_OFFSET(r1)
89        mfsrr1  r3
90        stw     r3, SRR1_FRAME_OFFSET(r1)
91        /*
92         * Save general purpose registers
93         * Already saved in prolog : R1, R3, LR.
94         * Saved a few line above  : R0, R2
95         *
96         * Manual says that "stmw" instruction may be slower than
97         * series of individual "stw" but who cares about performance
98         * for the DEFAULT exception handler?
99         */
100        stmw    r4, GPR4_OFFSET(r1)     /* save R4->R31 */
101
102        mfctr   r30
103        stw     r30,  EXC_CTR_OFFSET(r1)
104        mfxer   r28
105        stw     r28,  EXC_XER_OFFSET(r1)
106        mfmsr   r28
107        stw     r28,  EXC_MSR_OFFSET(r1)
108        mfdar   r28
109        stw     r28,  EXC_DAR_OFFSET(r1)
110        /*
111         * compute SP at exception entry
112         */
113        addi    r3, r1, EXCEPTION_FRAME_END
114        /*
115         * store it at the right place
116         */
117        stw     r3, GPR1_OFFSET(r1)
118        /*
119         * Enable data and instruction address translation, exception nesting
120         */
121        mfmsr   r3
122        ori     r3,r3, MSR_RI | MSR_IR | MSR_DR
123        mtmsr   r3
124        SYNC
125
126        /*
127         * Call C exception handler
128         */
129        /*
130         * store the execption frame address in r3 (first param)
131         */
132        addi    r3, r1, 0x8
133        /* clear CR[6] to make sure no varargs fn callee assumes there are FP args passed */
134        crxor   6,6,6
135        /*
136         * globalExceptHdl(r3)
137         */
138        addis   r4, 0, globalExceptHdl@ha
139        lwz     r5, globalExceptHdl@l(r4)
140        mtlr    r5
141        blrl
142        /*
143         * Restore registers status
144         */
145        lwz     r31,  EXC_CR_OFFSET(r1)
146        mtcr    r31
147        lwz     r30,  EXC_CTR_OFFSET(r1)
148        mtctr   r30
149        lwz     r29,  EXC_LR_OFFSET(r1)
150        mtlr    r29
151        lwz     r28,  EXC_XER_OFFSET(r1)
152        mtxer   r28
153
154        lmw     r4, GPR4_OFFSET(r1)
155        lwz     r2, GPR2_OFFSET(r1)
156        lwz     r0, GPR0_OFFSET(r1)
157
158        /*
159         * Disable data and instruction translation. Make path non recoverable...
160         */
161        mfmsr   r3
162        xori    r3, r3, MSR_RI | MSR_IR | MSR_DR
163        mtmsr   r3
164        SYNC
165        /*
166         * Restore rfi related settings
167         */
168
169        lwz     r3, SRR1_FRAME_OFFSET(r1)
170        mtsrr1  r3
171        lwz     r3, SRR0_FRAME_OFFSET(r1)
172        mtsrr0  r3
173
174        lwz     r3, GPR3_OFFSET(r1)
175        /* DONT add back the frame size but reload the value
176         * stored in the frame -- maybe the exception handler
177         * changed it with good reason (e.g., gdb pushed a dummy frame)
178         */
179        lwz r1, GPR1_OFFSET(r1)
180        SYNC
181        rfi
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