[ea29ba6] | 1 | /* $Id$ */ |
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| 2 | |
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| 3 | #include <rtems.h> |
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| 4 | #include <libcpu/mmu.h> |
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| 5 | #include <libcpu/page.h> |
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| 6 | #include <rtems/bspIo.h> |
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| 7 | #include <libcpu/pte121.h> |
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| 8 | |
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| 9 | /* Default setup of the page tables. This is a weak |
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| 10 | * alias, so applications may easily override this |
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| 11 | * default setup. |
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| 12 | * |
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| 13 | * NOTE: while it is possible to change the individual |
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| 14 | * mappings, the page table itself MUST be |
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| 15 | * allocated at the top of the physical memory! |
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| 16 | * bspstart.c RELIES on this. |
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| 17 | * Also, the 'setup' routine must reduce |
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| 18 | * *pmemsize by the size of the page table. |
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| 19 | */ |
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| 20 | |
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| 21 | /* Author: Till Straumann, <strauman@slac.stanford.edu>, 4/2002 */ |
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| 22 | |
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| 23 | Triv121PgTbl |
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| 24 | BSP_pgtbl_setup(unsigned long) __attribute__ (( weak, alias("__BSP_default_pgtbl_setup") )); |
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| 25 | |
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| 26 | Triv121PgTbl |
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| 27 | __BSP_default_pgtbl_setup(unsigned int *pmemsize) |
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| 28 | { |
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| 29 | Triv121PgTbl pt; |
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| 30 | unsigned ldPtSize,tmp; |
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| 31 | |
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| 32 | /* Allocate a page table large enough to map |
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| 33 | * the entire physical memory. We put the page |
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| 34 | * table at the top of the physical memory. |
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| 35 | */ |
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| 36 | |
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| 37 | /* get minimal size (log base 2) of PT for |
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| 38 | * this board's memory |
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| 39 | */ |
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| 40 | ldPtSize = triv121PgTblLdMinSize(*pmemsize); |
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| 41 | ldPtSize++; /* double this amount -- then why? */ |
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| 42 | |
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| 43 | /* allocate the page table at the top of the physical |
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| 44 | * memory - THIS IS NOT AN OPTION - bspstart.c RELIES |
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| 45 | * ON THIS LAYOUT! (the size, however may be changed) |
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| 46 | */ |
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| 47 | if ( (pt = triv121PgTblInit(*pmemsize - (1<<ldPtSize), ldPtSize)) ) { |
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| 48 | /* get those from the linker script. |
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| 49 | * NOTE THAT THE CORRECTNESS OF THE LINKER SCRIPT IS CRUCIAL |
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| 50 | */ |
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[64f8ae4] | 51 | extern unsigned long __DATA_START__[], _etext[]; |
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[ea29ba6] | 52 | |
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| 53 | /* map text and RO data read-only */ |
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| 54 | tmp = triv121PgTblMap( |
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| 55 | pt, |
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| 56 | TRIV121_121_VSID, |
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| 57 | 0, |
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[64f8ae4] | 58 | (PAGE_ALIGN((unsigned long)_etext) - 0) >> PG_SHIFT, |
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[ea29ba6] | 59 | 0, /* WIMG */ |
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| 60 | TRIV121_PP_RO_PAGE); |
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| 61 | if (TRIV121_MAP_SUCCESS != tmp) { |
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[6128a4a] | 62 | printk("Unable to map page index %i; reverting to BAT0\n", |
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[ea29ba6] | 63 | tmp); |
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| 64 | pt = 0; |
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| 65 | } else { |
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| 66 | /* map the rest (without the page table itself) RW */ |
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| 67 | tmp = triv121PgTblMap( |
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| 68 | pt, |
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| 69 | TRIV121_121_VSID, |
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[64f8ae4] | 70 | (unsigned long)__DATA_START__, |
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| 71 | (*pmemsize - (1<<ldPtSize) - (unsigned long)__DATA_START__ )>> PG_SHIFT, |
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[ea29ba6] | 72 | 0, /* WIMG */ |
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| 73 | TRIV121_PP_RW_PAGE); |
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| 74 | if (TRIV121_MAP_SUCCESS != tmp) { |
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[6128a4a] | 75 | printk("Unable to map page index %i; reverting to BAT0\n", |
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[ea29ba6] | 76 | tmp); |
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| 77 | pt = 0; |
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| 78 | } |
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| 79 | } |
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| 80 | } else { |
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| 81 | printk("WARNING: unable to allocate page table, keeping DBAT0\n"); |
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| 82 | } |
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| 83 | if (pt) { |
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| 84 | #ifdef SHOW_MORE_INIT_SETTINGS |
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| 85 | printk("Setting up page table mappings; protecting text/read-only data from write access\n"); |
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| 86 | #endif |
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| 87 | /* SUCCESS; reduce available memory by size of the page table */ |
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| 88 | *pmemsize -= (1<<ldPtSize); |
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| 89 | } |
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| 90 | return pt; |
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| 91 | } |
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