1 | /* |
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2 | * This routine starts the application. It includes application, |
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3 | * board, and monitor specific initialization and configuration. |
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4 | * The generic CPU dependent initialization has been performed |
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5 | * before this routine is invoked. |
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6 | * |
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7 | * COPYRIGHT (c) 1989-1998. |
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8 | * On-Line Applications Research Corporation (OAR). |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.com/license/LICENSE. |
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13 | * |
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14 | * Modified to support the MCP750. |
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15 | * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr |
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16 | * |
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17 | * $Id$ |
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18 | */ |
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19 | |
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20 | #include <string.h> |
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21 | |
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22 | #include <rtems/libio.h> |
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23 | #include <rtems/libcsupport.h> |
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24 | #include <bsp/consoleIo.h> |
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25 | #include <libcpu/spr.h> |
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26 | #include <bsp/residual.h> |
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27 | #include <bsp/pci.h> |
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28 | #include <bsp/openpic.h> |
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29 | #include <bsp/irq.h> |
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30 | #include <bsp/VME.h> |
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31 | #include <bsp.h> |
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32 | #include <libcpu/bat.h> |
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33 | #include <libcpu/pte121.h> |
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34 | #include <libcpu/cpuIdent.h> |
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35 | #include <bsp/vectors.h> |
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36 | #include <bsp/motorola.h> |
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37 | |
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38 | extern void _return_to_ppcbug(); |
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39 | extern unsigned long __rtems_end[]; |
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40 | extern void L1_caches_enables(); |
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41 | extern unsigned get_L2CR(); |
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42 | extern void set_L2CR(unsigned); |
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43 | extern void bsp_cleanup(void); |
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44 | extern Triv121PgTbl BSP_pgtbl_setup(); |
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45 | extern void BSP_pgtbl_activate(); |
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46 | extern void BSP_vme_config(); |
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47 | |
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48 | SPR_RW(SPRG0) |
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49 | SPR_RW(SPRG1) |
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50 | |
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51 | /* |
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52 | * Copy of residuals passed by firmware |
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53 | */ |
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54 | RESIDUAL residualCopy; |
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55 | /* |
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56 | * Copy Additional boot param passed by boot loader |
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57 | */ |
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58 | #define MAX_LOADER_ADD_PARM 80 |
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59 | char loaderParam[MAX_LOADER_ADD_PARM]; |
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60 | /* |
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61 | * Vital Board data Start using DATA RESIDUAL |
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62 | */ |
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63 | /* |
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64 | * Total memory using RESIDUAL DATA |
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65 | */ |
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66 | unsigned int BSP_mem_size; |
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67 | /* |
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68 | * PCI Bus Frequency |
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69 | */ |
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70 | unsigned int BSP_bus_frequency; |
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71 | /* |
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72 | * processor clock frequency |
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73 | */ |
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74 | unsigned int BSP_processor_frequency; |
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75 | /* |
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76 | * Time base divisior (how many tick for 1 second). |
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77 | */ |
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78 | unsigned int BSP_time_base_divisor; |
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79 | /* |
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80 | * system init stack and soft ir stack size |
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81 | */ |
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82 | #define INIT_STACK_SIZE 0x1000 |
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83 | #define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY |
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84 | |
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85 | void BSP_panic(char *s) |
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86 | { |
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87 | printk("%s PANIC %s\n",_RTEMS_version, s); |
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88 | __asm__ __volatile ("sc"); |
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89 | } |
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90 | |
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91 | void _BSP_Fatal_error(unsigned int v) |
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92 | { |
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93 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
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94 | __asm__ __volatile ("sc"); |
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95 | } |
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96 | |
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97 | /* |
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98 | * The original table from the application and our copy of it with |
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99 | * some changes. |
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100 | */ |
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101 | |
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102 | extern rtems_configuration_table Configuration; |
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103 | |
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104 | rtems_configuration_table BSP_Configuration; |
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105 | |
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106 | rtems_cpu_table Cpu_table; |
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107 | |
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108 | char *rtems_progname; |
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109 | |
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110 | /* |
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111 | * Use the shared implementations of the following routines |
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112 | */ |
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113 | |
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114 | void bsp_postdriver_hook(void); |
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115 | void bsp_libc_init( void *, uint32_t, int ); |
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116 | |
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117 | /* |
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118 | * Function: bsp_pretasking_hook |
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119 | * Created: 95/03/10 |
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120 | * |
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121 | * Description: |
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122 | * BSP pretasking hook. Called just before drivers are initialized. |
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123 | * Used to setup libc and install any BSP extensions. |
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124 | * |
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125 | * NOTES: |
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126 | * Must not use libc (to do io) from here, since drivers are |
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127 | * not yet initialized. |
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128 | * |
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129 | */ |
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130 | |
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131 | void bsp_pretasking_hook(void) |
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132 | { |
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133 | uint32_t heap_start; |
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134 | uint32_t heap_size; |
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135 | uint32_t heap_sbrk_spared; |
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136 | extern uint32_t _bsp_sbrk_init(uint32_t, uint32_t*); |
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137 | |
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138 | heap_start = ((uint32_t) __rtems_end) +INIT_STACK_SIZE + INTR_STACK_SIZE; |
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139 | if (heap_start & (CPU_ALIGNMENT-1)) |
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140 | heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); |
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141 | |
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142 | heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size; |
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143 | |
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144 | heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size); |
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145 | |
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146 | #ifdef SHOW_MORE_INIT_SETTINGS |
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147 | printk(" HEAP start %x size %x (%x bytes spared for sbrk)\n", heap_start, heap_size, heap_sbrk_spared); |
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148 | #endif |
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149 | |
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150 | bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared); |
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151 | |
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152 | #ifdef RTEMS_DEBUG |
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153 | rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); |
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154 | #endif |
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155 | } |
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156 | |
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157 | void zero_bss() |
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158 | { |
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159 | /* prevent these from being accessed in the short data areas */ |
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160 | extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[]; |
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161 | extern unsigned long __SBSS2_START__[], __SBSS2_END__[]; |
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162 | memset(__SBSS_START__, 0, ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__)); |
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163 | memset(__SBSS2_START__, 0, ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__)); |
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164 | memset(__bss_start, 0, ((unsigned) __rtems_end) - ((unsigned)__bss_start)); |
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165 | } |
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166 | |
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167 | void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options) |
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168 | { |
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169 | |
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170 | residualCopy = *r3; |
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171 | strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM); |
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172 | loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0'; |
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173 | } |
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174 | |
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175 | /* |
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176 | * bsp_start |
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177 | * |
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178 | * This routine does the bulk of the system initialization. |
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179 | */ |
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180 | |
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181 | void bsp_start( void ) |
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182 | { |
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183 | int err; |
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184 | unsigned char *stack; |
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185 | unsigned l2cr; |
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186 | register unsigned char* intrStack; |
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187 | unsigned char *work_space_start; |
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188 | ppc_cpu_id_t myCpu; |
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189 | ppc_cpu_revision_t myCpuRevision; |
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190 | prep_t boardManufacturer; |
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191 | motorolaBoard myBoard; |
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192 | Triv121PgTbl pt=0; |
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193 | /* |
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194 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function |
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195 | * store the result in global variables so that it can be used latter... |
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196 | */ |
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197 | myCpu = get_ppc_cpu_type(); |
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198 | myCpuRevision = get_ppc_cpu_revision(); |
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199 | /* |
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200 | * enables L1 Cache. Note that the L1_caches_enables() codes checks for |
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201 | * relevant CPU type so that the reason why there is no use of myCpu... |
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202 | */ |
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203 | L1_caches_enables(); |
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204 | /* |
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205 | * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for |
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206 | * relevant CPU type (mpc750)... |
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207 | */ |
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208 | l2cr = get_L2CR(); |
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209 | #ifdef SHOW_LCR2_REGISTER |
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210 | printk("Initial L2CR value = %x\n", l2cr); |
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211 | #endif |
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212 | if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1)) |
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213 | set_L2CR(0xb9A14000); |
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214 | /* |
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215 | * the initial stack has aready been set to this value in start.S |
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216 | * so there is no need to set it in r1 again... It is just for info |
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217 | * so that It can be printed without accessing R1. |
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218 | */ |
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219 | stack = ((unsigned char*) __rtems_end) + INIT_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE; |
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220 | |
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221 | /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ |
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222 | *((uint32_t*)stack) = 0; |
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223 | |
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224 | /* |
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225 | * Initialize the interrupt related settings |
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226 | * SPRG1 = software managed IRQ stack |
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227 | * |
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228 | * This could be done latter (e.g in IRQ_INIT) but it helps to understand |
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229 | * some settings below... |
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230 | */ |
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231 | intrStack = ((unsigned char*) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE; |
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232 | |
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233 | /* make sure it's properly aligned */ |
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234 | (uint32_t)intrStack &= ~(CPU_STACK_ALIGNMENT-1); |
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235 | |
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236 | /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ |
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237 | *((uint32_t*)intrStack) = 0; |
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238 | |
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239 | _write_SPRG1((unsigned int)intrStack); |
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240 | |
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241 | /* signal them that we have fixed PR288 - eventually, this should go away */ |
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242 | _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); |
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243 | |
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244 | /* |
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245 | * Initialize default raw exception hanlders. See vectors/vectors_init.c |
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246 | */ |
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247 | initialize_exceptions(); |
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248 | /* |
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249 | * Init MMU block address translation to enable hardware |
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250 | * access |
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251 | */ |
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252 | /* |
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253 | * PC legacy IO space used for inb/outb and all PC |
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254 | * compatible hardware |
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255 | */ |
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256 | setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE); |
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257 | /* |
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258 | * PCI devices memory area. Needed to access OPENPIC features |
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259 | * provided by the RAVEN |
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260 | */ |
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261 | /* T. Straumann: give more PCI address space */ |
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262 | setdbat(2, PCI_MEM_BASE, PCI_MEM_BASE, 0x10000000, IO_PAGE); |
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263 | /* |
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264 | * Must have acces to open pic PCI ACK registers |
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265 | * provided by the RAVEN |
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266 | * |
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267 | */ |
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268 | setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE); |
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269 | |
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270 | select_console(CONSOLE_LOG); |
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271 | |
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272 | /* We check that the keyboard is present and immediately |
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273 | * select the serial console if not. |
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274 | */ |
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275 | err = kbdreset(); |
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276 | if (err) select_console(CONSOLE_SERIAL); |
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277 | |
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278 | boardManufacturer = checkPrepBoardType(&residualCopy); |
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279 | if (boardManufacturer != PREP_Motorola) { |
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280 | printk("Unsupported hardware vendor\n"); |
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281 | while (1); |
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282 | } |
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283 | myBoard = getMotorolaBoard(); |
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284 | |
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285 | printk("-----------------------------------------\n"); |
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286 | printk("Welcome to %s on %s\n", _RTEMS_version, motorolaBoardToString(myBoard)); |
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287 | printk("-----------------------------------------\n"); |
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288 | #ifdef SHOW_MORE_INIT_SETTINGS |
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289 | printk("Residuals are located at %x\n", (unsigned) &residualCopy); |
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290 | printk("Additionnal boot options are %s\n", loaderParam); |
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291 | printk("Initial system stack at %x\n",stack); |
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292 | printk("Software IRQ stack at %x\n",intrStack); |
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293 | printk("-----------------------------------------\n"); |
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294 | #endif |
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295 | |
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296 | #ifdef TEST_RETURN_TO_PPCBUG |
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297 | printk("Hit <Enter> to return to PPCBUG monitor\n"); |
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298 | printk("When Finished hit GO. It should print <Back from monitor>\n"); |
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299 | debug_getc(); |
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300 | _return_to_ppcbug(); |
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301 | printk("Back from monitor\n"); |
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302 | _return_to_ppcbug(); |
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303 | #endif /* TEST_RETURN_TO_PPCBUG */ |
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304 | |
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305 | #ifdef SHOW_MORE_INIT_SETTINGS |
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306 | printk("Going to start PCI buses scanning and initialization\n"); |
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307 | #endif |
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308 | InitializePCI(); |
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309 | |
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310 | { |
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311 | const struct _int_map *bspmap = motorolaIntMap(currentBoard); |
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312 | if( bspmap ) |
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313 | { |
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314 | printk("pci : Configuring interrupt routing for '%s'\n", motorolaBoardToString(currentBoard)); |
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315 | FixupPCI(bspmap, motorolaIntSwizzle(currentBoard) ); |
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316 | } |
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317 | else |
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318 | printk("pci : Interrupt routing not available for this bsp\n"); |
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319 | } |
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320 | |
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321 | #ifdef SHOW_MORE_INIT_SETTINGS |
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322 | printk("Number of PCI buses found is : %d\n", BusCountPCI()); |
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323 | #endif |
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324 | #ifdef TEST_RAW_EXCEPTION_CODE |
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325 | printk("Testing exception handling Part 1\n"); |
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326 | /* |
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327 | * Cause a software exception |
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328 | */ |
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329 | __asm__ __volatile ("sc"); |
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330 | /* |
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331 | * Check we can still catch exceptions and returned coorectly. |
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332 | */ |
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333 | printk("Testing exception handling Part 2\n"); |
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334 | __asm__ __volatile ("sc"); |
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335 | #endif |
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336 | |
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337 | BSP_mem_size = residualCopy.TotalMemory; |
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338 | BSP_bus_frequency = residualCopy.VitalProductData.ProcessorBusHz; |
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339 | BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz; |
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340 | BSP_time_base_divisor = (residualCopy.VitalProductData.TimeBaseDivisor? |
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341 | residualCopy.VitalProductData.TimeBaseDivisor : 4000); |
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342 | |
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343 | /* clear hostbridge errors but leave MCP disabled - |
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344 | * PCI config space scanning code will trip otherwise :-( |
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345 | */ |
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346 | _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/); |
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347 | |
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348 | /* Allocate and set up the page table mappings |
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349 | * This is only available on >604 CPUs. |
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350 | * |
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351 | * NOTE: This setup routine may modify the available memory |
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352 | * size. It is essential to call it before |
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353 | * calculating the workspace etc. |
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354 | */ |
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355 | pt = BSP_pgtbl_setup(&BSP_mem_size); |
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356 | |
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357 | if (!pt || |
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358 | TRIV121_MAP_SUCCESS != triv121PgTblMap( |
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359 | pt, |
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360 | TRIV121_121_VSID, |
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361 | 0xfeff0000, |
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362 | 1, |
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363 | TRIV121_ATTR_IO_PAGE, |
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364 | TRIV121_PP_RW_PAGE |
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365 | )) { |
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366 | printk("WARNING: unable to setup page tables VME bridge must share PCI space\n"); |
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367 | } |
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368 | |
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369 | /* |
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370 | * Set up our hooks |
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371 | * Make sure libc_init is done before drivers initialized so that |
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372 | * they can use atexit() |
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373 | */ |
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374 | |
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375 | Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ |
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376 | Cpu_table.postdriver_hook = bsp_postdriver_hook; |
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377 | Cpu_table.do_zero_of_workspace = TRUE; |
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378 | Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; |
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379 | Cpu_table.clicks_per_usec = BSP_processor_frequency/(BSP_time_base_divisor * 1000); |
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380 | Cpu_table.exceptions_in_RAM = TRUE; |
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381 | |
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382 | #ifdef SHOW_MORE_INIT_SETTINGS |
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383 | printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size); |
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384 | #endif |
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385 | work_space_start = |
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386 | (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size; |
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387 | |
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388 | if ( work_space_start <= ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) { |
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389 | printk( "bspstart: Not enough RAM!!!\n" ); |
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390 | bsp_cleanup(); |
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391 | } |
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392 | |
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393 | BSP_Configuration.work_space_start = work_space_start; |
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394 | |
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395 | /* |
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396 | * Initalize RTEMS IRQ system |
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397 | */ |
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398 | BSP_rtems_irq_mng_init(0); |
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399 | |
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400 | /* Activate the page table mappings only after |
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401 | * initializing interrupts because the irq_mng_init() |
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402 | * routine needs to modify the text |
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403 | */ |
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404 | if (pt) { |
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405 | #ifdef SHOW_MORE_INIT_SETTINGS |
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406 | printk("Page table setup finished; will activate it NOW...\n"); |
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407 | #endif |
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408 | BSP_pgtbl_activate(pt); |
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409 | /* finally, switch off DBAT3 */ |
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410 | setdbat(3, 0, 0, 0, 0); |
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411 | } |
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412 | |
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413 | /* |
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414 | * Initialize VME bridge - needs working PCI |
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415 | * and IRQ subsystems... |
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416 | */ |
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417 | #ifdef SHOW_MORE_INIT_SETTINGS |
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418 | printk("Going to initialize VME bridge\n"); |
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419 | #endif |
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420 | /* VME initialization is in a separate file so apps which don't use |
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421 | * VME or want a different configuration may link against a customized |
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422 | * routine. |
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423 | */ |
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424 | BSP_vme_config(); |
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425 | |
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426 | #ifdef SHOW_MORE_INIT_SETTINGS |
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427 | printk("Exit from bspstart\n"); |
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428 | #endif |
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429 | } |
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