source: rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c @ ab900436

4.104.114.84.95
Last change on this file since ab900436 was ab900436, checked in by Joel Sherrill <joel.sherrill@…>, on Jan 4, 2005 at 11:29:40 PM

2005-01-04 Joel Sherrill <joel@…>

  • ChangeLog?, startup/bspstart.c, tod/todcfg.c: Remove warnings.
  • Property mode set to 100644
File size: 14.9 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-1998.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  $Id$
18 */
19
20#include <string.h>
21
22#include <bsp.h>
23#include <rtems/libio.h>
24#include <rtems/libcsupport.h>
25#include <bsp/consoleIo.h>
26#include <libcpu/spr.h>
27#include <bsp/residual.h>
28#include <bsp/pci.h>
29#include <bsp/openpic.h>
30#include <bsp/irq.h>
31#include <bsp/VME.h>
32#include <libcpu/bat.h>
33#include <libcpu/pte121.h>
34#include <libcpu/cpuIdent.h>
35#include <bsp/vectors.h>
36#include <bsp/motorola.h>
37
38extern void _return_to_ppcbug();
39extern unsigned long __rtems_end[];
40extern void L1_caches_enables();
41extern unsigned get_L2CR();
42extern void set_L2CR(unsigned);
43extern void bsp_cleanup(void);
44extern Triv121PgTbl BSP_pgtbl_setup();
45extern void                     BSP_pgtbl_activate();
46extern void                     BSP_vme_config();
47
48SPR_RW(SPRG0)
49SPR_RW(SPRG1)
50
51#if defined(DEBUG_BATS)
52void printBAT( int bat, unsigned32 upper, unsigned32 lower )
53{
54  unsigned32 lowest_addr;
55  unsigned32 size;
56
57  printk("BAT%d raw(upper=0x%08x, lower=0x%08x) ", bat, upper, lower );
58
59  lowest_addr = (upper & 0xFFFE0000);
60  size = (((upper & 0x00001FFC) >> 2) + 1) * (128 * 1024);
61  printk(" range(0x%08x, 0x%08x) %s%s %s%s%s%s %s\n",
62    lowest_addr,
63    lowest_addr + (size - 1),
64    (upper & 0x01) ? "P" : "p",
65    (upper & 0x02) ? "S" : "s",
66    (lower & 0x08) ? "G" : "g",
67    (lower & 0x10) ? "M" : "m",
68    (lower & 0x20) ? "I" : "i",
69    (lower & 0x40) ? "W" : "w",
70    (lower & 0x01) ? "Read Only" :
71      ((lower & 0x02) ? "Read/Write" : "No Access")
72  );
73}
74
75void ShowBATS(){
76  unsigned32 lower;
77  unsigned32 upper;
78
79  __MFSPR(536, upper); __MFSPR(537, lower); printBAT( 0, upper, lower );
80  __MFSPR(538, upper); __MFSPR(539, lower); printBAT( 1, upper, lower );
81  __MFSPR(540, upper); __MFSPR(541, lower); printBAT( 2, upper, lower );
82  __MFSPR(542, upper); __MFSPR(543, lower); printBAT( 3, upper, lower );
83}
84#endif
85
86/*
87 * Copy of residuals passed by firmware
88 */
89RESIDUAL residualCopy;
90/*
91 * Copy Additional boot param passed by boot loader
92 */
93#define MAX_LOADER_ADD_PARM 80
94char loaderParam[MAX_LOADER_ADD_PARM];
95/*
96 * Vital Board data Start using DATA RESIDUAL
97 */
98/*
99 * Total memory using RESIDUAL DATA
100 */
101unsigned int BSP_mem_size;
102/*
103 * PCI Bus Frequency
104 */
105unsigned int BSP_bus_frequency;
106/*
107 * processor clock frequency
108 */
109unsigned int BSP_processor_frequency;
110/*
111 * Time base divisior (how many tick for 1 second).
112 */
113unsigned int BSP_time_base_divisor;
114/*
115 * system init stack and soft ir stack size
116 */
117#define INIT_STACK_SIZE 0x1000
118#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
119
120void BSP_panic(char *s)
121{
122  printk("%s PANIC %s\n",_RTEMS_version, s);
123  __asm__ __volatile ("sc");
124}
125
126void _BSP_Fatal_error(unsigned int v)
127{
128  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
129  __asm__ __volatile ("sc");
130}
131
132/*
133 *  The original table from the application and our copy of it with
134 *  some changes.
135 */
136
137extern rtems_configuration_table Configuration;
138
139rtems_configuration_table  BSP_Configuration;
140
141rtems_cpu_table Cpu_table;
142
143char *rtems_progname;
144
145/*
146 *  Use the shared implementations of the following routines
147 */
148
149void bsp_postdriver_hook(void);
150void bsp_libc_init( void *, uint32_t, int );
151
152/*
153 *  Function:   bsp_pretasking_hook
154 *  Created:    95/03/10
155 *
156 *  Description:
157 *      BSP pretasking hook.  Called just before drivers are initialized.
158 *      Used to setup libc and install any BSP extensions.
159 *
160 *  NOTES:
161 *      Must not use libc (to do io) from here, since drivers are
162 *      not yet initialized.
163 *
164 */
165
166void bsp_pretasking_hook(void)
167{
168  rtems_unsigned32        heap_start;   
169  rtems_unsigned32        heap_size;
170  rtems_unsigned32        heap_sbrk_spared;
171  extern rtems_unsigned32 _bsp_sbrk_init(rtems_unsigned32, rtems_unsigned32*);
172
173  heap_start = ((rtems_unsigned32) __rtems_end) +
174                INIT_STACK_SIZE + INTR_STACK_SIZE;
175  if (heap_start & (CPU_ALIGNMENT-1))
176      heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
177
178  heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
179  heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size);
180
181#ifdef SHOW_MORE_INIT_SETTINGS
182  printk( "HEAP start %x  size %x (%x bytes spared for sbrk)\n",
183             heap_start, heap_size, heap_sbrk_spared);
184#endif   
185
186  bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared);
187
188#ifdef RTEMS_DEBUG
189  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
190#endif
191}
192
193void zero_bss()
194{
195  /* prevent these from being accessed in the short data areas */
196  extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
197  extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
198  memset(__SBSS_START__, 0, ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__));
199  memset(__SBSS2_START__, 0, ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__));
200  memset(__bss_start, 0, ((unsigned) __rtems_end) - ((unsigned)__bss_start));
201}
202
203void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options)
204{
205
206  residualCopy = *r3;
207  strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM);
208  loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0';
209}
210
211#if defined(mpc8240) || defined(mpc8245)
212unsigned int EUMBBAR;
213
214/*
215 * Return the current value of the Embedded Utilities Memory Block Base Address
216 * Register (EUMBBAR) as read from the processor configuration register using
217 * Processor Address Map B (CHRP).
218 */ 
219unsigned int get_eumbbar() {
220  register int a, e;
221
222  asm volatile( "lis %0,0xfec0; ori  %0,%0,0x0000": "=r" (a) );
223  asm volatile("sync");
224                                                               
225  asm volatile("lis %0,0x8000; ori %0,%0,0x0078": "=r"(e) ); 
226  asm volatile("stwbrx  %0,0x0,%1": "=r"(e): "r"(a)); 
227  asm volatile("sync");
228
229  asm volatile("lis %0,0xfee0; ori %0,%0,0x0000": "=r" (a) ); 
230  asm volatile("sync");
231                                                         
232  asm volatile("lwbrx %0,0x0,%1": "=r" (e): "r" (a));
233  asm volatile("isync");
234  return e;
235}
236#endif
237
238/*
239 *  bsp_start
240 *
241 *  This routine does the bulk of the system initialization.
242 */
243
244void bsp_start( void )
245{
246  unsigned char *stack;
247#if !defined(mpc8240) && !defined(mpc8245)
248  unsigned l2cr;
249#endif
250  register uint32_t  intrStack;
251  register uint32_t *intrStackPtr;
252  unsigned char *work_space_start;
253  ppc_cpu_id_t myCpu;
254  ppc_cpu_revision_t myCpuRevision;
255  prep_t boardManufacturer;
256  motorolaBoard myBoard;
257  Triv121PgTbl  pt=0;
258
259  /*
260   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
261   * function store the result in global variables so that it can be used
262   * later...
263   */
264  myCpu         = get_ppc_cpu_type();
265  myCpuRevision = get_ppc_cpu_revision();
266
267#if defined(mvme2100)
268  EUMBBAR = get_eumbbar(); 
269
270  Cpu_table.exceptions_in_RAM    = TRUE;
271  { unsigned v = 0x3000 ; _CPU_MSR_SET(v); }
272#endif
273
274#if !defined(mpc8240) && !defined(mpc8245)
275  /*
276   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
277   * relevant CPU type so that the reason why there is no use of myCpu...
278   */
279  L1_caches_enables();
280
281  /*
282   * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
283   * relevant CPU type (mpc750)...
284   */
285  l2cr = get_L2CR();
286#ifdef SHOW_LCR2_REGISTER
287  printk("Initial L2CR value = %x\n", l2cr);
288#endif
289  if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1))
290    set_L2CR(0xb9A14000);
291#endif
292
293  /*
294   * the initial stack  has aready been set to this value in start.S
295   * so there is no need to set it in r1 again... It is just for info
296   * so that It can be printed without accessing R1.
297   */
298  stack = ((unsigned char*) __rtems_end) +
299               INIT_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
300
301  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
302  *((uint32_t*)stack) = 0;
303
304  /*
305   * Initialize the interrupt related settings
306   * SPRG1 = software managed IRQ stack
307   *
308   * This could be done later (e.g in IRQ_INIT) but it helps to understand
309   * some settings below...
310   */
311  intrStack = ((uint32_t) __rtems_end) + 
312          INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
313
314  /* make sure it's properly aligned */
315  intrStack &= ~(CPU_STACK_ALIGNMENT-1);
316
317  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
318  intrStackPtr = (uint32_t*) intrStack;
319  *intrStackPtr = 0;
320
321  _write_SPRG1(intrStack);
322
323  /* signal them that we have fixed PR288 - eventually, this should go away */
324  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
325
326  /*
327   * Initialize default raw exception handlers. See vectors/vectors_init.c
328   */
329  initialize_exceptions();
330
331  /*
332   * Init MMU block address translation to enable hardware access
333   */
334
335#if !defined(mvme2100)
336  /*
337   * PC legacy IO space used for inb/outb and all PC compatible hardware
338   */
339  setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE);
340#endif
341
342  /*
343   * PCI devices memory area. Needed to access OpenPIC features
344   * provided by the Raven
345   *
346   * T. Straumann: give more PCI address space
347   */
348  setdbat(2, PCI_MEM_BASE, PCI_MEM_BASE, 0x10000000, IO_PAGE);
349
350  /*
351   * Must have acces to open pic PCI ACK registers provided by the RAVEN
352   */
353  setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
354
355  select_console(CONSOLE_LOG);
356
357  /*
358   * We check that the keyboard is present and immediately
359   * select the serial console if not.
360   */
361#if defined(BSP_KBD_IOBASE)
362  { int err;
363    err = kbdreset();
364    if (err) select_console(CONSOLE_SERIAL);
365  }
366#else
367  select_console(CONSOLE_SERIAL);
368#endif
369
370  boardManufacturer   =  checkPrepBoardType(&residualCopy);
371  if (boardManufacturer != PREP_Motorola) {
372    printk("Unsupported hardware vendor\n");
373    while (1);
374  }
375  myBoard = getMotorolaBoard();
376
377  printk("-----------------------------------------\n");
378  printk("Welcome to %s on %s\n", _RTEMS_version,
379                                    motorolaBoardToString(myBoard));
380  printk("-----------------------------------------\n");
381#ifdef SHOW_MORE_INIT_SETTINGS
382  printk("Residuals are located at %x\n", (unsigned) &residualCopy);
383  printk("Additionnal boot options are %s\n", loaderParam);
384  printk("Initial system stack at %x\n",stack);
385  printk("Software IRQ stack at %x\n",intrStack);
386  printk("-----------------------------------------\n");
387#endif
388
389#ifdef TEST_RETURN_TO_PPCBUG
390  printk("Hit <Enter> to return to PPCBUG monitor\n");
391  printk("When Finished hit GO. It should print <Back from monitor>\n");
392  debug_getc();
393  _return_to_ppcbug();
394  printk("Back from monitor\n");
395  _return_to_ppcbug();
396#endif /* TEST_RETURN_TO_PPCBUG  */
397
398#ifdef SHOW_MORE_INIT_SETTINGS
399  printk("Going to start PCI buses scanning and initialization\n");
400#endif
401  InitializePCI();
402
403  {
404    const struct _int_map *bspmap  = motorolaIntMap(currentBoard);
405    if( bspmap ) {
406       printk("pci : Configuring interrupt routing for '%s'\n",
407          motorolaBoardToString(currentBoard));
408       FixupPCI(bspmap, motorolaIntSwizzle(currentBoard));
409    }
410    else
411       printk("pci : Interrupt routing not available for this bsp\n");
412 }
413
414#ifdef SHOW_MORE_INIT_SETTINGS
415  printk("Number of PCI buses found is : %d\n", BusCountPCI());
416#endif
417#ifdef TEST_RAW_EXCEPTION_CODE
418  printk("Testing exception handling Part 1\n");
419  /*
420   * Cause a software exception
421   */
422  __asm__ __volatile ("sc");
423  /*
424   * Check we can still catch exceptions and return coorectly.
425   */
426  printk("Testing exception handling Part 2\n");
427  __asm__ __volatile ("sc");
428
429  /*
430   *  Somehow doing the above seems to clobber SPRG0 on the mvme2100.  It
431   *  is probably a not so subtle hint that you do not want to use PPCBug
432   *  once RTEMS is up and running.  Anyway, we still needs to indicate
433   *  that we have fixed PR288.  Eventually, this should go away.
434   */
435  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
436#endif
437
438  BSP_mem_size            = residualCopy.TotalMemory;
439  BSP_bus_frequency       = residualCopy.VitalProductData.ProcessorBusHz;
440  BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz;
441  BSP_time_base_divisor   = (residualCopy.VitalProductData.TimeBaseDivisor?
442                    residualCopy.VitalProductData.TimeBaseDivisor : 4000);
443
444  /* clear hostbridge errors but leave MCP disabled -
445   * PCI config space scanning code will trip otherwise :-(
446   */
447  _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
448
449  /* Allocate and set up the page table mappings
450   * This is only available on >604 CPUs.
451   *
452   * NOTE: This setup routine may modify the available memory
453   *       size. It is essential to call it before
454   *       calculating the workspace etc.
455   */
456  pt = BSP_pgtbl_setup(&BSP_mem_size);
457
458  if (!pt || TRIV121_MAP_SUCCESS != triv121PgTblMap(
459            pt, TRIV121_121_VSID, 0xfeff0000, 1,
460            TRIV121_ATTR_IO_PAGE, TRIV121_PP_RW_PAGE)) {
461        printk("WARNING: unable to setup page tables VME "
462               "bridge must share PCI space\n");
463  }
464
465  /*
466   * Set up our hooks
467   * Make sure libc_init is done before drivers initialized so that
468   * they can use atexit()
469   */
470
471  Cpu_table.pretasking_hook      = bsp_pretasking_hook;    /* init libc, etc. */
472  Cpu_table.postdriver_hook      = bsp_postdriver_hook;
473  Cpu_table.do_zero_of_workspace = TRUE;
474  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
475  Cpu_table.clicks_per_usec      = BSP_processor_frequency/(BSP_time_base_divisor * 1000);
476  Cpu_table.exceptions_in_RAM    = TRUE;
477
478#ifdef SHOW_MORE_INIT_SETTINGS
479  printk("BSP_Configuration.work_space_size = %x\n",
480          BSP_Configuration.work_space_size);
481#endif
482
483  work_space_start =
484    (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size;
485
486  if ( work_space_start <=
487       ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) {
488    printk( "bspstart: Not enough RAM!!!\n" );
489    bsp_cleanup();
490  }
491
492  BSP_Configuration.work_space_start = work_space_start;
493
494  /*
495   * Initalize RTEMS IRQ system
496   */
497  BSP_rtems_irq_mng_init(0);
498
499  /* Activate the page table mappings only after
500   * initializing interrupts because the irq_mng_init()
501   * routine needs to modify the text
502   */
503  if (pt) {
504#ifdef  SHOW_MORE_INIT_SETTINGS
505    printk("Page table setup finished; will activate it NOW...\n");
506#endif
507    BSP_pgtbl_activate(pt);
508#if !defined(mvme2100)
509    /* finally, switch off DBAT3 */
510    setdbat(3, 0, 0, 0, 0); 
511#endif
512  }
513
514  /*
515   * Initialize VME bridge - needs working PCI and IRQ subsystems...
516   */
517#ifdef SHOW_MORE_INIT_SETTINGS
518  printk("Going to initialize VME bridge\n");
519#endif
520  /*
521   * VME initialization is in a separate file so apps which don't use VME or
522   * want a different configuration may link against a customized routine.
523   */
524  BSP_vme_config();
525
526#if defined(DEBUG_BATS)
527  ShowBATS();
528#endif
529
530#ifdef SHOW_MORE_INIT_SETTINGS
531  printk("Exit from bspstart\n");
532#endif
533}
Note: See TracBrowser for help on using the repository browser.