1 | /* |
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2 | * This routine starts the application. It includes application, |
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3 | * board, and monitor specific initialization and configuration. |
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4 | * The generic CPU dependent initialization has been performed |
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5 | * before this routine is invoked. |
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6 | * |
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7 | * COPYRIGHT (c) 1989-1998. |
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8 | * On-Line Applications Research Corporation (OAR). |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.OARcorp.com/rtems/license.html. |
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13 | * |
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14 | * Modified to support the MCP750. |
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15 | * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr |
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16 | * |
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17 | * $Id$ |
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18 | */ |
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19 | |
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20 | #include <string.h> |
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21 | |
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22 | #include <rtems/libio.h> |
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23 | #include <rtems/libcsupport.h> |
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24 | #include <bsp/consoleIo.h> |
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25 | #include <libcpu/spr.h> |
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26 | #include <bsp/residual.h> |
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27 | #include <bsp/pci.h> |
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28 | #include <bsp/openpic.h> |
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29 | #include <bsp/irq.h> |
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30 | #include <bsp/VME.h> |
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31 | #include <bsp.h> |
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32 | #include <libcpu/bat.h> |
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33 | #include <libcpu/pte121.h> |
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34 | #include <libcpu/cpuIdent.h> |
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35 | #include <bsp/vectors.h> |
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36 | #include <bsp/motorola.h> |
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37 | |
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38 | extern void _return_to_ppcbug(); |
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39 | extern unsigned long __rtems_end; |
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40 | extern unsigned long _end; |
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41 | extern unsigned long __bss_start; |
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42 | extern void L1_caches_enables(); |
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43 | extern unsigned get_L2CR(); |
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44 | extern void set_L2CR(unsigned); |
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45 | extern void bsp_cleanup(void); |
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46 | extern Triv121PgTbl BSP_pgtbl_setup(); |
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47 | extern void BSP_pgtbl_activate(); |
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48 | extern void BSP_vme_config(); |
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49 | |
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50 | SPR_RW(SPR0) |
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51 | SPR_RW(SPR1) |
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52 | |
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53 | /* |
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54 | * Copy of residuals passed by firmware |
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55 | */ |
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56 | RESIDUAL residualCopy; |
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57 | /* |
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58 | * Copy Additional boot param passed by boot loader |
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59 | */ |
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60 | #define MAX_LOADER_ADD_PARM 80 |
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61 | char loaderParam[MAX_LOADER_ADD_PARM]; |
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62 | /* |
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63 | * Vital Board data Start using DATA RESIDUAL |
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64 | */ |
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65 | /* |
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66 | * Total memory using RESIDUAL DATA |
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67 | */ |
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68 | unsigned int BSP_mem_size; |
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69 | /* |
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70 | * PCI Bus Frequency |
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71 | */ |
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72 | unsigned int BSP_bus_frequency; |
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73 | /* |
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74 | * processor clock frequency |
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75 | */ |
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76 | unsigned int BSP_processor_frequency; |
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77 | /* |
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78 | * Time base divisior (how many tick for 1 second). |
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79 | */ |
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80 | unsigned int BSP_time_base_divisor; |
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81 | /* |
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82 | * system init stack and soft ir stack size |
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83 | */ |
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84 | #define INIT_STACK_SIZE 0x1000 |
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85 | #define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY |
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86 | |
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87 | void BSP_panic(char *s) |
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88 | { |
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89 | printk("%s PANIC %s\n",_RTEMS_version, s); |
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90 | __asm__ __volatile ("sc"); |
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91 | } |
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92 | |
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93 | void _BSP_Fatal_error(unsigned int v) |
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94 | { |
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95 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
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96 | __asm__ __volatile ("sc"); |
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97 | } |
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98 | |
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99 | /* |
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100 | * The original table from the application and our copy of it with |
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101 | * some changes. |
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102 | */ |
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103 | |
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104 | extern rtems_configuration_table Configuration; |
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105 | |
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106 | rtems_configuration_table BSP_Configuration; |
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107 | |
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108 | rtems_cpu_table Cpu_table; |
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109 | |
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110 | char *rtems_progname; |
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111 | |
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112 | /* |
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113 | * Use the shared implementations of the following routines |
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114 | */ |
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115 | |
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116 | void bsp_postdriver_hook(void); |
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117 | void bsp_libc_init( void *, unsigned32, int ); |
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118 | |
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119 | /* |
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120 | * Function: bsp_pretasking_hook |
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121 | * Created: 95/03/10 |
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122 | * |
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123 | * Description: |
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124 | * BSP pretasking hook. Called just before drivers are initialized. |
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125 | * Used to setup libc and install any BSP extensions. |
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126 | * |
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127 | * NOTES: |
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128 | * Must not use libc (to do io) from here, since drivers are |
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129 | * not yet initialized. |
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130 | * |
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131 | */ |
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132 | |
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133 | void bsp_pretasking_hook(void) |
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134 | { |
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135 | rtems_unsigned32 heap_start; |
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136 | rtems_unsigned32 heap_size; |
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137 | |
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138 | heap_start = ((rtems_unsigned32) &__rtems_end) +INIT_STACK_SIZE + INTR_STACK_SIZE; |
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139 | if (heap_start & (CPU_ALIGNMENT-1)) |
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140 | heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); |
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141 | |
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142 | heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size; |
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143 | |
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144 | #ifdef SHOW_MORE_INIT_SETTINGS |
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145 | printk(" HEAP start %x size %x\n", heap_start, heap_size); |
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146 | #endif |
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147 | bsp_libc_init((void *) heap_start, heap_size, 0); |
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148 | |
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149 | #ifdef RTEMS_DEBUG |
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150 | rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); |
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151 | #endif |
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152 | } |
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153 | |
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154 | void zero_bss() |
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155 | { |
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156 | memset(&__bss_start, 0, ((unsigned) (&__rtems_end)) - ((unsigned) &__bss_start)); |
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157 | } |
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158 | |
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159 | void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options) |
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160 | { |
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161 | |
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162 | residualCopy = *r3; |
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163 | strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM); |
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164 | loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0'; |
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165 | } |
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166 | |
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167 | /* |
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168 | * bsp_start |
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169 | * |
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170 | * This routine does the bulk of the system initialization. |
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171 | */ |
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172 | |
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173 | void bsp_start( void ) |
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174 | { |
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175 | int err; |
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176 | unsigned char *stack; |
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177 | unsigned l2cr; |
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178 | register unsigned char* intrStack; |
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179 | register unsigned int intrNestingLevel = 0; |
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180 | unsigned char *work_space_start; |
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181 | ppc_cpu_id_t myCpu; |
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182 | ppc_cpu_revision_t myCpuRevision; |
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183 | prep_t boardManufacturer; |
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184 | motorolaBoard myBoard; |
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185 | Triv121PgTbl pt=0; |
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186 | /* |
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187 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function |
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188 | * store the result in global variables so that it can be used latter... |
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189 | */ |
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190 | myCpu = get_ppc_cpu_type(); |
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191 | myCpuRevision = get_ppc_cpu_revision(); |
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192 | /* |
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193 | * enables L1 Cache. Note that the L1_caches_enables() codes checks for |
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194 | * relevant CPU type so that the reason why there is no use of myCpu... |
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195 | */ |
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196 | L1_caches_enables(); |
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197 | /* |
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198 | * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for |
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199 | * relevant CPU type (mpc750)... |
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200 | */ |
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201 | l2cr = get_L2CR(); |
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202 | #ifdef SHOW_LCR2_REGISTER |
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203 | printk("Initial L2CR value = %x\n", l2cr); |
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204 | #endif |
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205 | if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1)) |
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206 | set_L2CR(0xb9A14000); |
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207 | /* |
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208 | * the initial stack has aready been set to this value in start.S |
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209 | * so there is no need to set it in r1 again... It is just for info |
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210 | * so that It can be printed without accessing R1. |
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211 | */ |
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212 | stack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE; |
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213 | |
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214 | /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ |
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215 | *((unsigned32 *)stack) = 0; |
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216 | |
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217 | /* |
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218 | * Initialize the interrupt related settings |
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219 | * SPRG0 = interrupt nesting level count |
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220 | * SPRG1 = software managed IRQ stack |
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221 | * |
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222 | * This could be done latter (e.g in IRQ_INIT) but it helps to understand |
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223 | * some settings below... |
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224 | */ |
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225 | intrStack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE; |
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226 | |
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227 | /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ |
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228 | *((unsigned32 *)intrStack) = 0; |
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229 | |
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230 | _write_SPR1((unsigned int)intrStack); |
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231 | _write_SPR0(intrNestingLevel); |
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232 | /* |
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233 | * Initialize default raw exception hanlders. See vectors/vectors_init.c |
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234 | */ |
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235 | initialize_exceptions(); |
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236 | /* |
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237 | * Init MMU block address translation to enable hardware |
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238 | * access |
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239 | */ |
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240 | /* |
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241 | * PC legacy IO space used for inb/outb and all PC |
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242 | * compatible hardware |
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243 | */ |
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244 | setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE); |
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245 | /* |
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246 | * PCI devices memory area. Needed to access OPENPIC features |
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247 | * provided by the RAVEN |
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248 | */ |
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249 | /* T. Straumann: give more PCI address space */ |
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250 | setdbat(2, PCI_MEM_BASE, PCI_MEM_BASE, 0x10000000, IO_PAGE); |
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251 | /* |
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252 | * Must have acces to open pic PCI ACK registers |
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253 | * provided by the RAVEN |
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254 | * |
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255 | */ |
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256 | setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE); |
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257 | |
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258 | select_console(CONSOLE_LOG); |
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259 | |
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260 | /* We check that the keyboard is present and immediately |
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261 | * select the serial console if not. |
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262 | */ |
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263 | err = kbdreset(); |
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264 | if (err) select_console(CONSOLE_SERIAL); |
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265 | |
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266 | boardManufacturer = checkPrepBoardType(&residualCopy); |
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267 | if (boardManufacturer != PREP_Motorola) { |
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268 | printk("Unsupported hardware vendor\n"); |
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269 | while (1); |
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270 | } |
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271 | myBoard = getMotorolaBoard(); |
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272 | |
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273 | printk("-----------------------------------------\n"); |
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274 | printk("Welcome to %s on %s\n", _RTEMS_version, motorolaBoardToString(myBoard)); |
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275 | printk("-----------------------------------------\n"); |
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276 | #ifdef SHOW_MORE_INIT_SETTINGS |
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277 | printk("Residuals are located at %x\n", (unsigned) &residualCopy); |
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278 | printk("Additionnal boot options are %s\n", loaderParam); |
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279 | printk("Initial system stack at %x\n",stack); |
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280 | printk("Software IRQ stack at %x\n",intrStack); |
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281 | printk("-----------------------------------------\n"); |
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282 | #endif |
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283 | |
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284 | #ifdef TEST_RETURN_TO_PPCBUG |
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285 | printk("Hit <Enter> to return to PPCBUG monitor\n"); |
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286 | printk("When Finished hit GO. It should print <Back from monitor>\n"); |
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287 | debug_getc(); |
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288 | _return_to_ppcbug(); |
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289 | printk("Back from monitor\n"); |
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290 | _return_to_ppcbug(); |
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291 | #endif /* TEST_RETURN_TO_PPCBUG */ |
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292 | |
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293 | #ifdef SHOW_MORE_INIT_SETTINGS |
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294 | printk("Going to start PCI buses scanning and initialization\n"); |
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295 | #endif |
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296 | InitializePCI(); |
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297 | #ifdef SHOW_MORE_INIT_SETTINGS |
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298 | printk("Number of PCI buses found is : %d\n", BusCountPCI()); |
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299 | #endif |
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300 | #ifdef TEST_RAW_EXCEPTION_CODE |
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301 | printk("Testing exception handling Part 1\n"); |
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302 | /* |
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303 | * Cause a software exception |
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304 | */ |
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305 | __asm__ __volatile ("sc"); |
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306 | /* |
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307 | * Check we can still catch exceptions and returned coorectly. |
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308 | */ |
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309 | printk("Testing exception handling Part 2\n"); |
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310 | __asm__ __volatile ("sc"); |
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311 | #endif |
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312 | |
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313 | |
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314 | BSP_mem_size = residualCopy.TotalMemory; |
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315 | BSP_bus_frequency = residualCopy.VitalProductData.ProcessorBusHz; |
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316 | BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz; |
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317 | BSP_time_base_divisor = (residualCopy.VitalProductData.TimeBaseDivisor? |
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318 | residualCopy.VitalProductData.TimeBaseDivisor : 4000); |
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319 | |
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320 | /* Allocate and set up the page table mappings |
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321 | * This is only available on >604 CPUs. |
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322 | * |
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323 | * NOTE: This setup routine may modify the available memory |
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324 | * size. It is essential to call it before |
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325 | * calculating the workspace etc. |
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326 | */ |
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327 | pt = BSP_pgtbl_setup(&BSP_mem_size); |
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328 | |
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329 | if (!pt || |
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330 | TRIV121_MAP_SUCCESS != triv121PgTblMap( |
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331 | pt, |
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332 | TRIV121_121_VSID, |
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333 | 0xfeff0000, |
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334 | 1, |
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335 | TRIV121_ATTR_IO_PAGE, |
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336 | TRIV121_PP_RW_PAGE |
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337 | )) { |
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338 | printk("WARNING: unable to setup page tables VME bridge must share PCI space\n"); |
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339 | } |
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340 | |
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341 | /* |
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342 | * Set up our hooks |
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343 | * Make sure libc_init is done before drivers initialized so that |
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344 | * they can use atexit() |
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345 | */ |
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346 | |
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347 | Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ |
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348 | Cpu_table.postdriver_hook = bsp_postdriver_hook; |
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349 | Cpu_table.do_zero_of_workspace = TRUE; |
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350 | Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; |
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351 | Cpu_table.clicks_per_usec = BSP_processor_frequency/(BSP_time_base_divisor * 1000); |
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352 | Cpu_table.exceptions_in_RAM = TRUE; |
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353 | |
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354 | #ifdef SHOW_MORE_INIT_SETTINGS |
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355 | printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size); |
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356 | #endif |
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357 | work_space_start = |
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358 | (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size; |
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359 | |
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360 | if ( work_space_start <= ((unsigned char *)&__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) { |
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361 | printk( "bspstart: Not enough RAM!!!\n" ); |
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362 | bsp_cleanup(); |
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363 | } |
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364 | |
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365 | BSP_Configuration.work_space_start = work_space_start; |
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366 | |
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367 | /* |
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368 | * Initalize RTEMS IRQ system |
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369 | */ |
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370 | BSP_rtems_irq_mng_init(0); |
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371 | |
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372 | |
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373 | /* Activate the page table mappings only after |
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374 | * initializing interrupts because the irq_mng_init() |
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375 | * routine needs to modify the text |
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376 | */ |
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377 | if (pt) { |
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378 | #ifdef SHOW_MORE_INIT_SETTINGS |
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379 | printk("Page table setup finished; will activate it NOW...\n"); |
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380 | #endif |
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381 | BSP_pgtbl_activate(pt); |
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382 | /* finally, switch off DBAT3 */ |
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383 | setdbat(3, 0, 0, 0, 0); |
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384 | } |
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385 | |
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386 | /* |
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387 | * Initialize VME bridge - needs working PCI |
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388 | * and IRQ subsystems... |
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389 | */ |
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390 | #ifdef SHOW_MORE_INIT_SETTINGS |
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391 | printk("Going to initialize VME bridge\n"); |
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392 | #endif |
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393 | /* VME initialization is in a separate file so apps which don't use |
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394 | * VME or want a different configuration may link against a customized |
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395 | * routine. |
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396 | */ |
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397 | BSP_vme_config(); |
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398 | |
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399 | #ifdef SHOW_MORE_INIT_SETTINGS |
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400 | printk("Exit from bspstart\n"); |
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401 | #endif |
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402 | } |
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