source: rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c @ 4f3e4f33

4.104.114.84.95
Last change on this file since 4f3e4f33 was 4f3e4f33, checked in by Joel Sherrill <joel.sherrill@…>, on Feb 20, 2003 at 9:32:07 PM

2003-02-20 Till Straumann <strauman@…>

PR 349/bsps

  • console/console.c, console/uart.c, console/uart.h: implement IOCTLs for the serial (UART) console to install/retrieve a BREAK-IRQ callback. The callback routine (if installed) is invoked from the UART ISR when a BREAK interrupt is detected. This can be used e.g. to enforce a "hotkey" reboot a la vxWorks Ctrl-X (although we use the serial line break condition) NOTE: The callback runs in ISR context.
  • Property mode set to 100644
File size: 11.1 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-1998.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.OARcorp.com/rtems/license.html.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  $Id$
18 */
19
20#include <string.h>
21
22#include <rtems/libio.h>
23#include <rtems/libcsupport.h>
24#include <bsp/consoleIo.h>
25#include <libcpu/spr.h>
26#include <bsp/residual.h>
27#include <bsp/pci.h>
28#include <bsp/openpic.h>
29#include <bsp/irq.h>
30#include <bsp/VME.h>
31#include <bsp.h>
32#include <libcpu/bat.h>
33#include <libcpu/pte121.h>
34#include <libcpu/cpuIdent.h>
35#include <bsp/vectors.h>
36#include <bsp/motorola.h>
37
38extern void _return_to_ppcbug();
39extern unsigned long __rtems_end;
40extern unsigned long _end;
41extern unsigned long __bss_start;
42extern void L1_caches_enables();
43extern unsigned get_L2CR();
44extern void set_L2CR(unsigned);
45extern void bsp_cleanup(void);
46extern Triv121PgTbl BSP_pgtbl_setup();
47extern void                     BSP_pgtbl_activate();
48extern void                     BSP_vme_config();
49
50SPR_RW(SPR0)
51SPR_RW(SPR1)
52
53/*
54 * Copy of residuals passed by firmware
55 */
56RESIDUAL residualCopy; 
57/*
58 * Copy Additional boot param passed by boot loader
59 */
60#define MAX_LOADER_ADD_PARM 80
61char loaderParam[MAX_LOADER_ADD_PARM];
62/*
63 * Vital Board data Start using DATA RESIDUAL
64 */
65/*
66 * Total memory using RESIDUAL DATA
67 */
68unsigned int BSP_mem_size;
69/*
70 * PCI Bus Frequency
71 */
72unsigned int BSP_bus_frequency;
73/*
74 * processor clock frequency
75 */
76unsigned int BSP_processor_frequency;
77/*
78 * Time base divisior (how many tick for 1 second).
79 */
80unsigned int BSP_time_base_divisor;
81/*
82 * system init stack and soft ir stack size
83 */
84#define INIT_STACK_SIZE 0x1000
85#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
86
87void BSP_panic(char *s)
88{
89  printk("%s PANIC %s\n",_RTEMS_version, s);
90  __asm__ __volatile ("sc"); 
91}
92
93void _BSP_Fatal_error(unsigned int v)
94{
95  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
96  __asm__ __volatile ("sc"); 
97}
98 
99/*
100 *  The original table from the application and our copy of it with
101 *  some changes.
102 */
103
104extern rtems_configuration_table Configuration;
105
106rtems_configuration_table  BSP_Configuration;
107
108rtems_cpu_table Cpu_table;
109
110char *rtems_progname;
111
112/*
113 *  Use the shared implementations of the following routines
114 */
115 
116void bsp_postdriver_hook(void);
117void bsp_libc_init( void *, unsigned32, int );
118
119/*
120 *  Function:   bsp_pretasking_hook
121 *  Created:    95/03/10
122 *
123 *  Description:
124 *      BSP pretasking hook.  Called just before drivers are initialized.
125 *      Used to setup libc and install any BSP extensions.
126 *
127 *  NOTES:
128 *      Must not use libc (to do io) from here, since drivers are
129 *      not yet initialized.
130 *
131 */
132 
133void bsp_pretasking_hook(void)
134{
135    rtems_unsigned32        heap_start;   
136    rtems_unsigned32        heap_size;
137
138    heap_start = ((rtems_unsigned32) &__rtems_end) +INIT_STACK_SIZE + INTR_STACK_SIZE;
139    if (heap_start & (CPU_ALIGNMENT-1))
140        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
141
142    heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
143
144#ifdef SHOW_MORE_INIT_SETTINGS
145    printk(" HEAP start %x  size %x\n", heap_start, heap_size);
146#endif   
147    bsp_libc_init((void *) heap_start, heap_size, 0);
148
149#ifdef RTEMS_DEBUG
150    rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
151#endif
152}
153
154void zero_bss()
155{
156  memset(&__bss_start, 0, ((unsigned) (&__rtems_end)) - ((unsigned) &__bss_start));
157}
158
159void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options)
160{
161 
162  residualCopy = *r3;
163  strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM);
164  loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0';
165}
166
167/*
168 *  bsp_start
169 *
170 *  This routine does the bulk of the system initialization.
171 */
172
173void bsp_start( void )
174{
175  int err;
176  unsigned char *stack;
177  unsigned l2cr;
178  register unsigned char* intrStack;
179  register unsigned int intrNestingLevel = 0;
180  unsigned char *work_space_start;
181  ppc_cpu_id_t myCpu;
182  ppc_cpu_revision_t myCpuRevision;
183  prep_t boardManufacturer;
184  motorolaBoard myBoard;
185  Triv121PgTbl  pt=0;
186  /*
187   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
188   * store the result in global variables so that it can be used latter...
189   */
190  myCpu         = get_ppc_cpu_type();
191  myCpuRevision = get_ppc_cpu_revision();
192  /*
193   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
194   * relevant CPU type so that the reason why there is no use of myCpu...
195   */
196  L1_caches_enables();
197  /*
198   * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
199   * relevant CPU type (mpc750)...
200   */
201  l2cr = get_L2CR();
202#ifdef SHOW_LCR2_REGISTER
203  printk("Initial L2CR value = %x\n", l2cr);
204#endif 
205  if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1))
206    set_L2CR(0xb9A14000);
207  /*
208   * the initial stack  has aready been set to this value in start.S
209   * so there is no need to set it in r1 again... It is just for info
210   * so that It can be printed without accessing R1.
211   */
212  stack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
213
214 /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
215  *((unsigned32 *)stack) = 0;
216
217  /*
218   * Initialize the interrupt related settings
219   * SPRG0 = interrupt nesting level count
220   * SPRG1 = software managed IRQ stack
221   *
222   * This could be done latter (e.g in IRQ_INIT) but it helps to understand
223   * some settings below...
224   */
225  intrStack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
226
227 /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
228  *((unsigned32 *)intrStack) = 0;
229
230  _write_SPR1((unsigned int)intrStack);
231  _write_SPR0(intrNestingLevel);
232  /*
233   * Initialize default raw exception hanlders. See vectors/vectors_init.c
234   */
235  initialize_exceptions();
236  /*
237   * Init MMU block address translation to enable hardware
238   * access
239   */
240  /*
241   * PC legacy IO space used for inb/outb and all PC
242   * compatible hardware
243   */
244  setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE);
245  /*
246   * PCI devices memory area. Needed to access OPENPIC features
247   * provided by the RAVEN
248   */
249  /* T. Straumann: give more PCI address space */
250  setdbat(2, PCI_MEM_BASE, PCI_MEM_BASE, 0x10000000, IO_PAGE);
251  /*
252   * Must have acces to open pic PCI ACK registers
253   * provided by the RAVEN
254   *
255   */
256  setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
257
258  select_console(CONSOLE_LOG);
259
260  /* We check that the keyboard is present and immediately
261   * select the serial console if not.
262   */
263  err = kbdreset();
264  if (err) select_console(CONSOLE_SERIAL);
265
266  boardManufacturer   =  checkPrepBoardType(&residualCopy);
267  if (boardManufacturer != PREP_Motorola) {
268    printk("Unsupported hardware vendor\n");
269    while (1);
270  }
271  myBoard = getMotorolaBoard();
272 
273  printk("-----------------------------------------\n");
274  printk("Welcome to %s on %s\n", _RTEMS_version, motorolaBoardToString(myBoard));
275  printk("-----------------------------------------\n");
276#ifdef SHOW_MORE_INIT_SETTINGS 
277  printk("Residuals are located at %x\n", (unsigned) &residualCopy);
278  printk("Additionnal boot options are %s\n", loaderParam);
279  printk("Initial system stack at %x\n",stack);
280  printk("Software IRQ stack at %x\n",intrStack);
281  printk("-----------------------------------------\n");
282#endif
283
284#ifdef TEST_RETURN_TO_PPCBUG 
285  printk("Hit <Enter> to return to PPCBUG monitor\n");
286  printk("When Finished hit GO. It should print <Back from monitor>\n");
287  debug_getc();
288  _return_to_ppcbug();
289  printk("Back from monitor\n");
290  _return_to_ppcbug();
291#endif /* TEST_RETURN_TO_PPCBUG  */
292
293#ifdef SHOW_MORE_INIT_SETTINGS
294  printk("Going to start PCI buses scanning and initialization\n");
295#endif 
296  InitializePCI();
297#ifdef SHOW_MORE_INIT_SETTINGS
298  printk("Number of PCI buses found is : %d\n", BusCountPCI());
299#endif
300#ifdef TEST_RAW_EXCEPTION_CODE 
301  printk("Testing exception handling Part 1\n");
302  /*
303   * Cause a software exception
304   */
305  __asm__ __volatile ("sc");
306  /*
307   * Check we can still catch exceptions and returned coorectly.
308   */
309  printk("Testing exception handling Part 2\n");
310  __asm__ __volatile ("sc");
311#endif 
312
313
314  BSP_mem_size                          = residualCopy.TotalMemory;
315  BSP_bus_frequency                     = residualCopy.VitalProductData.ProcessorBusHz;
316  BSP_processor_frequency               = residualCopy.VitalProductData.ProcessorHz;
317  BSP_time_base_divisor                 = (residualCopy.VitalProductData.TimeBaseDivisor?
318                                           residualCopy.VitalProductData.TimeBaseDivisor : 4000);
319
320  /* Allocate and set up the page table mappings
321   * This is only available on >604 CPUs.
322   *
323   * NOTE: This setup routine may modify the available memory
324   *       size. It is essential to call it before
325   *       calculating the workspace etc.
326   */
327  pt = BSP_pgtbl_setup(&BSP_mem_size);
328
329  if (!pt ||
330          TRIV121_MAP_SUCCESS != triv121PgTblMap(
331                                                                                pt,
332                                                                                TRIV121_121_VSID,
333                                                                                0xfeff0000,
334                                                                                1,
335                                                                                TRIV121_ATTR_IO_PAGE,
336                                                                                TRIV121_PP_RW_PAGE
337                                                                                )) {
338        printk("WARNING: unable to setup page tables VME bridge must share PCI space\n");
339  }
340 
341  /*
342   * Set up our hooks
343   * Make sure libc_init is done before drivers initialized so that
344   * they can use atexit()
345   */
346
347  Cpu_table.pretasking_hook      = bsp_pretasking_hook;    /* init libc, etc. */
348  Cpu_table.postdriver_hook      = bsp_postdriver_hook;
349  Cpu_table.do_zero_of_workspace = TRUE;
350  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
351  Cpu_table.clicks_per_usec      = BSP_processor_frequency/(BSP_time_base_divisor * 1000);
352  Cpu_table.exceptions_in_RAM    = TRUE;
353
354#ifdef SHOW_MORE_INIT_SETTINGS
355  printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size);
356#endif 
357  work_space_start = 
358    (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size;
359
360  if ( work_space_start <= ((unsigned char *)&__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) {
361    printk( "bspstart: Not enough RAM!!!\n" );
362    bsp_cleanup();
363  }
364
365  BSP_Configuration.work_space_start = work_space_start;
366
367  /*
368   * Initalize RTEMS IRQ system
369   */
370  BSP_rtems_irq_mng_init(0);
371
372 
373  /* Activate the page table mappings only after
374   * initializing interrupts because the irq_mng_init()
375   * routine needs to modify the text
376   */           
377  if (pt) {
378#ifdef  SHOW_MORE_INIT_SETTINGS
379    printk("Page table setup finished; will activate it NOW...\n");
380#endif
381    BSP_pgtbl_activate(pt);
382        /* finally, switch off DBAT3 */
383        setdbat(3, 0, 0, 0, 0); 
384  }
385
386  /*
387   * Initialize VME bridge - needs working PCI
388   * and IRQ subsystems...
389   */
390#ifdef SHOW_MORE_INIT_SETTINGS
391  printk("Going to initialize VME bridge\n");
392#endif
393  /* VME initialization is in a separate file so apps which don't use
394   * VME or want a different configuration may link against a customized
395   * routine.
396   */
397  BSP_vme_config();
398
399#ifdef SHOW_MORE_INIT_SETTINGS
400  printk("Exit from bspstart\n");
401#endif 
402}
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