source: rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c @ 41b28f2e

4.104.11
Last change on this file since 41b28f2e was 41b28f2e, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 10, 2008 at 9:34:00 PM

2008-09-10 Joel Sherrill <joel.sherrill@…>

  • shared/startup/bspstart.c: Review of all bsp_cleanup() implementations. In this phase, all prototypes were removed from bsp.h and empty implementations were removed and made to use the shared stub.
  • Property mode set to 100644
File size: 10.8 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2007.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  $Id$
18 */
19
20#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
21
22#include <string.h>
23
24#include <bsp.h>
25#include <rtems/libio.h>
26#include <rtems/libcsupport.h>
27#include <rtems/bspIo.h>
28#include <bsp/consoleIo.h>
29#include <libcpu/spr.h>
30#include <bsp/residual.h>
31#include <bsp/pci.h>
32#include <bsp/openpic.h>
33#include <bsp/irq.h>
34#include <libcpu/bat.h>
35#include <libcpu/pte121.h>
36#include <libcpu/cpuIdent.h>
37#include <bsp/vectors.h>
38#include <bsp/motorola.h>
39#include <rtems/powerpc/powerpc.h>
40
41extern void _return_to_ppcbug(void);
42extern unsigned long __rtems_end[];
43extern void L1_caches_enables(void);
44extern unsigned get_L2CR(void);
45extern void set_L2CR(unsigned);
46extern Triv121PgTbl BSP_pgtbl_setup(unsigned long);
47extern void                     BSP_pgtbl_activate(Triv121PgTbl);
48extern void                     BSP_vme_config(void);
49
50SPR_RW(SPRG1)
51
52#if defined(DEBUG_BATS)
53extern void ShowBATS(void);
54#endif
55
56/*
57 *  Driver configuration parameters
58 */
59uint32_t   bsp_clicks_per_usec;
60
61/*
62 * Copy of residuals passed by firmware
63 */
64RESIDUAL residualCopy;
65/*
66 * Copy Additional boot param passed by boot loader
67 */
68#define MAX_LOADER_ADD_PARM 80
69char loaderParam[MAX_LOADER_ADD_PARM];
70
71char *BSP_commandline_string = loaderParam;
72/*
73 * Vital Board data Start using DATA RESIDUAL
74 */
75/*
76 * Total memory using RESIDUAL DATA
77 */
78unsigned int BSP_mem_size;
79/*
80 * Where the heap starts; is used by bsp_pretasking_hook;
81 */
82unsigned int BSP_heap_start;
83/*
84 * PCI Bus Frequency
85 */
86unsigned int BSP_bus_frequency;
87/*
88 * processor clock frequency
89 */
90unsigned int BSP_processor_frequency;
91/*
92 * Time base divisior (how many tick for 1 second).
93 */
94unsigned int BSP_time_base_divisor;
95/*
96 * system init stack
97 */
98#define INIT_STACK_SIZE 0x1000
99
100void BSP_panic(char *s)
101{
102  printk("%s PANIC %s\n",_RTEMS_version, s);
103  __asm__ __volatile ("sc");
104}
105
106void _BSP_Fatal_error(unsigned int v)
107{
108  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
109  __asm__ __volatile ("sc");
110}
111
112/*
113 *  Use the shared implementations of the following routines
114 */
115
116void bsp_libc_init( void *, uint32_t, int );
117
118void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options)
119{
120
121  residualCopy = *r3;
122  strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM);
123  loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0';
124}
125
126#if defined(mvme2100)
127unsigned int EUMBBAR;
128
129/*
130 * Return the current value of the Embedded Utilities Memory Block Base Address
131 * Register (EUMBBAR) as read from the processor configuration register using
132 * Processor Address Map B (CHRP).
133 */ 
134unsigned int get_eumbbar(void) {
135  out_le32( (uint32_t*)0xfec00000, 0x80000078 );
136  return in_le32( (uint32_t*)0xfee00000 );
137}
138#endif
139
140/*
141 *  bsp_start
142 *
143 *  This routine does the bulk of the system initialization.
144 */
145
146void bsp_start( void )
147{
148  unsigned char *stack;
149#if !defined(mvme2100)
150  unsigned l2cr;
151#endif
152  uint32_t intrStackStart;
153  uint32_t intrStackSize;
154  unsigned char *work_space_start;
155  ppc_cpu_id_t myCpu;
156  ppc_cpu_revision_t myCpuRevision;
157  prep_t boardManufacturer;
158  motorolaBoard myBoard;
159  Triv121PgTbl  pt=0;
160
161  /*
162   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
163   * function store the result in global variables so that it can be used
164   * later...
165   */
166  myCpu         = get_ppc_cpu_type();
167  myCpuRevision = get_ppc_cpu_revision();
168
169  /*
170   * Init MMU block address translation to enable hardware access
171   */
172
173#if !defined(mvme2100)
174  /*
175   * PC legacy IO space used for inb/outb and all PC compatible hardware
176   */
177  setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE);
178#endif
179
180  /*
181   * PCI devices memory area. Needed to access OpenPIC features
182   * provided by the Raven
183   *
184   * T. Straumann: give more PCI address space
185   */
186  setdbat(2, PCI_MEM_BASE+PCI_MEM_WIN0, PCI_MEM_BASE+PCI_MEM_WIN0, 0x10000000, IO_PAGE);
187
188  /*
189   * Must have acces to open pic PCI ACK registers provided by the RAVEN
190   */
191  setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
192
193#if defined(mvme2100)
194  /* Need 0xfec00000 mapped for this */
195  EUMBBAR = get_eumbbar(); 
196#endif
197
198  /*
199   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
200   * relevant CPU type so that the reason why there is no use of myCpu...
201   */
202  L1_caches_enables();
203
204#if !defined(mvme2100)
205  /*
206   * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
207   * relevant CPU type (mpc750)...
208   */
209  l2cr = get_L2CR();
210#ifdef SHOW_LCR2_REGISTER
211  printk("Initial L2CR value = %x\n", l2cr);
212#endif
213  if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1))
214    set_L2CR(0xb9A14000);
215#endif
216
217  /*
218   * the initial stack  has aready been set to this value in start.S
219   * so there is no need to set it in r1 again... It is just for info
220   * so that It can be printed without accessing R1.
221   */
222  stack = ((unsigned char*) __rtems_end) +
223               INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
224
225  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
226  *((uint32_t*)stack) = 0;
227
228  /*
229   * Initialize the interrupt related settings.
230   */
231  intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
232  intrStackSize = rtems_configuration_get_interrupt_stack_size();
233  BSP_heap_start = intrStackStart + intrStackSize;
234
235  /*
236   * Initialize default raw exception handlers.
237   */
238  ppc_exc_initialize(
239    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
240    intrStackStart,
241    intrStackSize
242  );
243
244  select_console(CONSOLE_LOG);
245
246  /*
247   * We check that the keyboard is present and immediately
248   * select the serial console if not.
249   */
250#if defined(BSP_KBD_IOBASE)
251  { int err;
252    err = kbdreset();
253    if (err) select_console(CONSOLE_SERIAL);
254  }
255#else
256  select_console(CONSOLE_SERIAL);
257#endif
258
259  boardManufacturer   =  checkPrepBoardType(&residualCopy);
260  if (boardManufacturer != PREP_Motorola) {
261    printk("Unsupported hardware vendor\n");
262    while (1);
263  }
264  myBoard = getMotorolaBoard();
265
266  printk("-----------------------------------------\n");
267  printk("Welcome to %s on %s\n", _RTEMS_version,
268                                    motorolaBoardToString(myBoard));
269  printk("-----------------------------------------\n");
270#ifdef SHOW_MORE_INIT_SETTINGS
271  printk("Residuals are located at %x\n", (unsigned) &residualCopy);
272  printk("Additionnal boot options are %s\n", loaderParam);
273  printk("Initial system stack at %x\n",stack);
274  printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
275  printk("-----------------------------------------\n");
276#endif
277
278#ifdef TEST_RETURN_TO_PPCBUG
279  printk("Hit <Enter> to return to PPCBUG monitor\n");
280  printk("When Finished hit GO. It should print <Back from monitor>\n");
281  debug_getc();
282  _return_to_ppcbug();
283  printk("Back from monitor\n");
284  _return_to_ppcbug();
285#endif /* TEST_RETURN_TO_PPCBUG  */
286
287#ifdef SHOW_MORE_INIT_SETTINGS
288  printk("Going to start PCI buses scanning and initialization\n");
289#endif
290
291  pci_initialize();
292  {
293    const struct _int_map *bspmap  = motorolaIntMap(currentBoard);
294    if( bspmap ) {
295       printk("pci : Configuring interrupt routing for '%s'\n",
296          motorolaBoardToString(currentBoard));
297       FixupPCI(bspmap, motorolaIntSwizzle(currentBoard));
298    }
299    else
300       printk("pci : Interrupt routing not available for this bsp\n");
301 }
302
303#ifdef SHOW_MORE_INIT_SETTINGS
304  printk("Number of PCI buses found is : %d\n", pci_bus_count());
305#endif
306#ifdef TEST_RAW_EXCEPTION_CODE
307  printk("Testing exception handling Part 1\n");
308  /*
309   * Cause a software exception
310   */
311  __asm__ __volatile ("sc");
312  /*
313   * Check we can still catch exceptions and return coorectly.
314   */
315  printk("Testing exception handling Part 2\n");
316  __asm__ __volatile ("sc");
317
318  /*
319   * Somehow doing the above seems to clobber SPRG0 on the mvme2100.  The
320   * interrupt disable mask is stored in SPRG0. Is this a problem?
321   */
322  ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
323
324#endif
325
326/* See above */
327#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
328
329  BSP_mem_size            = residualCopy.TotalMemory;
330  BSP_bus_frequency       = residualCopy.VitalProductData.ProcessorBusHz;
331  BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz;
332  BSP_time_base_divisor   = (residualCopy.VitalProductData.TimeBaseDivisor?
333                    residualCopy.VitalProductData.TimeBaseDivisor : 4000);
334
335  /* clear hostbridge errors but leave MCP disabled -
336   * PCI config space scanning code will trip otherwise :-(
337   */
338  _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
339
340  /* Allocate and set up the page table mappings
341   * This is only available on >604 CPUs.
342   *
343   * NOTE: This setup routine may modify the available memory
344   *       size. It is essential to call it before
345   *       calculating the workspace etc.
346   */
347  pt = BSP_pgtbl_setup(&BSP_mem_size);
348
349  if (!pt || TRIV121_MAP_SUCCESS != triv121PgTblMap(
350            pt, TRIV121_121_VSID, 0xfeff0000, 1,
351            TRIV121_ATTR_IO_PAGE, TRIV121_PP_RW_PAGE)) {
352        printk("WARNING: unable to setup page tables VME "
353               "bridge must share PCI space\n");
354  }
355
356  /*
357   *  initialize the device driver parameters
358   */
359  bsp_clicks_per_usec    = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
360
361#ifdef SHOW_MORE_INIT_SETTINGS
362  printk("rtems_configuration_get_work_space_size() = %x\n",
363          rtems_configuration_get_work_space_size());
364#endif
365
366  work_space_start =
367    (unsigned char *)BSP_mem_size - rtems_configuration_get_work_space_size();
368
369  if ( work_space_start <= ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + 
370        rtems_configuration_get_interrupt_stack_size()) {
371    printk( "bspstart: Not enough RAM!!!\n" );
372    bsp_cleanup();
373  }
374
375  Configuration.work_space_start = work_space_start;
376
377  /*
378   * Initalize RTEMS IRQ system
379   */
380  BSP_rtems_irq_mng_init(0);
381
382  /* Activate the page table mappings only after
383   * initializing interrupts because the irq_mng_init()
384   * routine needs to modify the text
385   */
386  if (pt) {
387#ifdef  SHOW_MORE_INIT_SETTINGS
388    printk("Page table setup finished; will activate it NOW...\n");
389#endif
390    BSP_pgtbl_activate(pt);
391    /* finally, switch off DBAT3 */
392    setdbat(3, 0, 0, 0, 0); 
393  }
394
395#if defined(DEBUG_BATS)
396  ShowBATS();
397#endif
398
399#ifdef SHOW_MORE_INIT_SETTINGS
400  printk("Exit from bspstart\n");
401#endif
402}
Note: See TracBrowser for help on using the repository browser.