source: rtems/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c @ 1899fe4

4.104.114.84.95
Last change on this file since 1899fe4 was 1899fe4, checked in by Ralf Corsepius <ralf.corsepius@…>, on 02/17/05 at 04:29:15

2005-02-17 Ralf Corsepius <ralf.corsepius@…>

  • startup/bspstart.c: include <rtems/powerpc/powerpc.h>. Use PPC_MINIMUM_STACK_FRAME_SIZE instead of CPU_MINIMUM_STACK_FRAME_SIZE.
  • Property mode set to 100644
File size: 14.9 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-1998.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  $Id$
18 */
19
20#include <string.h>
21
22#include <bsp.h>
23#include <rtems/libio.h>
24#include <rtems/libcsupport.h>
25#include <bsp/consoleIo.h>
26#include <libcpu/spr.h>
27#include <bsp/residual.h>
28#include <bsp/pci.h>
29#include <bsp/openpic.h>
30#include <bsp/irq.h>
31#include <bsp/VME.h>
32#include <libcpu/bat.h>
33#include <libcpu/pte121.h>
34#include <libcpu/cpuIdent.h>
35#include <bsp/vectors.h>
36#include <bsp/motorola.h>
37#include <rtems/powerpc/powerpc.h>
38
39extern void _return_to_ppcbug();
40extern unsigned long __rtems_end[];
41extern void L1_caches_enables();
42extern unsigned get_L2CR();
43extern void set_L2CR(unsigned);
44extern void bsp_cleanup(void);
45extern Triv121PgTbl BSP_pgtbl_setup();
46extern void                     BSP_pgtbl_activate();
47extern void                     BSP_vme_config();
48
49SPR_RW(SPRG0)
50SPR_RW(SPRG1)
51
52#if defined(DEBUG_BATS)
53void printBAT( int bat, unsigned32 upper, unsigned32 lower )
54{
55  unsigned32 lowest_addr;
56  unsigned32 size;
57
58  printk("BAT%d raw(upper=0x%08x, lower=0x%08x) ", bat, upper, lower );
59
60  lowest_addr = (upper & 0xFFFE0000);
61  size = (((upper & 0x00001FFC) >> 2) + 1) * (128 * 1024);
62  printk(" range(0x%08x, 0x%08x) %s%s %s%s%s%s %s\n",
63    lowest_addr,
64    lowest_addr + (size - 1),
65    (upper & 0x01) ? "P" : "p",
66    (upper & 0x02) ? "S" : "s",
67    (lower & 0x08) ? "G" : "g",
68    (lower & 0x10) ? "M" : "m",
69    (lower & 0x20) ? "I" : "i",
70    (lower & 0x40) ? "W" : "w",
71    (lower & 0x01) ? "Read Only" :
72      ((lower & 0x02) ? "Read/Write" : "No Access")
73  );
74}
75
76void ShowBATS(){
77  unsigned32 lower;
78  unsigned32 upper;
79
80  __MFSPR(536, upper); __MFSPR(537, lower); printBAT( 0, upper, lower );
81  __MFSPR(538, upper); __MFSPR(539, lower); printBAT( 1, upper, lower );
82  __MFSPR(540, upper); __MFSPR(541, lower); printBAT( 2, upper, lower );
83  __MFSPR(542, upper); __MFSPR(543, lower); printBAT( 3, upper, lower );
84}
85#endif
86
87/*
88 * Copy of residuals passed by firmware
89 */
90RESIDUAL residualCopy;
91/*
92 * Copy Additional boot param passed by boot loader
93 */
94#define MAX_LOADER_ADD_PARM 80
95char loaderParam[MAX_LOADER_ADD_PARM];
96/*
97 * Vital Board data Start using DATA RESIDUAL
98 */
99/*
100 * Total memory using RESIDUAL DATA
101 */
102unsigned int BSP_mem_size;
103/*
104 * PCI Bus Frequency
105 */
106unsigned int BSP_bus_frequency;
107/*
108 * processor clock frequency
109 */
110unsigned int BSP_processor_frequency;
111/*
112 * Time base divisior (how many tick for 1 second).
113 */
114unsigned int BSP_time_base_divisor;
115/*
116 * system init stack and soft ir stack size
117 */
118#define INIT_STACK_SIZE 0x1000
119#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
120
121void BSP_panic(char *s)
122{
123  printk("%s PANIC %s\n",_RTEMS_version, s);
124  __asm__ __volatile ("sc");
125}
126
127void _BSP_Fatal_error(unsigned int v)
128{
129  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
130  __asm__ __volatile ("sc");
131}
132
133/*
134 *  The original table from the application and our copy of it with
135 *  some changes.
136 */
137
138extern rtems_configuration_table Configuration;
139
140rtems_configuration_table  BSP_Configuration;
141
142rtems_cpu_table Cpu_table;
143
144char *rtems_progname;
145
146/*
147 *  Use the shared implementations of the following routines
148 */
149
150void bsp_postdriver_hook(void);
151void bsp_libc_init( void *, uint32_t, int );
152
153/*
154 *  Function:   bsp_pretasking_hook
155 *  Created:    95/03/10
156 *
157 *  Description:
158 *      BSP pretasking hook.  Called just before drivers are initialized.
159 *      Used to setup libc and install any BSP extensions.
160 *
161 *  NOTES:
162 *      Must not use libc (to do io) from here, since drivers are
163 *      not yet initialized.
164 *
165 */
166
167void bsp_pretasking_hook(void)
168{
169  rtems_unsigned32        heap_start;   
170  rtems_unsigned32        heap_size;
171  rtems_unsigned32        heap_sbrk_spared;
172  extern rtems_unsigned32 _bsp_sbrk_init(rtems_unsigned32, rtems_unsigned32*);
173
174  heap_start = ((rtems_unsigned32) __rtems_end) +
175                INIT_STACK_SIZE + INTR_STACK_SIZE;
176  if (heap_start & (CPU_ALIGNMENT-1))
177      heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
178
179  heap_size = (BSP_mem_size - heap_start) - BSP_Configuration.work_space_size;
180  heap_sbrk_spared=_bsp_sbrk_init(heap_start, &heap_size);
181
182#ifdef SHOW_MORE_INIT_SETTINGS
183  printk( "HEAP start %x  size %x (%x bytes spared for sbrk)\n",
184             heap_start, heap_size, heap_sbrk_spared);
185#endif   
186
187  bsp_libc_init((void *) 0, heap_size, heap_sbrk_spared);
188
189#ifdef RTEMS_DEBUG
190  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
191#endif
192}
193
194void zero_bss()
195{
196  /* prevent these from being accessed in the short data areas */
197  extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
198  extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
199  memset(__SBSS_START__, 0, ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__));
200  memset(__SBSS2_START__, 0, ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__));
201  memset(__bss_start, 0, ((unsigned) __rtems_end) - ((unsigned)__bss_start));
202}
203
204void save_boot_params(RESIDUAL* r3, void *r4, void* r5, char *additional_boot_options)
205{
206
207  residualCopy = *r3;
208  strncpy(loaderParam, additional_boot_options, MAX_LOADER_ADD_PARM);
209  loaderParam[MAX_LOADER_ADD_PARM - 1] ='\0';
210}
211
212#if defined(mpc8240) || defined(mpc8245)
213unsigned int EUMBBAR;
214
215/*
216 * Return the current value of the Embedded Utilities Memory Block Base Address
217 * Register (EUMBBAR) as read from the processor configuration register using
218 * Processor Address Map B (CHRP).
219 */
220unsigned int get_eumbbar() {
221  register int a, e;
222
223  asm volatile( "lis %0,0xfec0; ori  %0,%0,0x0000": "=r" (a) );
224  asm volatile("sync");
225                                                               
226  asm volatile("lis %0,0x8000; ori %0,%0,0x0078": "=r"(e) );
227  asm volatile("stwbrx  %0,0x0,%1": "=r"(e): "r"(a)); 
228  asm volatile("sync");
229
230  asm volatile("lis %0,0xfee0; ori %0,%0,0x0000": "=r" (a) );
231  asm volatile("sync");
232                                                         
233  asm volatile("lwbrx %0,0x0,%1": "=r" (e): "r" (a));
234  asm volatile("isync");
235  return e;
236}
237#endif
238
239/*
240 *  bsp_start
241 *
242 *  This routine does the bulk of the system initialization.
243 */
244
245void bsp_start( void )
246{
247  unsigned char *stack;
248#if !defined(mpc8240) && !defined(mpc8245)
249  unsigned l2cr;
250#endif
251  register uint32_t  intrStack;
252  register uint32_t *intrStackPtr;
253  unsigned char *work_space_start;
254  ppc_cpu_id_t myCpu;
255  ppc_cpu_revision_t myCpuRevision;
256  prep_t boardManufacturer;
257  motorolaBoard myBoard;
258  Triv121PgTbl  pt=0;
259
260  /*
261   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
262   * function store the result in global variables so that it can be used
263   * later...
264   */
265  myCpu         = get_ppc_cpu_type();
266  myCpuRevision = get_ppc_cpu_revision();
267
268#if defined(mvme2100)
269  EUMBBAR = get_eumbbar();
270
271  Cpu_table.exceptions_in_RAM    = TRUE;
272  { unsigned v = 0x3000 ; _CPU_MSR_SET(v); }
273#endif
274
275#if !defined(mpc8240) && !defined(mpc8245)
276  /*
277   * enables L1 Cache. Note that the L1_caches_enables() codes checks for
278   * relevant CPU type so that the reason why there is no use of myCpu...
279   */
280  L1_caches_enables();
281
282  /*
283   * Enable L2 Cache. Note that the set_L2CR(L2CR) codes checks for
284   * relevant CPU type (mpc750)...
285   */
286  l2cr = get_L2CR();
287#ifdef SHOW_LCR2_REGISTER
288  printk("Initial L2CR value = %x\n", l2cr);
289#endif
290  if ( (! (l2cr & 0x80000000)) && ((int) l2cr == -1))
291    set_L2CR(0xb9A14000);
292#endif
293
294  /*
295   * the initial stack  has aready been set to this value in start.S
296   * so there is no need to set it in r1 again... It is just for info
297   * so that It can be printed without accessing R1.
298   */
299  stack = ((unsigned char*) __rtems_end) +
300               INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
301
302  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
303  *((uint32_t*)stack) = 0;
304
305  /*
306   * Initialize the interrupt related settings
307   * SPRG1 = software managed IRQ stack
308   *
309   * This could be done later (e.g in IRQ_INIT) but it helps to understand
310   * some settings below...
311   */
312  intrStack = ((uint32_t) __rtems_end) +
313          INIT_STACK_SIZE + INTR_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
314
315  /* make sure it's properly aligned */
316  intrStack &= ~(CPU_STACK_ALIGNMENT-1);
317
318  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
319  intrStackPtr = (uint32_t*) intrStack;
320  *intrStackPtr = 0;
321
322  _write_SPRG1(intrStack);
323
324  /* signal them that we have fixed PR288 - eventually, this should go away */
325  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
326
327  /*
328   * Initialize default raw exception handlers. See vectors/vectors_init.c
329   */
330  initialize_exceptions();
331
332  /*
333   * Init MMU block address translation to enable hardware access
334   */
335
336#if !defined(mvme2100)
337  /*
338   * PC legacy IO space used for inb/outb and all PC compatible hardware
339   */
340  setdbat(1, _IO_BASE, _IO_BASE, 0x10000000, IO_PAGE);
341#endif
342
343  /*
344   * PCI devices memory area. Needed to access OpenPIC features
345   * provided by the Raven
346   *
347   * T. Straumann: give more PCI address space
348   */
349  setdbat(2, PCI_MEM_BASE, PCI_MEM_BASE, 0x10000000, IO_PAGE);
350
351  /*
352   * Must have acces to open pic PCI ACK registers provided by the RAVEN
353   */
354  setdbat(3, 0xf0000000, 0xf0000000, 0x10000000, IO_PAGE);
355
356  select_console(CONSOLE_LOG);
357
358  /*
359   * We check that the keyboard is present and immediately
360   * select the serial console if not.
361   */
362#if defined(BSP_KBD_IOBASE)
363  { int err;
364    err = kbdreset();
365    if (err) select_console(CONSOLE_SERIAL);
366  }
367#else
368  select_console(CONSOLE_SERIAL);
369#endif
370
371  boardManufacturer   =  checkPrepBoardType(&residualCopy);
372  if (boardManufacturer != PREP_Motorola) {
373    printk("Unsupported hardware vendor\n");
374    while (1);
375  }
376  myBoard = getMotorolaBoard();
377
378  printk("-----------------------------------------\n");
379  printk("Welcome to %s on %s\n", _RTEMS_version,
380                                    motorolaBoardToString(myBoard));
381  printk("-----------------------------------------\n");
382#ifdef SHOW_MORE_INIT_SETTINGS
383  printk("Residuals are located at %x\n", (unsigned) &residualCopy);
384  printk("Additionnal boot options are %s\n", loaderParam);
385  printk("Initial system stack at %x\n",stack);
386  printk("Software IRQ stack at %x\n",intrStack);
387  printk("-----------------------------------------\n");
388#endif
389
390#ifdef TEST_RETURN_TO_PPCBUG
391  printk("Hit <Enter> to return to PPCBUG monitor\n");
392  printk("When Finished hit GO. It should print <Back from monitor>\n");
393  debug_getc();
394  _return_to_ppcbug();
395  printk("Back from monitor\n");
396  _return_to_ppcbug();
397#endif /* TEST_RETURN_TO_PPCBUG  */
398
399#ifdef SHOW_MORE_INIT_SETTINGS
400  printk("Going to start PCI buses scanning and initialization\n");
401#endif
402  InitializePCI();
403
404  {
405    const struct _int_map *bspmap  = motorolaIntMap(currentBoard);
406    if( bspmap ) {
407       printk("pci : Configuring interrupt routing for '%s'\n",
408          motorolaBoardToString(currentBoard));
409       FixupPCI(bspmap, motorolaIntSwizzle(currentBoard));
410    }
411    else
412       printk("pci : Interrupt routing not available for this bsp\n");
413 }
414
415#ifdef SHOW_MORE_INIT_SETTINGS
416  printk("Number of PCI buses found is : %d\n", BusCountPCI());
417#endif
418#ifdef TEST_RAW_EXCEPTION_CODE
419  printk("Testing exception handling Part 1\n");
420  /*
421   * Cause a software exception
422   */
423  __asm__ __volatile ("sc");
424  /*
425   * Check we can still catch exceptions and return coorectly.
426   */
427  printk("Testing exception handling Part 2\n");
428  __asm__ __volatile ("sc");
429
430  /*
431   *  Somehow doing the above seems to clobber SPRG0 on the mvme2100.  It
432   *  is probably a not so subtle hint that you do not want to use PPCBug
433   *  once RTEMS is up and running.  Anyway, we still needs to indicate
434   *  that we have fixed PR288.  Eventually, this should go away.
435   */
436  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
437#endif
438
439  BSP_mem_size            = residualCopy.TotalMemory;
440  BSP_bus_frequency       = residualCopy.VitalProductData.ProcessorBusHz;
441  BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz;
442  BSP_time_base_divisor   = (residualCopy.VitalProductData.TimeBaseDivisor?
443                    residualCopy.VitalProductData.TimeBaseDivisor : 4000);
444
445  /* clear hostbridge errors but leave MCP disabled -
446   * PCI config space scanning code will trip otherwise :-(
447   */
448  _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
449
450  /* Allocate and set up the page table mappings
451   * This is only available on >604 CPUs.
452   *
453   * NOTE: This setup routine may modify the available memory
454   *       size. It is essential to call it before
455   *       calculating the workspace etc.
456   */
457  pt = BSP_pgtbl_setup(&BSP_mem_size);
458
459  if (!pt || TRIV121_MAP_SUCCESS != triv121PgTblMap(
460            pt, TRIV121_121_VSID, 0xfeff0000, 1,
461            TRIV121_ATTR_IO_PAGE, TRIV121_PP_RW_PAGE)) {
462        printk("WARNING: unable to setup page tables VME "
463               "bridge must share PCI space\n");
464  }
465
466  /*
467   * Set up our hooks
468   * Make sure libc_init is done before drivers initialized so that
469   * they can use atexit()
470   */
471
472  Cpu_table.pretasking_hook      = bsp_pretasking_hook;    /* init libc, etc. */
473  Cpu_table.postdriver_hook      = bsp_postdriver_hook;
474  Cpu_table.do_zero_of_workspace = TRUE;
475  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
476  Cpu_table.clicks_per_usec      = BSP_processor_frequency/(BSP_time_base_divisor * 1000);
477  Cpu_table.exceptions_in_RAM    = TRUE;
478
479#ifdef SHOW_MORE_INIT_SETTINGS
480  printk("BSP_Configuration.work_space_size = %x\n",
481          BSP_Configuration.work_space_size);
482#endif
483
484  work_space_start =
485    (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size;
486
487  if ( work_space_start <=
488       ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) {
489    printk( "bspstart: Not enough RAM!!!\n" );
490    bsp_cleanup();
491  }
492
493  BSP_Configuration.work_space_start = work_space_start;
494
495  /*
496   * Initalize RTEMS IRQ system
497   */
498  BSP_rtems_irq_mng_init(0);
499
500  /* Activate the page table mappings only after
501   * initializing interrupts because the irq_mng_init()
502   * routine needs to modify the text
503   */
504  if (pt) {
505#ifdef  SHOW_MORE_INIT_SETTINGS
506    printk("Page table setup finished; will activate it NOW...\n");
507#endif
508    BSP_pgtbl_activate(pt);
509#if !defined(mvme2100)
510    /* finally, switch off DBAT3 */
511    setdbat(3, 0, 0, 0, 0);
512#endif
513  }
514
515  /*
516   * Initialize VME bridge - needs working PCI and IRQ subsystems...
517   */
518#ifdef SHOW_MORE_INIT_SETTINGS
519  printk("Going to initialize VME bridge\n");
520#endif
521  /*
522   * VME initialization is in a separate file so apps which don't use VME or
523   * want a different configuration may link against a customized routine.
524   */
525  BSP_vme_config();
526
527#if defined(DEBUG_BATS)
528  ShowBATS();
529#endif
530
531#ifdef SHOW_MORE_INIT_SETTINGS
532  printk("Exit from bspstart\n");
533#endif
534}
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