1 | /* |
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2 | * pci.c : this file contains basic PCI Io functions. |
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3 | * |
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4 | * CopyRight (C) 1999 valette@crf.canon.fr |
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5 | * |
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6 | * This code is heavilly inspired by the public specification of STREAM V2 |
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7 | * that can be found at : |
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8 | * |
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9 | * <http://www.chorus.com/Documentation/index.html> by following |
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10 | * the STREAM API Specification Document link. |
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11 | * |
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12 | * The license and distribution terms for this file may be |
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13 | * found in found in the file LICENSE in this distribution or at |
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14 | * http://www.OARcorp.com/rtems/license.html. |
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15 | * |
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16 | * $Id$ |
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17 | * |
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18 | * Till Straumann, <strauman@slac.stanford.edu>, 1/2002 |
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19 | * - separated bridge detection code out of this file |
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20 | */ |
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21 | |
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22 | #include <libcpu/io.h> |
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23 | #include <bsp/pci.h> |
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24 | |
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25 | /* allow for overriding these definitions */ |
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26 | #ifndef PCI_CONFIG_ADDR |
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27 | #define PCI_CONFIG_ADDR 0xcf8 |
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28 | #endif |
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29 | #ifndef PCI_CONFIG_DATA |
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30 | #define PCI_CONFIG_DATA 0xcfc |
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31 | #endif |
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32 | |
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33 | #define PCI_INVALID_VENDORDEVICEID 0xffffffff |
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34 | #define PCI_MULTI_FUNCTION 0x80 |
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35 | |
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36 | /* define a shortcut */ |
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37 | #define pci BSP_pci_configuration |
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38 | |
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39 | /* |
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40 | * Bit encode for PCI_CONFIG_HEADER_TYPE register |
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41 | */ |
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42 | unsigned char ucMaxPCIBus; |
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43 | |
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44 | static int |
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45 | indirect_pci_read_config_byte(unsigned char bus, unsigned char slot, |
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46 | unsigned char function, |
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47 | unsigned char offset, unsigned char *val) { |
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48 | out_be32((unsigned int*) pci.pci_config_addr, |
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49 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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50 | *val = in_8(pci.pci_config_data + (offset&3)); |
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51 | return PCIBIOS_SUCCESSFUL; |
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52 | } |
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53 | |
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54 | static int |
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55 | indirect_pci_read_config_word(unsigned char bus, unsigned char slot, |
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56 | unsigned char function, |
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57 | unsigned char offset, unsigned short *val) { |
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58 | *val = 0xffff; |
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59 | if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; |
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60 | out_be32((unsigned int*) pci.pci_config_addr, |
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61 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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62 | *val = in_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3))); |
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63 | return PCIBIOS_SUCCESSFUL; |
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64 | } |
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65 | |
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66 | static int |
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67 | indirect_pci_read_config_dword(unsigned char bus, unsigned char slot, |
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68 | unsigned char function, |
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69 | unsigned char offset, unsigned int *val) { |
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70 | *val = 0xffffffff; |
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71 | if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; |
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72 | out_be32((unsigned int*) pci.pci_config_addr, |
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73 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24)); |
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74 | *val = in_le32((volatile unsigned int *)pci.pci_config_data); |
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75 | return PCIBIOS_SUCCESSFUL; |
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76 | } |
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77 | |
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78 | static int |
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79 | indirect_pci_write_config_byte(unsigned char bus, unsigned char slot, |
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80 | unsigned char function, |
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81 | unsigned char offset, unsigned char val) { |
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82 | out_be32((unsigned int*) pci.pci_config_addr, |
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83 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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84 | out_8(pci.pci_config_data + (offset&3), val); |
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85 | return PCIBIOS_SUCCESSFUL; |
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86 | } |
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87 | |
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88 | static int |
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89 | indirect_pci_write_config_word(unsigned char bus, unsigned char slot, |
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90 | unsigned char function, |
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91 | unsigned char offset, unsigned short val) { |
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92 | if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; |
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93 | out_be32((unsigned int*) pci.pci_config_addr, |
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94 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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95 | out_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)), val); |
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96 | return PCIBIOS_SUCCESSFUL; |
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97 | } |
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98 | |
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99 | static int |
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100 | indirect_pci_write_config_dword(unsigned char bus, unsigned char slot, |
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101 | unsigned char function, |
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102 | unsigned char offset, unsigned int val) { |
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103 | if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; |
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104 | out_be32((unsigned int*) pci.pci_config_addr, |
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105 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24)); |
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106 | out_le32((volatile unsigned int *)pci.pci_config_data, val); |
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107 | return PCIBIOS_SUCCESSFUL; |
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108 | } |
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109 | |
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110 | const pci_config_access_functions pci_indirect_functions = { |
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111 | indirect_pci_read_config_byte, |
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112 | indirect_pci_read_config_word, |
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113 | indirect_pci_read_config_dword, |
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114 | indirect_pci_write_config_byte, |
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115 | indirect_pci_write_config_word, |
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116 | indirect_pci_write_config_dword |
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117 | }; |
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118 | |
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119 | pci_config BSP_pci_configuration = {(volatile unsigned char*)PCI_CONFIG_ADDR, |
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120 | (volatile unsigned char*)PCI_CONFIG_DATA, |
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121 | &pci_indirect_functions}; |
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122 | |
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123 | static int |
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124 | direct_pci_read_config_byte(unsigned char bus, unsigned char slot, |
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125 | unsigned char function, |
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126 | unsigned char offset, unsigned char *val) { |
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127 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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128 | *val=0xff; |
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129 | return PCIBIOS_DEVICE_NOT_FOUND; |
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130 | } |
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131 | *val=in_8(pci.pci_config_data + ((1<<slot)&~1) |
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132 | + (function<<8) + offset); |
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133 | return PCIBIOS_SUCCESSFUL; |
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134 | } |
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135 | |
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136 | static int |
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137 | direct_pci_read_config_word(unsigned char bus, unsigned char slot, |
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138 | unsigned char function, |
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139 | unsigned char offset, unsigned short *val) { |
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140 | *val = 0xffff; |
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141 | if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; |
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142 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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143 | return PCIBIOS_DEVICE_NOT_FOUND; |
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144 | } |
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145 | *val=in_le16((volatile unsigned short *) |
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146 | (pci.pci_config_data + ((1<<slot)&~1) |
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147 | + (function<<8) + offset)); |
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148 | return PCIBIOS_SUCCESSFUL; |
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149 | } |
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150 | |
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151 | static int |
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152 | direct_pci_read_config_dword(unsigned char bus, unsigned char slot, |
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153 | unsigned char function, |
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154 | unsigned char offset, unsigned int *val) { |
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155 | *val = 0xffffffff; |
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156 | if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; |
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157 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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158 | return PCIBIOS_DEVICE_NOT_FOUND; |
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159 | } |
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160 | *val=in_le32((volatile unsigned int *) |
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161 | (pci.pci_config_data + ((1<<slot)&~1) |
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162 | + (function<<8) + offset)); |
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163 | return PCIBIOS_SUCCESSFUL; |
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164 | } |
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165 | |
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166 | static int |
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167 | direct_pci_write_config_byte(unsigned char bus, unsigned char slot, |
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168 | unsigned char function, |
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169 | unsigned char offset, unsigned char val) { |
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170 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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171 | return PCIBIOS_DEVICE_NOT_FOUND; |
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172 | } |
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173 | out_8(pci.pci_config_data + ((1<<slot)&~1) |
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174 | + (function<<8) + offset, |
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175 | val); |
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176 | return PCIBIOS_SUCCESSFUL; |
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177 | } |
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178 | |
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179 | static int |
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180 | direct_pci_write_config_word(unsigned char bus, unsigned char slot, |
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181 | unsigned char function, |
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182 | unsigned char offset, unsigned short val) { |
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183 | if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; |
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184 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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185 | return PCIBIOS_DEVICE_NOT_FOUND; |
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186 | } |
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187 | out_le16((volatile unsigned short *) |
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188 | (pci.pci_config_data + ((1<<slot)&~1) |
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189 | + (function<<8) + offset), |
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190 | val); |
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191 | return PCIBIOS_SUCCESSFUL; |
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192 | } |
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193 | |
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194 | static int |
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195 | direct_pci_write_config_dword(unsigned char bus, unsigned char slot, |
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196 | unsigned char function, |
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197 | unsigned char offset, unsigned int val) { |
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198 | if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; |
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199 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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200 | return PCIBIOS_DEVICE_NOT_FOUND; |
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201 | } |
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202 | out_le32((volatile unsigned int *) |
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203 | (pci.pci_config_data + ((1<<slot)&~1) |
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204 | + (function<<8) + offset), |
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205 | val); |
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206 | return PCIBIOS_SUCCESSFUL; |
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207 | } |
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208 | |
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209 | const pci_config_access_functions pci_direct_functions = { |
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210 | direct_pci_read_config_byte, |
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211 | direct_pci_read_config_word, |
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212 | direct_pci_read_config_dword, |
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213 | direct_pci_write_config_byte, |
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214 | direct_pci_write_config_word, |
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215 | direct_pci_write_config_dword |
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216 | }; |
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217 | |
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218 | |
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219 | /* |
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220 | * This routine determines the maximum bus number in the system |
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221 | */ |
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222 | void InitializePCI() |
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223 | { |
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224 | extern void detect_host_bridge(); |
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225 | unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs; |
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226 | unsigned char ucHeader; |
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227 | unsigned char ucMaxSubordinate; |
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228 | unsigned int ulClass, ulDeviceID; |
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229 | |
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230 | detect_host_bridge(); |
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231 | /* |
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232 | * Scan PCI bus 0 looking for PCI-PCI bridges |
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233 | */ |
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234 | for(ucSlotNumber=0;ucSlotNumber<PCI_MAX_DEVICES;ucSlotNumber++) { |
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235 | (void)pci_read_config_dword(0, |
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236 | ucSlotNumber, |
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237 | 0, |
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238 | PCI_VENDOR_ID, |
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239 | &ulDeviceID); |
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240 | if(ulDeviceID==PCI_INVALID_VENDORDEVICEID) { |
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241 | /* |
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242 | * This slot is empty |
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243 | */ |
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244 | continue; |
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245 | } |
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246 | (void)pci_read_config_byte(0, |
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247 | ucSlotNumber, |
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248 | 0, |
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249 | PCI_HEADER_TYPE, |
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250 | &ucHeader); |
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251 | if(ucHeader&PCI_MULTI_FUNCTION) { |
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252 | ucNumFuncs=PCI_MAX_FUNCTIONS; |
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253 | } |
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254 | else { |
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255 | ucNumFuncs=1; |
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256 | } |
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257 | for(ucFnNumber=0;ucFnNumber<ucNumFuncs;ucFnNumber++) { |
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258 | (void)pci_read_config_dword(0, |
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259 | ucSlotNumber, |
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260 | ucFnNumber, |
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261 | PCI_VENDOR_ID, |
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262 | &ulDeviceID); |
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263 | if(ulDeviceID==PCI_INVALID_VENDORDEVICEID) { |
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264 | /* |
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265 | * This slot/function is empty |
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266 | */ |
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267 | continue; |
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268 | } |
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269 | |
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270 | /* |
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271 | * This slot/function has a device fitted. |
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272 | */ |
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273 | (void)pci_read_config_dword(0, |
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274 | ucSlotNumber, |
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275 | ucFnNumber, |
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276 | PCI_CLASS_REVISION, |
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277 | &ulClass); |
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278 | ulClass >>= 16; |
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279 | if (ulClass == PCI_CLASS_BRIDGE_PCI) { |
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280 | /* |
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281 | * We have found a PCI-PCI bridge |
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282 | */ |
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283 | (void)pci_read_config_byte(0, |
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284 | ucSlotNumber, |
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285 | ucFnNumber, |
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286 | PCI_SUBORDINATE_BUS, |
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287 | &ucMaxSubordinate); |
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288 | if(ucMaxSubordinate>ucMaxPCIBus) { |
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289 | ucMaxPCIBus=ucMaxSubordinate; |
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290 | } |
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291 | } |
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292 | } |
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293 | } |
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294 | } |
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295 | |
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296 | /* |
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297 | * Return the number of PCI busses in the system |
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298 | */ |
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299 | unsigned char BusCountPCI() |
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300 | { |
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301 | return(ucMaxPCIBus+1); |
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302 | } |
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