1 | /* |
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2 | * pci.c : this file contains basic PCI Io functions. |
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3 | * |
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4 | * CopyRight (C) 1999 valette@crf.canon.fr |
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5 | * |
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6 | * This code is heavilly inspired by the public specification of STREAM V2 |
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7 | * that can be found at : |
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8 | * |
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9 | * <http://www.chorus.com/Documentation/index.html> by following |
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10 | * the STREAM API Specification Document link. |
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11 | * |
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12 | * The license and distribution terms for this file may be |
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13 | * found in found in the file LICENSE in this distribution or at |
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14 | * http://www.OARcorp.com/rtems/license.html. |
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15 | * |
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16 | * $Id$ |
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17 | * |
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18 | * Till Straumann, <strauman@slac.stanford.edu>, 1/2002 |
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19 | * - separated bridge detection code out of this file |
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20 | */ |
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21 | |
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22 | #include <libcpu/io.h> |
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23 | #include <bsp/pci.h> |
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24 | #include <rtems/bspIo.h> |
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25 | |
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26 | /* allow for overriding these definitions */ |
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27 | #ifndef PCI_CONFIG_ADDR |
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28 | #define PCI_CONFIG_ADDR 0xcf8 |
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29 | #endif |
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30 | #ifndef PCI_CONFIG_DATA |
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31 | #define PCI_CONFIG_DATA 0xcfc |
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32 | #endif |
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33 | |
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34 | #define PCI_INVALID_VENDORDEVICEID 0xffffffff |
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35 | #define PCI_MULTI_FUNCTION 0x80 |
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36 | |
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37 | /* define a shortcut */ |
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38 | #define pci BSP_pci_configuration |
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39 | |
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40 | /* |
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41 | * Bit encode for PCI_CONFIG_HEADER_TYPE register |
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42 | */ |
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43 | unsigned char ucMaxPCIBus; |
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44 | |
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45 | static int |
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46 | indirect_pci_read_config_byte(unsigned char bus, unsigned char slot, |
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47 | unsigned char function, |
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48 | unsigned char offset, unsigned char *val) { |
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49 | out_be32((unsigned int*) pci.pci_config_addr, |
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50 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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51 | *val = in_8(pci.pci_config_data + (offset&3)); |
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52 | return PCIBIOS_SUCCESSFUL; |
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53 | } |
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54 | |
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55 | static int |
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56 | indirect_pci_read_config_word(unsigned char bus, unsigned char slot, |
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57 | unsigned char function, |
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58 | unsigned char offset, unsigned short *val) { |
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59 | *val = 0xffff; |
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60 | if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; |
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61 | out_be32((unsigned int*) pci.pci_config_addr, |
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62 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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63 | *val = in_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3))); |
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64 | return PCIBIOS_SUCCESSFUL; |
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65 | } |
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66 | |
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67 | static int |
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68 | indirect_pci_read_config_dword(unsigned char bus, unsigned char slot, |
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69 | unsigned char function, |
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70 | unsigned char offset, unsigned int *val) { |
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71 | *val = 0xffffffff; |
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72 | if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; |
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73 | out_be32((unsigned int*) pci.pci_config_addr, |
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74 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24)); |
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75 | *val = in_le32((volatile unsigned int *)pci.pci_config_data); |
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76 | return PCIBIOS_SUCCESSFUL; |
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77 | } |
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78 | |
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79 | static int |
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80 | indirect_pci_write_config_byte(unsigned char bus, unsigned char slot, |
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81 | unsigned char function, |
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82 | unsigned char offset, unsigned char val) { |
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83 | out_be32((unsigned int*) pci.pci_config_addr, |
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84 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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85 | out_8(pci.pci_config_data + (offset&3), val); |
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86 | return PCIBIOS_SUCCESSFUL; |
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87 | } |
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88 | |
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89 | static int |
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90 | indirect_pci_write_config_word(unsigned char bus, unsigned char slot, |
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91 | unsigned char function, |
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92 | unsigned char offset, unsigned short val) { |
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93 | if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; |
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94 | out_be32((unsigned int*) pci.pci_config_addr, |
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95 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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96 | out_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)), val); |
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97 | return PCIBIOS_SUCCESSFUL; |
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98 | } |
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99 | |
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100 | static int |
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101 | indirect_pci_write_config_dword(unsigned char bus, unsigned char slot, |
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102 | unsigned char function, |
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103 | unsigned char offset, unsigned int val) { |
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104 | if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; |
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105 | out_be32((unsigned int*) pci.pci_config_addr, |
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106 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24)); |
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107 | out_le32((volatile unsigned int *)pci.pci_config_data, val); |
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108 | return PCIBIOS_SUCCESSFUL; |
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109 | } |
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110 | |
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111 | const pci_config_access_functions pci_indirect_functions = { |
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112 | indirect_pci_read_config_byte, |
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113 | indirect_pci_read_config_word, |
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114 | indirect_pci_read_config_dword, |
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115 | indirect_pci_write_config_byte, |
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116 | indirect_pci_write_config_word, |
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117 | indirect_pci_write_config_dword |
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118 | }; |
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119 | |
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120 | pci_config BSP_pci_configuration = {(volatile unsigned char*)PCI_CONFIG_ADDR, |
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121 | (volatile unsigned char*)PCI_CONFIG_DATA, |
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122 | &pci_indirect_functions}; |
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123 | |
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124 | static int |
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125 | direct_pci_read_config_byte(unsigned char bus, unsigned char slot, |
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126 | unsigned char function, |
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127 | unsigned char offset, unsigned char *val) { |
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128 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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129 | *val=0xff; |
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130 | return PCIBIOS_DEVICE_NOT_FOUND; |
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131 | } |
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132 | *val=in_8(pci.pci_config_data + ((1<<slot)&~1) |
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133 | + (function<<8) + offset); |
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134 | return PCIBIOS_SUCCESSFUL; |
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135 | } |
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136 | |
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137 | static int |
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138 | direct_pci_read_config_word(unsigned char bus, unsigned char slot, |
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139 | unsigned char function, |
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140 | unsigned char offset, unsigned short *val) { |
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141 | *val = 0xffff; |
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142 | if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; |
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143 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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144 | return PCIBIOS_DEVICE_NOT_FOUND; |
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145 | } |
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146 | *val=in_le16((volatile unsigned short *) |
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147 | (pci.pci_config_data + ((1<<slot)&~1) |
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148 | + (function<<8) + offset)); |
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149 | return PCIBIOS_SUCCESSFUL; |
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150 | } |
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151 | |
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152 | static int |
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153 | direct_pci_read_config_dword(unsigned char bus, unsigned char slot, |
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154 | unsigned char function, |
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155 | unsigned char offset, unsigned int *val) { |
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156 | *val = 0xffffffff; |
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157 | if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; |
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158 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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159 | return PCIBIOS_DEVICE_NOT_FOUND; |
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160 | } |
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161 | *val=in_le32((volatile unsigned int *) |
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162 | (pci.pci_config_data + ((1<<slot)&~1) |
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163 | + (function<<8) + offset)); |
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164 | return PCIBIOS_SUCCESSFUL; |
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165 | } |
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166 | |
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167 | static int |
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168 | direct_pci_write_config_byte(unsigned char bus, unsigned char slot, |
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169 | unsigned char function, |
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170 | unsigned char offset, unsigned char val) { |
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171 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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172 | return PCIBIOS_DEVICE_NOT_FOUND; |
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173 | } |
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174 | out_8(pci.pci_config_data + ((1<<slot)&~1) |
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175 | + (function<<8) + offset, |
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176 | val); |
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177 | return PCIBIOS_SUCCESSFUL; |
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178 | } |
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179 | |
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180 | static int |
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181 | direct_pci_write_config_word(unsigned char bus, unsigned char slot, |
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182 | unsigned char function, |
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183 | unsigned char offset, unsigned short val) { |
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184 | if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER; |
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185 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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186 | return PCIBIOS_DEVICE_NOT_FOUND; |
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187 | } |
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188 | out_le16((volatile unsigned short *) |
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189 | (pci.pci_config_data + ((1<<slot)&~1) |
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190 | + (function<<8) + offset), |
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191 | val); |
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192 | return PCIBIOS_SUCCESSFUL; |
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193 | } |
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194 | |
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195 | static int |
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196 | direct_pci_write_config_dword(unsigned char bus, unsigned char slot, |
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197 | unsigned char function, |
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198 | unsigned char offset, unsigned int val) { |
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199 | if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER; |
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200 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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201 | return PCIBIOS_DEVICE_NOT_FOUND; |
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202 | } |
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203 | out_le32((volatile unsigned int *) |
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204 | (pci.pci_config_data + ((1<<slot)&~1) |
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205 | + (function<<8) + offset), |
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206 | val); |
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207 | return PCIBIOS_SUCCESSFUL; |
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208 | } |
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209 | |
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210 | const pci_config_access_functions pci_direct_functions = { |
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211 | direct_pci_read_config_byte, |
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212 | direct_pci_read_config_word, |
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213 | direct_pci_read_config_dword, |
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214 | direct_pci_write_config_byte, |
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215 | direct_pci_write_config_word, |
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216 | direct_pci_write_config_dword |
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217 | }; |
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218 | |
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219 | |
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220 | |
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221 | |
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222 | |
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223 | |
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224 | |
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225 | |
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226 | |
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227 | |
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228 | |
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229 | |
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230 | |
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231 | #define PRINT_MSG() \ |
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232 | printk("pci : Device %d:%02x routed to interrupt_line %d\n", pbus, pslot, int_name ) |
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233 | |
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234 | |
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235 | /* |
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236 | ** Validate a test interrupt name and print a warning if its not one of |
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237 | ** the names defined in the routing record. |
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238 | */ |
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239 | static int test_intname( struct _int_map *row, int pbus, int pslot, int int_pin, int int_name ) |
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240 | { |
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241 | int j,k; |
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242 | int _nopin= -1, _noname= -1; |
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243 | |
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244 | for(j=0; row->pin_route[j].pin > -1; j++) |
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245 | { |
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246 | if( row->pin_route[j].pin == int_pin ) |
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247 | { |
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248 | _nopin = 0; |
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249 | |
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250 | for(k=0; k<4 && row->pin_route[j].int_name[k] > -1; k++ ) |
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251 | { |
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252 | if( row->pin_route[j].int_name[k] == int_name ){ _noname=0; break; } |
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253 | } |
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254 | break; |
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255 | } |
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256 | } |
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257 | |
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258 | if( _nopin ) |
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259 | { |
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260 | printk("pci : Device %d:%02x supplied a bogus interrupt_pin %d\n", pbus, pslot, int_pin ); |
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261 | return -1; |
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262 | } |
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263 | else |
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264 | { |
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265 | if( _noname ) |
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266 | printk("pci : Device %d:%02x supplied a suspicious interrupt_line %d, using it anyway\n", pbus, pslot, int_name ); |
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267 | } |
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268 | return 0; |
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269 | } |
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270 | |
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271 | |
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272 | |
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273 | |
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274 | |
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275 | struct pcibridge |
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276 | { |
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277 | int bus,slot; |
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278 | }; |
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279 | |
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280 | |
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281 | static int FindPCIbridge( int mybus, struct pcibridge *pb ) |
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282 | { |
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283 | int pbus, pslot; |
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284 | unsigned8 bussec, buspri; |
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285 | unsigned16 devid, vendorid, dclass; |
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286 | |
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287 | for(pbus=0; pbus< BusCountPCI(); pbus++) |
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288 | { |
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289 | for(pslot=0; pslot< PCI_MAX_DEVICES; pslot++) |
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290 | { |
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291 | pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid); |
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292 | if( devid == 0xffff ) continue; |
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293 | |
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294 | pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &vendorid); |
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295 | if( vendorid == 0xffff ) continue; |
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296 | |
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297 | pci_read_config_word(pbus, pslot, 0, PCI_CLASS_DEVICE, &dclass); |
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298 | |
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299 | if( dclass == PCI_CLASS_BRIDGE_PCI ) |
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300 | { |
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301 | pci_read_config_byte(pbus, pslot, 0, PCI_PRIMARY_BUS, &buspri); |
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302 | pci_read_config_byte(pbus, pslot, 0, PCI_SECONDARY_BUS, &bussec); |
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303 | |
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304 | #if 0 |
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305 | printk("pci : Found bridge at %d:%d, mybus %d, pribus %d, secbus %d ", pbus, pslot, mybus, buspri, bussec ); |
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306 | #endif |
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307 | if( bussec == mybus ) |
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308 | { |
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309 | #if 0 |
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310 | printk("match\n"); |
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311 | #endif |
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312 | /* found our nearest bridge going towards the root */ |
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313 | pb->bus = pbus; |
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314 | pb->slot = pslot; |
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315 | |
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316 | return 0; |
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317 | } |
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318 | #if 0 |
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319 | printk("no match\n"); |
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320 | #endif |
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321 | } |
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322 | |
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323 | |
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324 | } |
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325 | } |
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326 | return -1; |
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327 | } |
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328 | |
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329 | |
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330 | |
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331 | |
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332 | |
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333 | |
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334 | |
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335 | |
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336 | void FixupPCI( struct _int_map *bspmap, int (*swizzler)(int,int) ) |
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337 | { |
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338 | unsigned char cvalue; |
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339 | unsigned16 devid; |
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340 | int ismatch, i, j, pbus, pslot, int_pin, int_name; |
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341 | |
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342 | /* |
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343 | ** If the device has a non-zero INTERRUPT_PIN, assign a bsp-specific |
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344 | ** INTERRUPT_NAME if one isn't already in place. Then, drivers can |
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345 | ** trivially use INTERRUPT_NAME to hook up with devices. |
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346 | */ |
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347 | |
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348 | for(pbus=0; pbus< BusCountPCI(); pbus++) |
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349 | { |
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350 | for(pslot=0; pslot< PCI_MAX_DEVICES; pslot++) |
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351 | { |
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352 | pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid); |
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353 | if( devid == 0xffff ) continue; |
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354 | |
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355 | /* got a device */ |
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356 | |
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357 | pci_read_config_byte( pbus, pslot, 0, PCI_INTERRUPT_PIN, &cvalue); |
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358 | int_pin = cvalue; |
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359 | |
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360 | pci_read_config_byte( pbus, pslot, 0, PCI_INTERRUPT_LINE, &cvalue); |
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361 | int_name = cvalue; |
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362 | |
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363 | /* printk("pci : device %d:%02x devid %04x, intpin %d, intline %d\n", pbus, pslot, devid, int_pin, int_name ); */ |
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364 | |
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365 | if( int_pin > 0 ) |
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366 | { |
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367 | ismatch = 0; |
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368 | |
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369 | /* |
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370 | ** first run thru the bspmap table and see if we have an explicit configuration |
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371 | */ |
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372 | for(i=0; bspmap[i].bus > -1; i++) |
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373 | { |
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374 | if( bspmap[i].bus == pbus && bspmap[i].slot == pslot ) |
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375 | { |
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376 | ismatch = -1; |
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377 | /* we have a record in the table that gives specific |
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378 | * pins and interrupts for devices in this slot */ |
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379 | if( int_name == 255 ) |
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380 | { |
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381 | /* find the vector associated with whatever pin the device gives us */ |
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382 | for( int_name=-1, j=0; bspmap[i].pin_route[j].pin > -1; j++ ) |
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383 | { |
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384 | if( bspmap[i].pin_route[j].pin == int_pin ) |
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385 | { |
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386 | int_name = bspmap[i].pin_route[j].int_name[0]; |
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387 | break; |
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388 | } |
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389 | } |
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390 | if( int_name == -1 ) |
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391 | { |
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392 | printk("pci : Unable to resolve device %d:%d w/ swizzled int pin %d to an interrupt_line.\n", pbus, pslot, int_pin ); |
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393 | } |
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394 | else |
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395 | { |
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396 | PRINT_MSG(); |
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397 | pci_write_config_byte(pbus,pslot,0,PCI_INTERRUPT_LINE,(cvalue= int_name, cvalue)); |
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398 | } |
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399 | } |
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400 | else |
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401 | { |
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402 | test_intname( &bspmap[i],pbus,pslot,int_pin,int_name); |
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403 | } |
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404 | break; |
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405 | } |
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406 | } |
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407 | |
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408 | |
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409 | if( !ismatch ) |
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410 | { |
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411 | /* |
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412 | ** no match, which means we're on a bus someplace. Work |
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413 | ** backwards from it to one of our defined busses, |
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414 | ** swizzling thru each bridge on the way. |
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415 | */ |
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416 | |
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417 | /* keep pbus, pslot pointed to the device being |
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418 | configured while we track down the bridges using |
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419 | tbus,tslot. We keep searching the routing table because |
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420 | we may end up finding our bridge in it */ |
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421 | |
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422 | int tbus= pbus, tslot= pslot; |
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423 | |
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424 | for(;;) |
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425 | { |
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426 | |
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427 | for(i=0; bspmap[i].bus > -1; i++) |
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428 | { |
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429 | if( bspmap[i].bus == tbus && (bspmap[i].slot == tslot || bspmap[i].slot == -1) ) |
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430 | { |
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431 | ismatch = -1; |
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432 | /* found a record for this bus, so swizzle the |
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433 | * int_pin which we then use to find the |
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434 | * interrupt_name. |
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435 | */ |
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436 | |
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437 | if( int_name == 255 ) |
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438 | { |
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439 | /* |
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440 | ** FIXME. I can't believe this little hack |
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441 | ** is right. It does not yield an error in |
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442 | ** convienently simple situations. |
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443 | */ |
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444 | if( tbus ) int_pin = (*swizzler)(tslot,int_pin); |
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445 | |
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446 | |
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447 | /* |
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448 | ** int_pin points to the interrupt channel |
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449 | ** this card ends up delivering interrupts |
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450 | ** on. Find the int_name servicing it. |
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451 | */ |
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452 | for( int_name=-1, j=0; bspmap[i].pin_route[j].pin > -1; j++ ) |
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453 | { |
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454 | if( bspmap[i].pin_route[j].pin == int_pin ) |
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455 | { |
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456 | int_name = bspmap[i].pin_route[j].int_name[0]; |
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457 | break; |
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458 | } |
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459 | } |
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460 | if( int_name == -1 ) |
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461 | { |
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462 | printk("pci : Unable to resolve device %d:%d w/ swizzled int pin %d to an interrupt_line.\n", pbus, pslot, int_pin ); |
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463 | } |
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464 | else |
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465 | { |
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466 | PRINT_MSG(); |
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467 | pci_write_config_byte(pbus,pslot,0,PCI_INTERRUPT_LINE,(cvalue= int_name, cvalue)); |
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468 | } |
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469 | } |
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470 | else |
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471 | { |
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472 | test_intname(&bspmap[i],pbus,pslot,int_pin,int_name); |
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473 | } |
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474 | goto donesearch; |
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475 | } |
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476 | } |
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477 | |
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478 | |
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479 | if( !ismatch ) |
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480 | { |
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481 | struct pcibridge pb; |
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482 | |
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483 | /* |
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484 | ** Haven't found our bus in the int map, so work |
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485 | ** upwards thru the bridges till we find it. |
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486 | */ |
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487 | |
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488 | if( FindPCIbridge( tbus, &pb )== 0 ) |
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489 | { |
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490 | int_pin = (*swizzler)(tslot,int_pin); |
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491 | |
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492 | /* our next bridge up is on pb.bus, pb.slot- now |
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493 | ** instead of pointing to the device we're |
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494 | ** trying to configure, we move from bridge to |
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495 | ** bridge. |
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496 | */ |
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497 | |
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498 | tbus = pb.bus; |
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499 | tslot = pb.slot; |
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500 | } |
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501 | else |
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502 | { |
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503 | printk("pci : No bridge from bus %d towards root found\n", tbus ); |
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504 | goto donesearch; |
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505 | } |
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506 | |
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507 | } |
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508 | |
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509 | } |
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510 | } |
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511 | donesearch: |
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512 | |
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513 | |
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514 | if( !ismatch && int_pin != 0 && int_name == 255 ) |
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515 | { |
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516 | printk("pci : Unable to match device %d:%d with an int routing table entry\n", pbus, pslot ); |
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517 | } |
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518 | |
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519 | |
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520 | } |
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521 | } |
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522 | } |
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523 | } |
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524 | |
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525 | |
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526 | |
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527 | |
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528 | |
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529 | |
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530 | |
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531 | |
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532 | |
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533 | |
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534 | /* |
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535 | * This routine determines the maximum bus number in the system |
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536 | */ |
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537 | void InitializePCI() |
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538 | { |
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539 | extern void detect_host_bridge(); |
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540 | unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs; |
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541 | unsigned char ucHeader; |
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542 | unsigned char ucMaxSubordinate; |
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543 | unsigned int ulClass, ulDeviceID; |
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544 | |
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545 | detect_host_bridge(); |
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546 | |
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547 | /* |
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548 | * Scan PCI bus 0 looking for PCI-PCI bridges |
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549 | */ |
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550 | for(ucSlotNumber=0;ucSlotNumber<PCI_MAX_DEVICES;ucSlotNumber++) { |
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551 | (void)pci_read_config_dword(0, |
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552 | ucSlotNumber, |
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553 | 0, |
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554 | PCI_VENDOR_ID, |
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555 | &ulDeviceID); |
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556 | if(ulDeviceID==PCI_INVALID_VENDORDEVICEID) { |
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557 | /* |
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558 | * This slot is empty |
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559 | */ |
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560 | continue; |
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561 | } |
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562 | (void)pci_read_config_byte(0, |
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563 | ucSlotNumber, |
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564 | 0, |
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565 | PCI_HEADER_TYPE, |
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566 | &ucHeader); |
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567 | if(ucHeader&PCI_MULTI_FUNCTION) { |
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568 | ucNumFuncs=PCI_MAX_FUNCTIONS; |
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569 | } |
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570 | else { |
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571 | ucNumFuncs=1; |
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572 | } |
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573 | for(ucFnNumber=0;ucFnNumber<ucNumFuncs;ucFnNumber++) { |
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574 | (void)pci_read_config_dword(0, |
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575 | ucSlotNumber, |
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576 | ucFnNumber, |
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577 | PCI_VENDOR_ID, |
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578 | &ulDeviceID); |
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579 | if(ulDeviceID==PCI_INVALID_VENDORDEVICEID) { |
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580 | /* |
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581 | * This slot/function is empty |
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582 | */ |
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583 | continue; |
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584 | } |
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585 | |
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586 | /* |
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587 | * This slot/function has a device fitted. |
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588 | */ |
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589 | (void)pci_read_config_dword(0, |
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590 | ucSlotNumber, |
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591 | ucFnNumber, |
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592 | PCI_CLASS_REVISION, |
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593 | &ulClass); |
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594 | ulClass >>= 16; |
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595 | if (ulClass == PCI_CLASS_BRIDGE_PCI) { |
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596 | /* |
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597 | * We have found a PCI-PCI bridge |
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598 | */ |
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599 | (void)pci_read_config_byte(0, |
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600 | ucSlotNumber, |
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601 | ucFnNumber, |
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602 | PCI_SUBORDINATE_BUS, |
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603 | &ucMaxSubordinate); |
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604 | if(ucMaxSubordinate>ucMaxPCIBus) { |
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605 | ucMaxPCIBus=ucMaxSubordinate; |
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606 | } |
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607 | } |
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608 | } |
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609 | } |
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610 | } |
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611 | |
---|
612 | /* |
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613 | * Return the number of PCI busses in the system |
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614 | */ |
---|
615 | unsigned char BusCountPCI() |
---|
616 | { |
---|
617 | return(ucMaxPCIBus+1); |
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618 | } |
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