[acc25ee] | 1 | /* |
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| 2 | * pci.c : this file contains basic PCI Io functions. |
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| 3 | * |
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[e79a1947] | 4 | * Copyright (C) 1999 valette@crf.canon.fr |
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[acc25ee] | 5 | * |
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[e79a1947] | 6 | * This code is heavily inspired by the public specification of STREAM V2 |
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[acc25ee] | 7 | * that can be found at : |
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| 8 | * |
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| 9 | * <http://www.chorus.com/Documentation/index.html> by following |
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| 10 | * the STREAM API Specification Document link. |
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| 11 | * |
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| 12 | * The license and distribution terms for this file may be |
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| 13 | * found in found in the file LICENSE in this distribution or at |
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[e831de8] | 14 | * http://www.rtems.com/license/LICENSE. |
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[acc25ee] | 15 | * |
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| 16 | * $Id$ |
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[69ed59f] | 17 | * |
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| 18 | * Till Straumann, <strauman@slac.stanford.edu>, 1/2002 |
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| 19 | * - separated bridge detection code out of this file |
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[acc25ee] | 20 | */ |
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| 21 | |
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[98afe31] | 22 | #include <rtems.h> |
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| 23 | #include <bsp.h> |
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| 24 | |
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[acc25ee] | 25 | #include <libcpu/io.h> |
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| 26 | #include <bsp/pci.h> |
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[e79a1947] | 27 | #include <rtems/bspIo.h> |
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[acc25ee] | 28 | |
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[69ed59f] | 29 | /* allow for overriding these definitions */ |
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| 30 | #ifndef PCI_CONFIG_ADDR |
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[0943f48d] | 31 | #define PCI_CONFIG_ADDR 0xcf8 |
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[69ed59f] | 32 | #endif |
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| 33 | #ifndef PCI_CONFIG_DATA |
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[0943f48d] | 34 | #define PCI_CONFIG_DATA 0xcfc |
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[69ed59f] | 35 | #endif |
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| 36 | |
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[0943f48d] | 37 | #define PCI_INVALID_VENDORDEVICEID 0xffffffff |
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| 38 | #define PCI_MULTI_FUNCTION 0x80 |
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[acc25ee] | 39 | |
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[69ed59f] | 40 | /* define a shortcut */ |
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[0943f48d] | 41 | #define pci BSP_pci_configuration |
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[acc25ee] | 42 | |
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| 43 | /* |
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| 44 | * Bit encode for PCI_CONFIG_HEADER_TYPE register |
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| 45 | */ |
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| 46 | unsigned char ucMaxPCIBus; |
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| 47 | |
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| 48 | static int |
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[0943f48d] | 49 | indirect_pci_read_config_byte( |
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| 50 | unsigned char bus, |
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| 51 | unsigned char slot, |
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| 52 | unsigned char function, |
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| 53 | unsigned char offset, |
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| 54 | unsigned char *val |
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| 55 | ) { |
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| 56 | out_be32((unsigned int*) pci.pci_config_addr, |
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| 57 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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| 58 | *val = in_8(pci.pci_config_data + (offset&3)); |
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| 59 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 60 | } |
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| 61 | |
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| 62 | static int |
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[0943f48d] | 63 | indirect_pci_read_config_word( |
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| 64 | unsigned char bus, |
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| 65 | unsigned char slot, |
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| 66 | unsigned char function, |
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| 67 | unsigned char offset, |
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| 68 | unsigned short *val |
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| 69 | ) { |
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| 70 | *val = 0xffff; |
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| 71 | if (offset&1) |
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| 72 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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| 73 | |
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| 74 | out_be32((unsigned int*) pci.pci_config_addr, |
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| 75 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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| 76 | *val = in_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3))); |
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| 77 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 78 | } |
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| 79 | |
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| 80 | static int |
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[0943f48d] | 81 | indirect_pci_read_config_dword( |
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| 82 | unsigned char bus, |
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| 83 | unsigned char slot, |
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| 84 | unsigned char function, |
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| 85 | unsigned char offset, |
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| 86 | unsigned int *val |
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| 87 | ) { |
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| 88 | *val = 0xffffffff; |
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| 89 | if (offset&3) |
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| 90 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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| 91 | |
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| 92 | out_be32((unsigned int*) pci.pci_config_addr, |
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| 93 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24)); |
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| 94 | *val = in_le32((volatile unsigned int *)pci.pci_config_data); |
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| 95 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 96 | } |
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| 97 | |
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| 98 | static int |
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[0943f48d] | 99 | indirect_pci_write_config_byte( |
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| 100 | unsigned char bus, |
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| 101 | unsigned char slot, |
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| 102 | unsigned char function, |
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| 103 | unsigned char offset, |
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| 104 | unsigned char val |
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| 105 | ) { |
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| 106 | out_be32((unsigned int*) pci.pci_config_addr, |
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| 107 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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| 108 | out_8(pci.pci_config_data + (offset&3), val); |
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| 109 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 110 | } |
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| 111 | |
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| 112 | static int |
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[0943f48d] | 113 | indirect_pci_write_config_word( |
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| 114 | unsigned char bus, |
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| 115 | unsigned char slot, |
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| 116 | unsigned char function, |
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| 117 | unsigned char offset, |
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| 118 | unsigned short val |
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| 119 | ) { |
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| 120 | if (offset&1) |
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| 121 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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| 122 | |
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| 123 | out_be32((unsigned int*) pci.pci_config_addr, |
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| 124 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24)); |
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| 125 | out_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)), val); |
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| 126 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 127 | } |
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| 128 | |
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| 129 | static int |
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[0943f48d] | 130 | indirect_pci_write_config_dword( |
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| 131 | unsigned char bus, |
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| 132 | unsigned char slot, |
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| 133 | unsigned char function, |
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| 134 | unsigned char offset, |
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| 135 | unsigned int val |
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| 136 | ) { |
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| 137 | if (offset&3) |
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| 138 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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| 139 | out_be32((unsigned int*) pci.pci_config_addr, |
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| 140 | 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24)); |
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| 141 | out_le32((volatile unsigned int *)pci.pci_config_data, val); |
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| 142 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 143 | } |
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| 144 | |
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[69ed59f] | 145 | const pci_config_access_functions pci_indirect_functions = { |
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[0943f48d] | 146 | indirect_pci_read_config_byte, |
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| 147 | indirect_pci_read_config_word, |
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| 148 | indirect_pci_read_config_dword, |
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| 149 | indirect_pci_write_config_byte, |
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| 150 | indirect_pci_write_config_word, |
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| 151 | indirect_pci_write_config_dword |
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[acc25ee] | 152 | }; |
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| 153 | |
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[0943f48d] | 154 | pci_config BSP_pci_configuration = { |
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| 155 | (volatile unsigned char*)PCI_CONFIG_ADDR, |
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| 156 | (volatile unsigned char*)PCI_CONFIG_DATA, |
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| 157 | &pci_indirect_functions |
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| 158 | }; |
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[acc25ee] | 159 | |
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| 160 | static int |
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[0943f48d] | 161 | direct_pci_read_config_byte( |
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| 162 | unsigned char bus, |
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| 163 | unsigned char slot, |
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| 164 | unsigned char function, |
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| 165 | unsigned char offset, |
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| 166 | unsigned char *val |
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| 167 | ) { |
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| 168 | if (bus != 0 || (1<<slot & 0xff8007fe)) { |
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| 169 | *val=0xff; |
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| 170 | return PCIBIOS_DEVICE_NOT_FOUND; |
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| 171 | } |
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| 172 | *val=in_8(pci.pci_config_data + ((1<<slot)&~1) |
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| 173 | + (function<<8) + offset); |
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| 174 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 175 | } |
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| 176 | |
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| 177 | static int |
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[0943f48d] | 178 | direct_pci_read_config_word( |
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| 179 | unsigned char bus, |
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| 180 | unsigned char slot, |
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| 181 | unsigned char function, |
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| 182 | unsigned char offset, |
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| 183 | unsigned short *val |
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| 184 | ) { |
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| 185 | *val = 0xffff; |
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| 186 | if (offset&1) |
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| 187 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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| 188 | if (bus != 0 || (1<<slot & 0xff8007fe)) |
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| 189 | return PCIBIOS_DEVICE_NOT_FOUND; |
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| 190 | |
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| 191 | *val=in_le16((volatile unsigned short *) |
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| 192 | (pci.pci_config_data + ((1<<slot)&~1) |
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| 193 | + (function<<8) + offset)); |
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| 194 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 195 | } |
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| 196 | |
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| 197 | static int |
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[0943f48d] | 198 | direct_pci_read_config_dword( |
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| 199 | unsigned char bus, |
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| 200 | unsigned char slot, |
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| 201 | unsigned char function, |
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| 202 | unsigned char offset, |
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| 203 | unsigned int *val |
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| 204 | ) { |
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| 205 | *val = 0xffffffff; |
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| 206 | if (offset&3) |
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| 207 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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| 208 | if (bus != 0 || (1<<slot & 0xff8007fe)) |
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| 209 | return PCIBIOS_DEVICE_NOT_FOUND; |
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| 210 | |
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| 211 | *val=in_le32((volatile unsigned int *) |
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| 212 | (pci.pci_config_data + ((1<<slot)&~1) |
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| 213 | + (function<<8) + offset)); |
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| 214 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 215 | } |
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| 216 | |
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| 217 | static int |
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[0943f48d] | 218 | direct_pci_write_config_byte( |
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| 219 | unsigned char bus, |
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| 220 | unsigned char slot, |
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| 221 | unsigned char function, |
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| 222 | unsigned char offset, |
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| 223 | unsigned char val |
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| 224 | ) { |
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| 225 | if (bus != 0 || (1<<slot & 0xff8007fe)) |
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| 226 | return PCIBIOS_DEVICE_NOT_FOUND; |
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| 227 | |
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| 228 | out_8(pci.pci_config_data + ((1<<slot)&~1) |
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| 229 | + (function<<8) + offset, |
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| 230 | val); |
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| 231 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 232 | } |
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| 233 | |
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| 234 | static int |
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[0943f48d] | 235 | direct_pci_write_config_word( |
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| 236 | unsigned char bus, |
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| 237 | unsigned char slot, |
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| 238 | unsigned char function, |
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| 239 | unsigned char offset, |
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| 240 | unsigned short val |
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| 241 | ) { |
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| 242 | if (offset&1) |
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| 243 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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| 244 | if (bus != 0 || (1<<slot & 0xff8007fe)) |
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| 245 | return PCIBIOS_DEVICE_NOT_FOUND; |
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| 246 | |
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| 247 | out_le16((volatile unsigned short *) |
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| 248 | (pci.pci_config_data + ((1<<slot)&~1) |
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| 249 | + (function<<8) + offset), |
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| 250 | val); |
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| 251 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 252 | } |
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| 253 | |
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| 254 | static int |
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[0943f48d] | 255 | direct_pci_write_config_dword( |
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| 256 | unsigned char bus, |
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| 257 | unsigned char slot, |
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| 258 | unsigned char function, |
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| 259 | unsigned char offset, |
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| 260 | unsigned int val |
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| 261 | ) { |
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| 262 | if (offset&3) |
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| 263 | return PCIBIOS_BAD_REGISTER_NUMBER; |
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| 264 | if (bus != 0 || (1<<slot & 0xff8007fe)) |
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| 265 | return PCIBIOS_DEVICE_NOT_FOUND; |
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| 266 | |
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| 267 | out_le32((volatile unsigned int *) |
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| 268 | (pci.pci_config_data + ((1<<slot)&~1) |
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| 269 | + (function<<8) + offset), |
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| 270 | val); |
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| 271 | return PCIBIOS_SUCCESSFUL; |
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[acc25ee] | 272 | } |
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| 273 | |
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[69ed59f] | 274 | const pci_config_access_functions pci_direct_functions = { |
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[0943f48d] | 275 | direct_pci_read_config_byte, |
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| 276 | direct_pci_read_config_word, |
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| 277 | direct_pci_read_config_dword, |
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| 278 | direct_pci_write_config_byte, |
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| 279 | direct_pci_write_config_word, |
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| 280 | direct_pci_write_config_dword |
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[acc25ee] | 281 | }; |
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| 282 | |
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[3a3e0b0e] | 283 | #define PRINT_MSG() \ |
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[98afe31] | 284 | printk("pci : Device %d:0x%02x:%d routed to interrupt_line %d\n", \ |
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| 285 | pbus, pslot, pfun, int_name ) |
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[3a3e0b0e] | 286 | |
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[6128a4a] | 287 | /* |
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[3a3e0b0e] | 288 | ** Validate a test interrupt name and print a warning if its not one of |
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| 289 | ** the names defined in the routing record. |
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| 290 | */ |
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[da3b8d3] | 291 | static int test_intname( |
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[e79a1947] | 292 | const struct _int_map *row, |
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| 293 | int pbus, |
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| 294 | int pslot, |
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[98afe31] | 295 | int pfun, |
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[e79a1947] | 296 | int int_pin, |
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| 297 | int int_name |
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[0943f48d] | 298 | ) { |
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| 299 | int j, k; |
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| 300 | int _nopin= -1, _noname= -1; |
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| 301 | |
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| 302 | for (j=0; row->pin_route[j].pin > -1; j++) { |
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| 303 | if ( row->pin_route[j].pin == int_pin ) { |
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| 304 | _nopin = 0; |
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| 305 | |
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| 306 | for (k=0; k<4 && row->pin_route[j].int_name[k] > -1; k++ ) { |
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| 307 | if ( row->pin_route[j].int_name[k] == int_name ) { |
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| 308 | _noname=0; break; |
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| 309 | } |
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[3a3e0b0e] | 310 | } |
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[0943f48d] | 311 | break; |
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| 312 | } |
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| 313 | } |
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[3a3e0b0e] | 314 | |
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[98afe31] | 315 | if( _nopin ) |
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| 316 | { |
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| 317 | printk("pci : Device %d:0x%02x:%d supplied a bogus interrupt_pin %d\n", pbus, pslot, pfun, int_pin ); |
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| 318 | return -1; |
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| 319 | } |
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| 320 | else |
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| 321 | { |
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| 322 | if( _noname ) { |
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| 323 | unsigned char v = row->pin_route[j].int_name[0]; |
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| 324 | printk("pci : Device %d:0x%02x:%d supplied a suspicious interrupt_line %d, ", pbus, pslot, pfun, int_name ); |
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| 325 | if ( (row->opts & PCI_FIXUP_OPT_OVERRIDE_NAME) && 255 != (v = row->pin_route[j].int_name[0]) ) { |
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| 326 | printk("OVERRIDING with %d from fixup table\n", v); |
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| 327 | pci_write_config_byte(pbus,pslot,pfun,PCI_INTERRUPT_LINE,v); |
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| 328 | } else { |
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| 329 | printk("using it anyway\n"); |
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| 330 | } |
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| 331 | } |
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| 332 | } |
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| 333 | return 0; |
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[3a3e0b0e] | 334 | } |
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| 335 | |
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| 336 | struct pcibridge |
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| 337 | { |
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[0943f48d] | 338 | int bus; |
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| 339 | int slot; |
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[3a3e0b0e] | 340 | }; |
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| 341 | |
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| 342 | static int FindPCIbridge( int mybus, struct pcibridge *pb ) |
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| 343 | { |
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[0943f48d] | 344 | int pbus, pslot; |
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| 345 | uint8_t bussec, buspri; |
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| 346 | uint16_t devid, vendorid, dclass; |
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[3a3e0b0e] | 347 | |
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[548ed3f] | 348 | for(pbus=0; pbus< pci_bus_count(); pbus++) { |
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[0943f48d] | 349 | for(pslot=0; pslot< PCI_MAX_DEVICES; pslot++) { |
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| 350 | pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid); |
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| 351 | if ( devid == 0xffff ) continue; |
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[3a3e0b0e] | 352 | |
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[0943f48d] | 353 | pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &vendorid); |
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| 354 | if ( vendorid == 0xffff ) continue; |
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[3a3e0b0e] | 355 | |
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[0943f48d] | 356 | pci_read_config_word(pbus, pslot, 0, PCI_CLASS_DEVICE, &dclass); |
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[3a3e0b0e] | 357 | |
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[0943f48d] | 358 | if ( dclass == PCI_CLASS_BRIDGE_PCI ) { |
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| 359 | pci_read_config_byte(pbus, pslot, 0, PCI_PRIMARY_BUS, &buspri); |
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| 360 | pci_read_config_byte(pbus, pslot, 0, PCI_SECONDARY_BUS, &bussec); |
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[3a3e0b0e] | 361 | |
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| 362 | #if 0 |
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[98afe31] | 363 | printk("pci : Found bridge at %d:0x%02x, mybus %d, pribus %d, secbus %d ", |
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[0943f48d] | 364 | pbus, pslot, mybus, buspri, bussec ); |
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[3a3e0b0e] | 365 | #endif |
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[0943f48d] | 366 | if ( bussec == mybus ) { |
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[3a3e0b0e] | 367 | #if 0 |
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[0943f48d] | 368 | printk("match\n"); |
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[3a3e0b0e] | 369 | #endif |
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[0943f48d] | 370 | /* found our nearest bridge going towards the root */ |
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| 371 | pb->bus = pbus; |
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| 372 | pb->slot = pslot; |
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[3a3e0b0e] | 373 | |
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[0943f48d] | 374 | return 0; |
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| 375 | } |
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[3a3e0b0e] | 376 | #if 0 |
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[0943f48d] | 377 | printk("no match\n"); |
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[3a3e0b0e] | 378 | #endif |
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| 379 | } |
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[0943f48d] | 380 | |
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| 381 | } |
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[3a3e0b0e] | 382 | } |
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| 383 | return -1; |
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| 384 | } |
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| 385 | |
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[da3b8d3] | 386 | void FixupPCI( const struct _int_map *bspmap, int (*swizzler)(int,int) ) |
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[3a3e0b0e] | 387 | { |
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[0943f48d] | 388 | unsigned char cvalue; |
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| 389 | uint16_t devid; |
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[98afe31] | 390 | int ismatch, i, j, pbus, pslot, pfun, int_pin, int_name, nfuns; |
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[0943f48d] | 391 | |
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| 392 | /* |
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| 393 | * If the device has a non-zero INTERRUPT_PIN, assign a bsp-specific |
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| 394 | * INTERRUPT_NAME if one isn't already in place. Then, drivers can |
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| 395 | * trivially use INTERRUPT_NAME to hook up with devices. |
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[3a3e0b0e] | 396 | */ |
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| 397 | |
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[548ed3f] | 398 | for (pbus=0; pbus< pci_bus_count(); pbus++) { |
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[98afe31] | 399 | for (pslot=0; pslot< PCI_MAX_DEVICES; pslot++) { |
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| 400 | pci_read_config_word(pbus, pslot, 0, PCI_DEVICE_ID, &devid); |
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| 401 | if ( devid == 0xffff ) continue; |
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| 402 | |
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| 403 | /* got a device */ |
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| 404 | pci_read_config_byte(pbus, pslot, 0, PCI_HEADER_TYPE, &cvalue); |
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| 405 | nfuns = cvalue & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1; |
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[3a3e0b0e] | 406 | |
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[98afe31] | 407 | for (pfun=0; pfun< nfuns; pfun++) { |
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| 408 | pci_read_config_word(pbus, pslot, pfun, PCI_DEVICE_ID, &devid); |
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| 409 | if( devid == 0xffff ) continue; |
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[3a3e0b0e] | 410 | |
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[98afe31] | 411 | pci_read_config_byte( pbus, pslot, pfun, PCI_INTERRUPT_PIN, &cvalue); |
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| 412 | int_pin = cvalue; |
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[3a3e0b0e] | 413 | |
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[98afe31] | 414 | pci_read_config_byte( pbus, pslot, pfun, PCI_INTERRUPT_LINE, &cvalue); |
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| 415 | int_name = cvalue; |
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[3a3e0b0e] | 416 | |
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[98afe31] | 417 | /* printk("pci : device %d:0x%02x:%i devid %04x, intpin %d, intline %d\n", |
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| 418 | pbus, pslot, pfun, devid, int_pin, int_name ); */ |
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[3a3e0b0e] | 419 | |
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[513b6c4b] | 420 | #if 0 |
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[98afe31] | 421 | { |
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| 422 | unsigned short cmd,stat; |
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| 423 | unsigned char lat, seclat, csize; |
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[513b6c4b] | 424 | |
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[98afe31] | 425 | pci_read_config_word(pbus,pslot,pfun,PCI_COMMAND, &cmd ); |
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| 426 | pci_read_config_word(pbus,pslot,pfun,PCI_STATUS, &stat ); |
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| 427 | pci_read_config_byte(pbus,pslot,pfun,PCI_LATENCY_TIMER, &lat ); |
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| 428 | pci_read_config_byte(pbus,pslot,pfun,PCI_SEC_LATENCY_TIMER, &seclat ); |
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| 429 | pci_read_config_byte(pbus,pslot,pfun,PCI_CACHE_LINE_SIZE, &csize ); |
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[0943f48d] | 430 | |
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| 431 | |
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[98afe31] | 432 | printk("pci : device %d:0x%02x:%d cmd %04X, stat %04X, latency %d, " |
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| 433 | " sec_latency %d, clsize %d\n", pbus, pslot, pfun, cmd, stat, |
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| 434 | lat, seclat, csize); |
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| 435 | } |
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| 436 | #endif |
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| 437 | |
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| 438 | if ( int_pin > 0 ) { |
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| 439 | ismatch = 0; |
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| 440 | |
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| 441 | /* |
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| 442 | * first run thru the bspmap table and see if we have an |
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| 443 | * explicit configuration |
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| 444 | */ |
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| 445 | for (i=0; bspmap[i].bus > -1; i++) { |
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| 446 | if ( bspmap[i].bus == pbus && bspmap[i].slot == pslot ) { |
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| 447 | ismatch = -1; |
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| 448 | /* we have a record in the table that gives specific |
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| 449 | * pins and interrupts for devices in this slot */ |
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| 450 | if ( int_name == 255 ) { |
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| 451 | /* find the vector associated with whatever pin the |
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| 452 | * device gives us |
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| 453 | */ |
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| 454 | for ( int_name=-1, j=0; bspmap[i].pin_route[j].pin > -1; j++ ) { |
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| 455 | if ( bspmap[i].pin_route[j].pin == int_pin ) { |
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| 456 | int_name = bspmap[i].pin_route[j].int_name[0]; |
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| 457 | break; |
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| 458 | } |
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| 459 | } |
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| 460 | if ( int_name == -1 ) { |
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| 461 | printk("pci : Unable to resolve device %d:0x%02x:%d w/ swizzled int " |
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| 462 | "pin %i to an interrupt_line.\n", pbus, pslot, pfun, int_pin ); |
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| 463 | } else { |
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| 464 | PRINT_MSG(); |
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| 465 | pci_write_config_byte( pbus,pslot,pfun, |
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| 466 | PCI_INTERRUPT_LINE,(cvalue= int_name, cvalue)); |
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| 467 | } |
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| 468 | } else { |
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| 469 | test_intname( &bspmap[i],pbus,pslot,pfun,int_pin,int_name); |
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| 470 | } |
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| 471 | break; |
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| 472 | } |
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| 473 | } |
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| 474 | |
---|
| 475 | if ( !ismatch ) { |
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| 476 | /* |
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| 477 | * no match, which means we're on a bus someplace. Work |
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| 478 | * backwards from it to one of our defined busses, |
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| 479 | * swizzling thru each bridge on the way. |
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| 480 | */ |
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| 481 | |
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| 482 | /* keep pbus, pslot pointed to the device being |
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| 483 | * configured while we track down the bridges using |
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| 484 | * tbus,tslot. We keep searching the routing table because |
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| 485 | * we may end up finding our bridge in it |
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| 486 | */ |
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| 487 | |
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| 488 | int tbus= pbus, tslot= pslot; |
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| 489 | |
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| 490 | for (;;) { |
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| 491 | for (i=0; bspmap[i].bus > -1; i++) { |
---|
| 492 | if ( bspmap[i].bus == tbus && |
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| 493 | (bspmap[i].slot == tslot || bspmap[i].slot == -1) ) { |
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| 494 | ismatch = -1; |
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| 495 | /* found a record for this bus, so swizzle the |
---|
| 496 | * int_pin which we then use to find the |
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| 497 | * interrupt_name. |
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| 498 | */ |
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| 499 | |
---|
| 500 | if ( int_name == 255 ) { |
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| 501 | /* |
---|
| 502 | * FIXME. I can't believe this little hack |
---|
| 503 | * is right. It does not yield an error in |
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| 504 | * convienently simple situations. |
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| 505 | */ |
---|
| 506 | if ( tbus ) int_pin = (*swizzler)(tslot,int_pin); |
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| 507 | |
---|
| 508 | /* |
---|
| 509 | * int_pin points to the interrupt channel |
---|
| 510 | * this card ends up delivering interrupts |
---|
| 511 | * on. Find the int_name servicing it. |
---|
| 512 | */ |
---|
| 513 | for (int_name=-1, j=0; bspmap[i].pin_route[j].pin > -1; j++){ |
---|
| 514 | if ( bspmap[i].pin_route[j].pin == int_pin ) { |
---|
| 515 | int_name = bspmap[i].pin_route[j].int_name[0]; |
---|
| 516 | break; |
---|
| 517 | } |
---|
| 518 | } |
---|
| 519 | |
---|
| 520 | if ( int_name == -1 ) { |
---|
| 521 | printk("pci : Unable to resolve device %d:0x%02x:%d w/ swizzled " |
---|
| 522 | "int pin %i to an interrupt_line.\n", |
---|
| 523 | pbus, pslot, pfun, int_pin ); |
---|
| 524 | } else { |
---|
| 525 | PRINT_MSG(); |
---|
| 526 | pci_write_config_byte(pbus,pslot,pfun, |
---|
| 527 | PCI_INTERRUPT_LINE,(cvalue=int_name, cvalue)); |
---|
| 528 | } |
---|
| 529 | } else { |
---|
| 530 | test_intname(&bspmap[i],pbus,pslot,pfun,int_pin,int_name); |
---|
| 531 | } |
---|
| 532 | goto donesearch; |
---|
| 533 | } |
---|
| 534 | } |
---|
| 535 | |
---|
| 536 | if ( !ismatch ) { |
---|
| 537 | struct pcibridge pb; |
---|
| 538 | |
---|
| 539 | /* |
---|
| 540 | * Haven't found our bus in the int map, so work |
---|
| 541 | * upwards thru the bridges till we find it. |
---|
| 542 | */ |
---|
| 543 | |
---|
| 544 | if ( FindPCIbridge( tbus, &pb )== 0 ) { |
---|
| 545 | int_pin = (*swizzler)(tslot,int_pin); |
---|
| 546 | |
---|
| 547 | /* our next bridge up is on pb.bus, pb.slot- now |
---|
| 548 | * instead of pointing to the device we're |
---|
| 549 | * trying to configure, we move from bridge to |
---|
| 550 | * bridge. |
---|
| 551 | */ |
---|
| 552 | |
---|
| 553 | tbus = pb.bus; |
---|
| 554 | tslot = pb.slot; |
---|
| 555 | } else { |
---|
| 556 | printk("pci : No bridge from bus %i towards root found\n", |
---|
| 557 | tbus ); |
---|
| 558 | goto donesearch; |
---|
| 559 | } |
---|
| 560 | } |
---|
| 561 | } |
---|
| 562 | } |
---|
| 563 | donesearch: |
---|
| 564 | |
---|
| 565 | if ( !ismatch && int_pin != 0 && int_name == 255 ) { |
---|
| 566 | printk("pci : Unable to match device %d:0x%02x:%d with an int " |
---|
| 567 | "routing table entry\n", pbus, pslot, pfun ); |
---|
| 568 | } |
---|
| 569 | } |
---|
| 570 | } |
---|
| 571 | } |
---|
| 572 | } |
---|
[3a3e0b0e] | 573 | } |
---|
| 574 | |
---|
[acc25ee] | 575 | /* |
---|
| 576 | * This routine determines the maximum bus number in the system |
---|
| 577 | */ |
---|
[0943f48d] | 578 | int pci_initialize() |
---|
[acc25ee] | 579 | { |
---|
[69ed59f] | 580 | extern void detect_host_bridge(); |
---|
[acc25ee] | 581 | unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs; |
---|
| 582 | unsigned char ucHeader; |
---|
| 583 | unsigned char ucMaxSubordinate; |
---|
| 584 | unsigned int ulClass, ulDeviceID; |
---|
| 585 | |
---|
| 586 | detect_host_bridge(); |
---|
[3a3e0b0e] | 587 | |
---|
[acc25ee] | 588 | /* |
---|
| 589 | * Scan PCI bus 0 looking for PCI-PCI bridges |
---|
| 590 | */ |
---|
[0943f48d] | 591 | for (ucSlotNumber=0;ucSlotNumber<PCI_MAX_DEVICES;ucSlotNumber++) { |
---|
| 592 | pci_read_config_dword(0, ucSlotNumber, 0, PCI_VENDOR_ID, &ulDeviceID); |
---|
| 593 | if (ulDeviceID==PCI_INVALID_VENDORDEVICEID) { |
---|
| 594 | /* This slot is empty */ |
---|
[acc25ee] | 595 | continue; |
---|
| 596 | } |
---|
[0943f48d] | 597 | pci_read_config_byte(0, ucSlotNumber, 0, PCI_HEADER_TYPE, &ucHeader); |
---|
| 598 | if (ucHeader&PCI_MULTI_FUNCTION) { |
---|
[acc25ee] | 599 | ucNumFuncs=PCI_MAX_FUNCTIONS; |
---|
[0943f48d] | 600 | } else { |
---|
[acc25ee] | 601 | ucNumFuncs=1; |
---|
| 602 | } |
---|
[0943f48d] | 603 | for (ucFnNumber=0;ucFnNumber<ucNumFuncs;ucFnNumber++) { |
---|
| 604 | pci_read_config_dword(0, ucSlotNumber, ucFnNumber, |
---|
| 605 | PCI_VENDOR_ID, &ulDeviceID); |
---|
| 606 | if (ulDeviceID==PCI_INVALID_VENDORDEVICEID) { |
---|
| 607 | /* This slot/function is empty */ |
---|
| 608 | continue; |
---|
[acc25ee] | 609 | } |
---|
| 610 | |
---|
[0943f48d] | 611 | /* This slot/function has a device fitted. */ |
---|
| 612 | pci_read_config_dword(0, ucSlotNumber, ucFnNumber, |
---|
| 613 | PCI_CLASS_REVISION, &ulClass); |
---|
[acc25ee] | 614 | ulClass >>= 16; |
---|
| 615 | if (ulClass == PCI_CLASS_BRIDGE_PCI) { |
---|
[0943f48d] | 616 | /* We have found a PCI-PCI bridge */ |
---|
| 617 | pci_read_config_byte(0, ucSlotNumber, ucFnNumber, |
---|
| 618 | PCI_SUBORDINATE_BUS, &ucMaxSubordinate); |
---|
| 619 | if (ucMaxSubordinate>ucMaxPCIBus) { |
---|
| 620 | ucMaxPCIBus=ucMaxSubordinate; |
---|
| 621 | } |
---|
| 622 | } |
---|
| 623 | } |
---|
| 624 | } |
---|
| 625 | return PCIB_ERR_SUCCESS; |
---|
[acc25ee] | 626 | } |
---|
| 627 | |
---|
| 628 | /* |
---|
| 629 | * Return the number of PCI busses in the system |
---|
| 630 | */ |
---|
[548ed3f] | 631 | unsigned char pci_bus_count() |
---|
[acc25ee] | 632 | { |
---|
[0943f48d] | 633 | return (ucMaxPCIBus+1); |
---|
[acc25ee] | 634 | } |
---|