source: rtems/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c @ e79a1947

4.104.114.84.95
Last change on this file since e79a1947 was e79a1947, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 10, 2004 at 11:51:17 PM

2004-11-10 Richard Campbell <richard.campbell@…>

  • Makefile.am, bootloader/misc.c, bootloader/pci.c, bootloader/pci.h, console/console.c, console/inch.c, console/reboot.c, console/uart.c, console/uart.h, irq/irq.c, irq/irq.h, irq/irq_init.c, motorola/motorola.c, motorola/motorola.h, openpic/openpic.c, openpic/openpic.h, pci/detect_raven_bridge.c, pci/pci.c, start/start.S, startup/bspstart.c, vectors/vectors_init.c, vme/vmeconfig.c: Add MVME2100 BSP and MPC8240 support. There was also a significant amount of spelling and whitespace cleanup.
  • tod/todcfg.c: New file.
  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 *  $Id$
3 */
4
5#include <libcpu/io.h>
6#include <libcpu/spr.h>
7
8#include <bsp.h>
9#include <bsp/pci.h>
10#include <bsp/consoleIo.h>
11#include <bsp/residual.h>
12#include <bsp/openpic.h>
13
14#include <rtems/bspIo.h>
15#include <libcpu/cpuIdent.h>
16
17#define RAVEN_MPIC_IOSPACE_ENABLE  0x0001
18#define RAVEN_MPIC_MEMSPACE_ENABLE 0x0002
19#define RAVEN_MASTER_ENABLE        0x0004
20#define RAVEN_PARITY_CHECK_ENABLE  0x0040
21#define RAVEN_SYSTEM_ERROR_ENABLE  0x0100
22#define RAVEN_CLEAR_EVENTS_MASK    0xf9000000
23
24#define RAVEN_MPIC_MEREN    ((volatile unsigned *)0xfeff0020)
25#define RAVEN_MPIC_MERST    ((volatile unsigned *)0xfeff0024)
26/* enable machine check on all conditions */
27#define MEREN_VAL           0x2f00
28
29#define pci BSP_pci_configuration
30extern unsigned int EUMBBAR;
31
32extern const pci_config_access_functions pci_direct_functions;
33extern const pci_config_access_functions pci_indirect_functions;
34
35unsigned long
36_BSP_clear_hostbridge_errors(int enableMCP, int quiet)
37{
38unsigned merst;
39
40    merst = in_be32(RAVEN_MPIC_MERST);
41    /* write back value to clear status */
42    out_be32(RAVEN_MPIC_MERST, merst);
43
44    if (enableMCP) {
45      if (!quiet)
46        printk("Enabling MCP generation on hostbridge errors\n");
47      out_be32(RAVEN_MPIC_MEREN, MEREN_VAL);
48    } else {
49      out_be32(RAVEN_MPIC_MEREN, 0);
50      if ( !quiet && enableMCP ) {
51        printk("leaving MCP interrupt disabled\n");
52      }
53    }
54    return (merst & 0xffff);
55}
56
57void detect_host_bridge()
58{
59#if (defined(mpc8240) || defined(mpc8245))
60  /*
61   * If the processor is an 8240 or an 8245 then the PIC is built
62   * in instead of being on the PCI bus. The MVME2100 is using Processor
63   * Address Map B (CHRP) although the Programmer's Reference Guide says
64   * it defaults to Map A.
65   */
66  /* We have an EPIC Interrupt Controller  */
67  OpenPIC = (volatile struct OpenPIC *) (EUMBBAR + BSP_OPEN_PIC_BASE_OFFSET);
68  pci.pci_functions = &pci_indirect_functions;
69  pci.pci_config_addr = (volatile unsigned char *) 0xfec00000;
70  pci.pci_config_data = (volatile unsigned char *) 0xfee00000;
71
72#else
73  PPC_DEVICE *hostbridge;
74  unsigned int id0;
75  unsigned int tmp;
76
77  /*
78   * This code assumes that the host bridge is located at
79   * bus 0, dev 0, func 0 AND that the old pre PCI 2.1
80   * standart devices detection mecahnism that was used on PC
81   * (still used in BSD source code) works.
82   */
83  hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL,
84                                  BridgeController,
85                                  PCIBridge, -1, 0);
86  if (hostbridge) {
87    if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) {
88      pci.pci_functions=&pci_indirect_functions;
89      /* Should be extracted from residual data,
90       * indeed MPC106 in CHRP mode is different,
91       * but we should not use residual data in
92       * this case anyway.
93       */
94      pci.pci_config_addr = ((volatile unsigned char *)
95                              (ptr_mem_map->io_base+0xcf8));
96      pci.pci_config_data = ptr_mem_map->io_base+0xcfc;
97    } else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) {
98      pci.pci_functions=&pci_direct_functions;
99      pci.pci_config_data=(unsigned char *) 0x80800000;
100    } else {
101    }
102  } else {
103    /* Let us try by experimentation at our own risk! */
104    pci.pci_functions = &pci_direct_functions;
105    /* On all direct bridges I know the host bridge itself
106     * appears as device 0 function 0.
107                 */
108    pci_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &id0);
109    if (id0==~0U) {
110      pci.pci_functions = &pci_indirect_functions;
111      pci.pci_config_addr = ((volatile unsigned char*)
112                              (ptr_mem_map->io_base+0xcf8));
113      pci.pci_config_data = ((volatile unsigned char*)ptr_mem_map->io_base+0xcfc);
114    }
115    /* Here we should check that the host bridge is actually
116     * present, but if it not, we are in such a desperate
117     * situation, that we probably can't even tell it.
118     */
119  }
120  pci_read_config_dword(0, 0, 0, 0, &id0);
121  if(id0 == PCI_VENDOR_ID_MOTOROLA +
122     (PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) {
123    /*
124     * We have a Raven bridge. We will get information about its settings
125     */
126    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
127#ifdef SHOW_RAVEN_SETTING
128    printk("RAVEN PCI command register = %x\n",id0);
129#endif
130    id0 |= RAVEN_CLEAR_EVENTS_MASK;
131    pci_write_config_dword(0, 0, 0, PCI_COMMAND, id0);
132    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
133#ifdef SHOW_RAVEN_SETTING
134    printk("After error clearing RAVEN PCI command register = %x\n",id0);
135#endif
136
137    if (id0 & RAVEN_MPIC_IOSPACE_ENABLE) {
138      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_0, &tmp);
139#ifdef SHOW_RAVEN_SETTING
140      printk("Raven MPIC is accessed via IO Space Access at address : %x\n",(tmp & ~0x1));
141#endif
142    }
143    if (id0 & RAVEN_MPIC_MEMSPACE_ENABLE) {
144      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_1, &tmp);
145#ifdef SHOW_RAVEN_SETTING
146      printk("Raven MPIC is accessed via memory Space Access at address : %x\n", tmp);
147#endif
148      OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE);
149      printk("OpenPIC found at %x.\n", OpenPIC);
150    }
151  }
152#endif
153  if (OpenPIC == (volatile struct OpenPIC *)0) {
154    BSP_panic("OpenPic Not found\n");
155  }
156
157}
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