source: rtems/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c @ 9966204

4.104.114.84.95
Last change on this file since 9966204 was 9966204, checked in by Joel Sherrill <joel.sherrill@…>, on May 14, 2002 at 5:28:05 PM

2001-05-14 Till Straumann <strauman@…>

Per PR216, "libbsp/powerpc/shared" BSP has been modified considerably
with the goal to make it more flexible and reusable by other
BSPs. The main strategies were:

  • eliminate hardcoded base addresses; devices use offsets and a BSP defined base address.
  • separate functionality into different files (e.g. reboot from inch.c to reboot.c) which can be overridden by a 'derived' BSP.
  • separate initialization code into separate files (e.g. PCI bridge detection/initialization was separated from the more generic PCI access routines), also to make it easier for 'derived' BSPs to substitute their own initialization code.

There are also a couple of enhancements and fixes:

  • IRQ handling code now has a hook for attaching a VME bridge.
  • OpenPIC is now explicitely initialized (polarities, senses). Eliminated the implicit assumption on the presence of an ISA PIC.
  • UART and console driver now supports more than 1 port. The current maximum of 2 can easily be extended by enlarging a table (it would even be easier if the ISR API was not broken by design).
  • fixed polled_io.c so it correctly supports console on COM2
  • fixed TLB invalidation code (start.S).
  • exception handler prints a stack backtrace.
  • added BSP_pciFindDevice() to scan the pci bus for a particular vendor/device/instance.
  • Property mode set to 100644
File size: 3.6 KB
Line 
1/*
2 *  $Id$
3 */
4
5#include <libcpu/io.h>
6
7#include <bsp.h>
8#include <bsp/pci.h>
9#include <bsp/consoleIo.h>
10#include <bsp/residual.h>
11#include <bsp/openpic.h>
12
13#define RAVEN_MPIC_IOSPACE_ENABLE       0x1
14#define RAVEN_MPIC_MEMSPACE_ENABLE      0x2
15#define RAVEN_MASTER_ENABLE             0x4
16#define RAVEN_PARITY_CHECK_ENABLE       0x40
17#define RAVEN_SYSTEM_ERROR_ENABLE       0x100
18#define RAVEN_CLEAR_EVENTS_MASK         0xf9000000
19
20#define pci BSP_pci_configuration
21
22extern const pci_config_access_functions pci_direct_functions;
23extern const pci_config_access_functions pci_indirect_functions;
24
25void detect_host_bridge()
26{
27  PPC_DEVICE *hostbridge;
28  unsigned int id0;
29  unsigned int tmp;
30 
31  /*
32   * This code assumes that the host bridge is located at
33   * bus 0, dev 0, func 0 AND that the old pre PCI 2.1
34   * standart devices detection mecahnism that was used on PC
35   * (still used in BSD source code) works.
36   */
37  hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL, 
38                                  BridgeController,
39                                  PCIBridge, -1, 0);
40  if (hostbridge) {
41    if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) {
42      pci.pci_functions=&pci_indirect_functions;
43      /* Should be extracted from residual data,
44       * indeed MPC106 in CHRP mode is different,
45       * but we should not use residual data in
46       * this case anyway.
47       */
48      pci.pci_config_addr = ((volatile unsigned char *) 
49                              (ptr_mem_map->io_base+0xcf8));
50      pci.pci_config_data = ptr_mem_map->io_base+0xcfc;
51    } else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) {
52      pci.pci_functions=&pci_direct_functions;
53      pci.pci_config_data=(unsigned char *) 0x80800000;
54    } else {
55    }
56  } else {
57    /* Let us try by experimentation at our own risk! */
58    pci.pci_functions = &pci_direct_functions;
59    /* On all direct bridges I know the host bridge itself
60     * appears as device 0 function 0.
61                 */
62    pci_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &id0);
63    if (id0==~0U) {
64      pci.pci_functions = &pci_indirect_functions;
65      pci.pci_config_addr = ((volatile unsigned char*)
66                              (ptr_mem_map->io_base+0xcf8));
67      pci.pci_config_data = ((volatile unsigned char*)ptr_mem_map->io_base+0xcfc);
68    }
69    /* Here we should check that the host bridge is actually
70     * present, but if it not, we are in such a desperate
71     * situation, that we probably can't even tell it.
72     */
73  }
74  pci_read_config_dword(0, 0, 0, 0, &id0);
75  if(id0 == PCI_VENDOR_ID_MOTOROLA +
76     (PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) {
77    /*
78     * We have a Raven bridge. We will get information about its settings
79     */
80    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
81#ifdef SHOW_RAVEN_SETTING   
82    printk("RAVEN PCI command register = %x\n",id0);
83#endif   
84    id0 |= RAVEN_CLEAR_EVENTS_MASK;
85    pci_write_config_dword(0, 0, 0, PCI_COMMAND, id0);
86    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
87#ifdef SHOW_RAVEN_SETTING   
88    printk("After error clearing RAVEN PCI command register = %x\n",id0);
89#endif   
90   
91    if (id0 & RAVEN_MPIC_IOSPACE_ENABLE) {
92      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_0, &tmp);
93#ifdef SHOW_RAVEN_SETTING   
94      printk("Raven MPIC is accessed via IO Space Access at address : %x\n",(tmp & ~0x1));
95#endif   
96    }
97    if (id0 & RAVEN_MPIC_MEMSPACE_ENABLE) {
98      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_1, &tmp);
99#ifdef SHOW_RAVEN_SETTING   
100      printk("Raven MPIC is accessed via memory Space Access at address : %x\n", tmp);
101#endif   
102      OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE);
103      printk("OpenPIC found at %p.\n",
104             OpenPIC);
105    }
106  }
107  if (OpenPIC == (volatile struct OpenPIC *)0) {
108    BSP_panic("OpenPic Not found\n");
109  }
110
111}
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