source: rtems/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c @ 7657233d

4.104.114.84.95
Last change on this file since 7657233d was 7657233d, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 31, 2002 at 8:12:09 PM

2002-10-31 Joel Sherrill <joel@…>

  • bootloader/em86.c, console/inch.c, console/polled_io.c, irq/irq.c, motorola/motorola.c, pci/detect_raven_bridge.c, vectors/vectors_init.c: Removed warnings.
  • Property mode set to 100644
File size: 3.7 KB
Line 
1/*
2 *  $Id$
3 */
4
5#include <libcpu/io.h>
6
7#include <bsp.h>
8#include <bsp/pci.h>
9#include <bsp/consoleIo.h>
10#include <bsp/residual.h>
11#include <bsp/openpic.h>
12
13#include <rtems/bspIo.h>
14
15#define RAVEN_MPIC_IOSPACE_ENABLE       0x1
16#define RAVEN_MPIC_MEMSPACE_ENABLE      0x2
17#define RAVEN_MASTER_ENABLE             0x4
18#define RAVEN_PARITY_CHECK_ENABLE       0x40
19#define RAVEN_SYSTEM_ERROR_ENABLE       0x100
20#define RAVEN_CLEAR_EVENTS_MASK         0xf9000000
21
22#define pci BSP_pci_configuration
23
24extern const pci_config_access_functions pci_direct_functions;
25extern const pci_config_access_functions pci_indirect_functions;
26
27void detect_host_bridge()
28{
29  PPC_DEVICE *hostbridge;
30  unsigned int id0;
31  unsigned int tmp;
32 
33  /*
34   * This code assumes that the host bridge is located at
35   * bus 0, dev 0, func 0 AND that the old pre PCI 2.1
36   * standart devices detection mecahnism that was used on PC
37   * (still used in BSD source code) works.
38   */
39  hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL, 
40                                  BridgeController,
41                                  PCIBridge, -1, 0);
42  if (hostbridge) {
43    if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) {
44      pci.pci_functions=&pci_indirect_functions;
45      /* Should be extracted from residual data,
46       * indeed MPC106 in CHRP mode is different,
47       * but we should not use residual data in
48       * this case anyway.
49       */
50      pci.pci_config_addr = ((volatile unsigned char *) 
51                              (ptr_mem_map->io_base+0xcf8));
52      pci.pci_config_data = ptr_mem_map->io_base+0xcfc;
53    } else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) {
54      pci.pci_functions=&pci_direct_functions;
55      pci.pci_config_data=(unsigned char *) 0x80800000;
56    } else {
57    }
58  } else {
59    /* Let us try by experimentation at our own risk! */
60    pci.pci_functions = &pci_direct_functions;
61    /* On all direct bridges I know the host bridge itself
62     * appears as device 0 function 0.
63                 */
64    pci_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &id0);
65    if (id0==~0U) {
66      pci.pci_functions = &pci_indirect_functions;
67      pci.pci_config_addr = ((volatile unsigned char*)
68                              (ptr_mem_map->io_base+0xcf8));
69      pci.pci_config_data = ((volatile unsigned char*)ptr_mem_map->io_base+0xcfc);
70    }
71    /* Here we should check that the host bridge is actually
72     * present, but if it not, we are in such a desperate
73     * situation, that we probably can't even tell it.
74     */
75  }
76  pci_read_config_dword(0, 0, 0, 0, &id0);
77  if(id0 == PCI_VENDOR_ID_MOTOROLA +
78     (PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) {
79    /*
80     * We have a Raven bridge. We will get information about its settings
81     */
82    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
83#ifdef SHOW_RAVEN_SETTING   
84    printk("RAVEN PCI command register = %x\n",id0);
85#endif   
86    id0 |= RAVEN_CLEAR_EVENTS_MASK;
87    pci_write_config_dword(0, 0, 0, PCI_COMMAND, id0);
88    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
89#ifdef SHOW_RAVEN_SETTING   
90    printk("After error clearing RAVEN PCI command register = %x\n",id0);
91#endif   
92   
93    if (id0 & RAVEN_MPIC_IOSPACE_ENABLE) {
94      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_0, &tmp);
95#ifdef SHOW_RAVEN_SETTING   
96      printk("Raven MPIC is accessed via IO Space Access at address : %x\n",(tmp & ~0x1));
97#endif   
98    }
99    if (id0 & RAVEN_MPIC_MEMSPACE_ENABLE) {
100      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_1, &tmp);
101#ifdef SHOW_RAVEN_SETTING   
102      printk("Raven MPIC is accessed via memory Space Access at address : %x\n", tmp);
103#endif   
104      OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE);
105      printk("OpenPIC found at %p.\n",
106             OpenPIC);
107    }
108  }
109  if (OpenPIC == (volatile struct OpenPIC *)0) {
110    BSP_panic("OpenPic Not found\n");
111  }
112
113}
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