source: rtems/c/src/lib/libbsp/powerpc/shared/pci/detect_raven_bridge.c

4.11
Last change on this file was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on May 3, 2012 at 3:09:24 PM

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

  • Property mode set to 100644
File size: 6.2 KB
Line 
1#include <libcpu/io.h>
2#include <libcpu/spr.h>
3
4#include <bsp.h>
5#include <bsp/pci.h>
6#include <bsp/consoleIo.h>
7#include <bsp/residual.h>
8#include <bsp/openpic.h>
9#include <bsp/irq.h>
10
11#include <rtems/bspIo.h>
12#include <libcpu/cpuIdent.h>
13
14#define SHOW_RAVEN_SETTINGS
15
16#define RAVEN_MPIC_IOSPACE_ENABLE  0x0001
17#define RAVEN_MPIC_MEMSPACE_ENABLE 0x0002
18#define RAVEN_MASTER_ENABLE        0x0004
19#define RAVEN_PARITY_CHECK_ENABLE  0x0040
20#define RAVEN_SYSTEM_ERROR_ENABLE  0x0100
21#define RAVEN_CLEAR_EVENTS_MASK    0xf9000000
22
23#define RAVEN_MPIC_MEREN    ((volatile unsigned *)0xfeff0020)
24#define RAVEN_MPIC_MERST    ((volatile unsigned *)0xfeff0024)
25#define MEREN_VAL           0x2f00
26
27#define pci BSP_pci_configuration
28
29extern const pci_config_access_functions pci_direct_functions;
30extern const pci_config_access_functions pci_indirect_functions;
31
32#if defined(mvme2100)
33/* FIXME - this should really be in a separate file - the 2100 doesn't
34 *         have a raven chip so there is no point having 2100 code here
35 */
36
37extern unsigned int EUMBBAR;
38
39void detect_host_bridge(void)
40{
41  /*
42   * If the processor is an 8240 or an 8245 then the PIC is built
43   * in instead of being on the PCI bus. The MVME2100 is using Processor
44   * Address Map B (CHRP) although the Programmer's Reference Guide says
45   * it defaults to Map A.
46   */
47  /* We have an EPIC Interrupt Controller  */
48  OpenPIC = (volatile struct OpenPIC *) (EUMBBAR + BSP_OPEN_PIC_BASE_OFFSET);
49  pci.pci_functions = &pci_indirect_functions;
50  pci.pci_config_addr = (volatile unsigned char *) 0xfec00000;
51  pci.pci_config_data = (volatile unsigned char *) 0xfee00000;
52}
53
54#else
55
56#if 0
57/* Unfortunately, PCI config space access to empty slots generates
58 * a 'signalled master abort' condition --> we can't really use
59 * the machine check interrupt for memory probing unless
60 * we use probing for PCI scanning also (which would make
61 * all that code either BSP dependent or requiring yet another
62 * API, sigh...).
63 * So for the moment, we just don't use MCP on all mvme2xxx
64 * boards (using the generic, hostbridge-independent 'clear'
65 * implementation [generic_clear_hberrs.c]).
66 */
67/*
68 * enableMCP: whether to enable MCP checkstop / machine check interrupts
69 *            on the hostbridge and in HID0.
70 *
71 *            NOTE: HID0 and MEREN are left alone if this flag is 0
72 *
73 * quiet    : be silent
74 *
75 * RETURNS  : raven MERST register contents (lowermost 16 bits), 0 if
76 *            there were no errors
77 */
78unsigned long
79_BSP_clear_hostbridge_errors(int enableMCP, int quiet)
80{
81unsigned merst;
82
83    merst = in_be32(RAVEN_MPIC_MERST);
84    /* write back value to clear status */
85    out_be32(RAVEN_MPIC_MERST, merst);
86
87    if (enableMCP) {
88      if (!quiet)
89        printk("Enabling MCP generation on hostbridge errors\n");
90      out_be32(RAVEN_MPIC_MEREN, MEREN_VAL);
91    } else {
92      out_be32(RAVEN_MPIC_MEREN, 0);
93      if ( !quiet && enableMCP ) {
94        printk("leaving MCP interrupt disabled\n");
95      }
96    }
97    return (merst & 0xffff);
98}
99#endif
100
101void detect_host_bridge(void)
102{
103  PPC_DEVICE *hostbridge;
104  uint32_t id0;
105  uint32_t tmp;
106
107  /*
108   * This code assumes that the host bridge is located at
109   * bus 0, dev 0, func 0 AND that the old pre PCI 2.1
110   * standard devices detection mechanism that was used on PC
111   * (still used in BSD source code) works.
112   */
113  hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL,
114                                  BridgeController,
115                                  PCIBridge, -1, 0);
116  if (hostbridge) {
117    if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) {
118      pci.pci_functions=&pci_indirect_functions;
119      /* Should be extracted from residual data,
120       * indeed MPC106 in CHRP mode is different,
121       * but we should not use residual data in
122       * this case anyway.
123       */
124      pci.pci_config_addr = ((volatile unsigned char *)
125                              (ptr_mem_map->io_base+0xcf8));
126      pci.pci_config_data = ptr_mem_map->io_base+0xcfc;
127    } else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) {
128      pci.pci_functions=&pci_direct_functions;
129      pci.pci_config_data=(unsigned char *) 0x80800000;
130    } else {
131    }
132  } else {
133    /* Let us try by experimentation at our own risk! */
134    pci.pci_functions = &pci_direct_functions;
135    /* On all direct bridges I know the host bridge itself
136     * appears as device 0 function 0.
137                 */
138    pci_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &id0);
139    if (id0==~0U) {
140      pci.pci_functions = &pci_indirect_functions;
141      pci.pci_config_addr = ((volatile unsigned char*)
142                              (ptr_mem_map->io_base+0xcf8));
143      pci.pci_config_data = ((volatile unsigned char*)ptr_mem_map->io_base+0xcfc);
144    }
145    /* Here we should check that the host bridge is actually
146     * present, but if it not, we are in such a desperate
147     * situation, that we probably can't even tell it.
148     */
149  }
150  pci_read_config_dword(0, 0, 0, 0, &id0);
151#ifdef SHOW_RAVEN_SETTINGS
152  printk("idreg 0 = 0x%x\n",id0);
153#endif
154  if((id0 == PCI_VENDOR_ID_MOTOROLA +
155      (PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) ||
156     (id0 == PCI_VENDOR_ID_MOTOROLA +
157      (PCI_DEVICE_ID_MOTOROLA_HAWK<<16))) {
158    /*
159     * We have a Raven bridge. We will get information about its settings
160     */
161    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
162#ifdef SHOW_RAVEN_SETTING
163    printk("RAVEN PCI command register = %x\n",id0);
164#endif
165    id0 |= RAVEN_CLEAR_EVENTS_MASK;
166    pci_write_config_dword(0, 0, 0, PCI_COMMAND, id0);
167    pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);
168#ifdef SHOW_RAVEN_SETTING
169    printk("After error clearing RAVEN PCI command register = %x\n",id0);
170#endif
171
172    if (id0 & RAVEN_MPIC_IOSPACE_ENABLE) {
173      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_0, &tmp);
174#ifdef SHOW_RAVEN_SETTING
175      printk("Raven MPIC is accessed via IO Space Access at address : %x\n",(tmp & ~0x1));
176#endif
177    }
178    if (id0 & RAVEN_MPIC_MEMSPACE_ENABLE) {
179      pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_1, &tmp);
180#ifdef SHOW_RAVEN_SETTING
181      printk("Raven MPIC is accessed via memory Space Access at address : %x\n", tmp);
182#endif
183      OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE);
184      printk("OpenPIC found at %x.\n", OpenPIC);
185    }
186  }
187
188#if BSP_PCI_IRQ_NUMBER > 0
189  if (OpenPIC == (volatile struct OpenPIC *)0) {
190    BSP_panic("OpenPic Not found\n");
191  }
192#endif
193
194}
195
196#endif
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